CAT5111VI-50-T3 [ONSEMI]
50K DIGITAL POTENTIOMETER, INCREMENT/DECREMENT CONTROL INTERFACE, 100 POSITIONS, PDSO8, 0.150 INCH, ROHS COMPLIANT, MS-012, SOIC-8;
| 型号： | CAT5111VI-50-T3 |
| 厂家： | 
ONSEMI |
| 描述： | 50K DIGITAL POTENTIOMETER, INCREMENT/DECREMENT CONTROL INTERFACE, 100 POSITIONS, PDSO8, 0.150 INCH, ROHS COMPLIANT, MS-012, SOIC-8 光电二极管 转换器 电阻器 |
| 文件： | 总13页 (文件大小：169K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CAT5111
100-Tap Digitally Program-
mable Potentiometer (DPPt)
with Buffered Wiper
Description
The CAT5111 is a single digitally programmable potentiometer
(DPPt) designed as an electronic replacement for mechanical
potentiometers. Ideal for automated adjustments on high volume
production lines, they are also well suited for applications where
equipment requiring periodic adjustment is either difficult to access or
located in a hazardous or remote environment.
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SOIC−8
V SUFFIX
CASE 751BD
MSOP−8
Z SUFFIX
The CAT5111 contains a 100−tap series resistor array connected
CASE 846AD
between two terminals R and R . An up/down counter and decoder
H
L
that are controlled by three input pins, determines which tap is
connected to the wiper, R . The CAT5111 wiper is buffered by an op
WB
amp that operates rail to rail. The wiper setting, stored in non−volatile
memory, is not lost when the device is powered down and is
automatically recalled when power is returned. The wiper can be
adjusted to test new system values without effecting the stored setting.
Wiper−control of the CAT5111 is accomplished with three input
control pins, CS, U/D, and INC. The INC input increments the wiper
in the direction which is determined by the logic state of the U/D input.
The CS input is used to select the device and also store the wiper
position prior to power down.
The digitally programmable potentiometer can be used as a buffered
voltage divider. For applications where the potentiometer is used as a
2−terminal variable resistor, please refer to the CAT5113. The
buffered wiper of the CAT5111 is not compatible with that application.
PDIP−8
L SUFFIX
CASE 646AA
TSSOP−8
Y SUFFIX
CASE 948AL
PIN CONFIGURATIONS
1
V
CC
INC
U/D
CS
R
R
L
H
R
WB
GND
PDIP (L), SOIC (V),
MSOP (Z)
1
R
R
GND
CS
L
WB
Features
V
CC
INC
U/D
• 100−position Linear Taper Potentiometer
• Non−volatile EEPROM Wiper Storage; Buffered Wiper
• Low Power CMOS Technology
R
H
TSSOP (Y)
(Top Views)
• Single Supply Operation: 2.5 V − 6.0 V
• Increment Up/Down Serial Interface
PIN FUNCTION
• Resistance Values: 10 kW, 50 kW and 100 kW
• Available in PDIP, SOIC, TSSOP and MSOP Packages
Pin Name
INC
Function
Increment Control
Up/Down Control
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
U/D
Compliant
R
Potentiometer High Terminal
Ground
H
Applications
GND
• Automated Product Calibration
• Remote Control Adjustments
R
Buffered Wiper Terminal
Potentiometer Low Terminal
Chip Select
WB
R
L
• Offset, Gain and Zero Control
• Tamper−proof Calibrations
CS
V
Supply Voltage
CC
• Contrast, Brightness and Volume Controls
• Motor Controls and Feedback Systems
• Programmable Analog Functions
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
© Semiconductor Components Industries, LLC, 2010
1
Publication Order Number:
August, 2010 − Rev. 18
CAT5111/D
CAT5111
DEVICE MARKING INFORMATION
MSOP
PDIP
SOIC
TSSOP
RL4A
CAT5111VT
YMXXXX
RL4A
CAT5111LT
YMXXXX
AARL
YMP
A1RL
4YMXXX
R = Resistance:
2 = 10 kW
4 = 50 kW
5 = 100 kW
L = Assembly Location
4 = Lead Finish − NiPdAu
A = Product Revision (Fixed as “A”)
CAT5111L = Device Code (PDIP)
CAT5111V = Device Code (SOIC)
T = Temperature Range (Industrial)
Y = Production Year (Last Digit)
M = Production Month (1−9, A, B, C)
AARL = CAT5111ZI−10−T3
AAPT = CAT5111ZI−50−T3
AAPX = CAT5111ZI−00−T3
Y = Production Year (Last Digit)
M = Production Month (1−9, A, B, C)
P = Product Revision
A1 = Device Code
R = Resistance:
2 = 10 kW
4 = 50 kW
5 = 100 kW
L = Assembly Location
4 = Lead Finish − NiPdAu
Y = Production Year (Last Digit)
M = Production Month (1−9, A, B, C)
XXX = Last Three Digits of
XXX = Assembly Lot Number
XXXX = Last Four Digits of Assembly Lot Number
R
H
V
CC
R
H
U/D
Control
and
+
–
INC
CS
+
–
R
R
WB
Memory
R
R
WB
Power On Recall
GND
L
L
Figure 1. Functional Diagram
Figure 2. Electronic Potentiometer Implementation
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2
CAT5111
Pin Description
Device Operation
The CAT5111 operates like a digitally controlled
INC: Increment Control Input
potentiometer with R and R equivalent to the high and low
H
L
The INC input (on the falling edge) moves the wiper in the
up or down direction determined by the condition of the U/D
input.
terminals and
R
WB
equivalent to the mechanical
potentiometer’s wiper. There are 100 available tap positions
including the resistor end points, R and R . There are 99
H
L
U/D: Up/Down Control Input
resistor elements connected in series between the R and R
H
L
The U/D input controls the direction of the wiper movement.
When in a high state and CS is low, any high−to−low
transition on INC will cause the wiper to move one
terminals. The wiper terminal is connected to one of the 100
taps and controlled by three inputs, INC, U/D and CS. These
inputs control a seven−bit up/down counter whose output is
decoded to select the wiper position. The selected wiper
position can be stored in nonvolatile memory using the INC
and CS inputs.
increment toward the R terminal. When in a low state and
H
CS is low, any high−to−low transition on INC will cause the
wiper to move one increment towards the R terminal.
L
With CS set LOW the CAT5111 is selected and will
respond to the U/D and INC inputs. HIGH to LOW
transitions on INC will increment or decrement the wiper
(depending on the state of the U/D input and seven−bit
counter). The wiper, when at either fixed terminal, acts like
its mechanical equivalent and does not move beyond the last
position. The value of the counter is stored in nonvolatile
memory whenever CS transitions HIGH while the INC input
is also HIGH. When the CAT5111 is powered−down, the last
stored wiper counter position is maintained in the
nonvolatile memory. When power is restored, the contents
of the memory are recalled and the counter is set to the value
stored.
R : High End Potentiometer Terminal
H
R
H
is the high end terminal of the potentiometer. It is not
required that this terminal be connected to a potential greater
than the R terminal. Voltage applied to the R terminal
L
H
cannot exceed the supply voltage, V or go below ground,
CC
GND.
R : Wiper Potentiometer Terminal (Buffered)
WB
R
WB
is the buffered wiper terminal of the potentiometer. Its
position on the resistor array is controlled by the control
inputs, INC, U/D and CS.
R : Low End Potentiometer Terminal
L
R is the low end terminal of the potentiometer. It is not
L
With INC set low, the CAT5111 may be de−selected and
powered down without storing the current wiper position in
nonvolatile memory. This allows the system to always
power up to a preset value stored in nonvolatile memory.
required that this terminal be connected to a potential less
than the R terminal. Voltage applied to the R terminal
H
L
cannot exceed the supply voltage, V or go below ground,
CC
GND. R and R are electrically interchangeable.
L
H
CS: Chip Select
The chip select input is used to activate the control input of
the CAT5111 and is active low. When in a high state, activity
on the INC and U/D inputs will not affect or change the
position of the wiper.
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3
CAT5111
Table 1. OPERATION MODES
INC
High to Low
High to Low
High
CS
Low
U/D
High
Low
X
Operation
Wiper toward R
H
Low
Wiper toward R
L
Low to High
Low to High
High
Store Wiper Position
No Store, Return to Standby
Standby
Low
X
X
X
R
H
C
H
R
WI
R
WB
C
W
C
L
R
L
Figure 3. Potentiometer Equivalent Circuit
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameters
Ratings
Units
Supply Voltage
V
V
to GND
−0.5 to +7
CC
Inputs
V
CS to GND
INC to GND
U/D to GND
−0.5 to V +0.5
CC
−0.5 to V +0.5
V
V
CC
−0.5 to V +0.5
CC
R
to GND
−0.5 to V +0.5
V
H
CC
R to GND
L
−0.5 to V +0.5
V
CC
R
WB
to GND
−0.5 to V +0.5
V
CC
Operating Ambient Temperature
Commercial (‘C’ or Blank suffix)
°C
0 to 70
−40 to +85
+150
Industrial (‘I’ suffix)
Junction Temperature
Storage Temperature
Lead Soldering (10 s max)
°C
°C
°C
°C
−65 to 150
+300
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 3. RELIABILITY CHARACTERISTICS
Symbol
(Note 1)
Parameter
ESD Susceptibility
Latch−Up
Test Method
Min
2000
Typ
Max
Units
V
V
MIL−STD−883, Test Method 3015
JEDEC Standard 17
ZAP
I
(Notes 1, 2)
100
mA
LTH
T
Data Retention
Endurance
MIL−STD−883, Test Method 1008
MIL−STD−883, Test Method 1003
100
Years
Stores
DR
N
1,000,000
END
1. This parameter is tested initially and after a design or process change that affects the parameter.
2. Latch−up protection is provided for stresses up to 100 mA on address and data pins from −1 V to V + 1 V
CC
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4
CAT5111
Table 4. DC ELECTRICAL CHARACTERISTICS (V = +2.5 V to +6 V unless otherwise specified)
CC
Symbol
Parameter
Conditions
Min
Typ
Max
Units
POWER SUPPLY
V
I
Operating Voltage Range
Supply Current (Increment)
2.5
–
–
–
6
V
CC
V
V
= 6 V, f = 1 MHz, I = 0
200
100
1000
500
150
mA
mA
mA
mA
mA
CC1
CC2
CC
W
= 6 V, f = 250 kHz, I = 0
–
–
CC
W
I
Supply Current (Write)
Programming, V = 6 V
–
–
CC
V
CC
= 3 V
–
–
I
(Note 4)
Supply Current (Standby)
CS = V − 0.3 V
U/D, INC = V − 0.3 V or GND
–
75
SB1
CC
CC
LOGIC INPUTS
I
Input Leakage Current
V
V
= V
CC
–
–
2
0
–
–
–
–
–
–
10
mA
mA
V
IH
IN
I
Input Leakage Current
= 0 V
−10
IL
IN
V
IH1
TTL High Level Input Voltage
TTL Low Level Input Voltage
CMOS High Level Input Voltage
CMOS Low Level Input Voltage
4.5 V ≤ V ≤ 5.5 V
V
CC
CC
V
0.8
+ 0.3
V
IL1
V
IH2
2.5 V ≤ V ≤ 6 V
V
CC
x 0.7
V
CC
V
CC
V
−0.3
V
x 0.2
V
IL2
CC
POTENTIOMETER CHARACTERISTICS
R
Potentiometer Resistance
−10 Device
−50 Device
−00 Device
10
50
kW
POT
100
Pot. Resistance Tolerance
20
%
V
V
RH
Voltage on R pin
0
0
V
CC
CC
H
V
RL
Voltage on R pin
V
V
L
Resolution
1
%
INL
Integral Linearity Error
Differential Linearity Error
Buffer Output Resistance
I
I
≤ 2 mA
≤ 2 mA
0.5
0.25
1
LSB
LSB
W
W
DNL
0.5
W
R
0.05 V ≤ V
V
≤ 0.95 V
≤ 0.95 V
,
,
1
OUT
CC
WB
CC
= 5 V
CC
I
Buffer Output Current
0.05 V ≤ V
V
3
mA
OUT
CC
WB
CC
= 5 V
CC
TC
TC of Pot Resistance
Ratiometric TC
300
ppm/°C
ppm/°C
pF
RPOT
TC
20
RATIO
C
/C /C
RH RL RW
Potentiometer Capacitances
Frequency Response
Output Voltage Range
8/8/25
1.7
fc
Passive Attenuator, 10 kW
≤ 100 mA, V = 5 V
MHz
V
I
0.01 V
0.99 V
CC
WB(SWING)
OUT
CC
CC
3. This parameter is tested initially and after a design or process change that affects the parameter.
4. Latch−up protection is provided for stresses up to 100 mA on address and data pins from −1 V to V + 1 V
CC
5. I = source or sink
W
6. These parameters are periodically sampled and are not 100% tested.
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5
CAT5111
Table 5. AC TEST CONDITIONS
V
CC
Range
2.5 V ≤ V ≤ 6 V
CC
Input Pulse Levels
0.2 V to 0.7 V
CC
CC
Input Rise and Fall Times
Input Reference Levels
10 ns
0.5 V
CC
Table 6. AC OPERATING CHARACTERISTICS (V = +2.5 V to +6.0 V, V = V , V = 0 V, unless otherwise specified)
CC
H
CC
L
Symbol
Parameter
Min
100
50
100
250
250
1
Typ (Note 7)
Max
−
Units
ns
t
CI
t
DI
t
ID
CS to INC Setup
U/D to INC Setup
U/D to INC Hold
INC LOW Period
INC HIGH Period
−
−
−
−
−
−
−
−
1
−
−
–
5
−
ns
−
ns
t
−
ns
IL
IH
IC
t
t
−
ns
INC Inactive to CS Inactive
CS Deselect Time (NO STORE)
CS Deselect Time (STORE)
−
ms
t
t
100
10
−
−
ns
CPH
CPH
−
ms
ms
t
IW
INC to V
Change
5
OUT
t
INC Cycle Time
1
−
ms
CYC
t , t (Note 8) INC Input Rise and Fall Time
−
500
1
ms
R
F
t
(Note 8)
Power−up to Wiper Stable
–
ms
ms
PU
t
Store Cycle
–
10
WR
7. Typical values are for T = 25°C and nominal supply voltage.
A
8. This parameter is periodically sampled and not 100% tested.
9. MI in the A.C. Timing diagram refers to the minimum incremental change in the W output due to a change in the wiper position.
CS
(store)
t
CYC
t
t
IC
CPH
t
CI
t
IL
t
IH
90%
90%
10%
INC
U/D
t
DI
t
ID
t
F
t
R
(3)
t
IW
MI
R
WB
Figure 4. A.C. Timing
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CAT5111
Applications Information
(a) resistive divider
(b) variable resistance
(c) two−port
Figure 5. Potentiometer Configuration
Applications
3
2
V (−)
+
–
1
R
R
4
3
+5 V
1
+5 V
8
R
1
2
1
7
R
R
A
6
+5 V
+5 V
4
8
1
DPP
pR
POT
8
7
4
R
–
+
A
9
10
2
2
1
7
3
5
3
5
4
R
(1−p)R
V
1
POT
O
3
DPP
8
R
2
11
B
555
4
R
2
R
–
+
R
3
4
6
CAT5113/5114
6
5
+2.5 V
7
V (+)
2
2
0.01 mF
0.003 mF
1
C
0.01 mF
A = A = A = / LM6064
1
2
3
4
R = R = R = 5 kW
2
3
4
R
= 10 kW
POT
Figure 6. Programmable Instrumentation
Amplifier
Figure 7. Programmable Sq. Wave Oscillator (555)
IC3A
6
–
+
V
= 1 V
1
REF
/ 74HC132
7
4
OSC
+5 V
8
5
+200 mV
20 kW
IC1B
2
1
7
DPP
10 kW
+
–
499 kW
V
CORR
4
0.01 mF
499 kW
+5 V
4
CS
2
3
–
CAT5111/5112
IC2
1
V
= 1 V 1 mV
OUT
+
IC1A
11
−5 V
499 kW
499 kW
= 1 V 50 mV
V
SENSOR
Figure 8. Sensor Auto Referencing Circuit
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7
CAT5111
+5 V
8
100 kW
2
1
7
CAT5113/5114
DPP
V
OUT
V
O
(REG)
4
R
V
(UNREG)
1
IN
2952
6.8 mF
11 kW 0.1 mF
(1−p)R
330 W
pR
6
SHUTDOWN
1.23 V
1 MW
330 W
SD
FB
GND
3
R
820 W
2
5
1 mF
+5 V
7
+5 V
7
+5 V
8
2
2
3
2
3
10 k
–
+
–
+
A
A
1
2
3
V
O
1
7
6
6
DPP
R
10 kW
6
3
I
S
4
5
4
CAT5113/5114
4
LT1097
+2.5 V
Figure 9. Programmable Voltage Regulator
Figure 10. Programmable I to V Converter
+5 V
IC1
393
IC2
74HC132
R
R
V
LL
1
3
2
–
+
1
7
OSC
CLO
C
1
3
6
R3
0.001 mF
R
100 kW
2
C
1 mF
2
–
+
R1
+5 V
2
CHI
10 kW
V
7
S
–
0.1 mF
50 kW
0.001 mF
V
O
+5 V
5
+5 V
8
V
UL
6
+
R2
4
3
A
2
1
7
1
10 kW
+5 V
IC3
DPP
CAT5111/5112
+2.5 V
+5 V
8
6
3
CAT5113/5114
4
5
2
1
–
+
10 kW
V
O
DPP
Figure 12. Programmable Bandpass Filter
0 ≤ V ≤ 2.5 V
7
O
AI
IC4
4
+2.5 V
0 ≤ V ≤ 2.5 V
V
S
S
Figure 11. Automatic Gain Control
R
1
100 kW
+5 V
+5 V
R
1
–
+
Serial
Bus
+5 V
100 kW
V
S
2
3
R
4
–
+
2.5 kW
I
S
1
+2.5 V
11
R
1
CAT5111/5112
100 kW
R
1
100 kW
+
5
6
7
+2.5 V
A = A = LMC6064A
–
A
2
1
2
Figure 13. Programmable Current Source/Sink
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CAT5111
PACKAGE DIMENSIONS
PDIP−8, 300 mils
CASE 646AA−01
ISSUE A
SYMBOL
MIN
NOM
MAX
A
5.33
A1
A2
b
0.38
2.92
0.36
3.30
0.46
1.52
0.25
9.27
4.95
0.56
1.78
0.36
10.16
b2
c
1.14
0.20
9.02
E1
D
E
E1
e
7.62
6.10
7.87
6.35
8.25
7.11
2.54 BSC
7.87
2.92
10.92
3.80
eB
L
PIN # 1
IDENTIFICATION
3.30
D
TOP VIEW
E
A2
A1
A
c
b2
L
eB
e
b
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters.
(2) Complies with JEDEC MS-001.
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CAT5111
PACKAGE DIMENSIONS
SOIC 8, 150 mils
CASE 751BD−01
ISSUE O
SYMBOL
MIN
NOM
MAX
1.35
A
A1
b
1.75
0.25
0.51
0.25
0.10
0.33
0.19
c
E1
E
D
E
E1
e
4.80
5.80
3.80
5.00
6.20
4.00
1.27 BSC
h
0.25
0.40
0º
0.50
1.27
8º
L
PIN # 1
IDENTIFICATION
θ
TOP VIEW
D
h
A1
θ
A
c
e
b
L
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MS-012.
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CAT5111
PACKAGE DIMENSIONS
TSSOP8, 4.4x3
CASE 948AL−01
ISSUE O
b
SYMBOL
MIN
NOM
MAX
A
A1
A2
b
1.20
0.15
1.05
0.30
0.20
3.10
6.50
4.50
0.05
0.80
0.19
0.09
2.90
6.30
4.30
0.90
E
c
E1
D
3.00
6.40
E
E1
e
4.40
0.65 BSC
1.00 REF
0.60
L
L1
0.50
0.75
0º
8º
θ
e
TOP VIEW
D
c
A2
A
q1
A1
L1
L
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-153.
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CAT5111
PACKAGE DIMENSIONS
MSOP 8, 3x3
CASE 846AD−01
ISSUE O
SYMBOL
MIN
NOM
MAX
A
A1
A2
b
1.10
0.15
0.95
0.38
0.23
3.10
5.00
3.10
0.05
0.75
0.22
0.13
2.90
4.80
2.90
0.10
0.85
c
D
3.00
4.90
E
E1
E
E1
e
3.00
0.65 BSC
0.60
L
0.40
0.80
L1
L2
θ
0.95 REF
0.25 BSC
0º
6º
TOP VIEW
D
A2
A
DETAIL A
A1
e
b
c
SIDE VIEW
END VIEW
q
L2
Notes:
L
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-187.
L1
DETAIL A
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CAT5111
Example of Ordering Information (Note 13)
Prefix
Device #
Suffix
CAT
5111
V
I
−10
− G
T3
Temperature Range
Lead Finish (Notes 11, 12)
Tape & Reel (Note 14)
T: Tape & Reel
3: 3,000 Units / Reel
Company ID
(Optional)
G: NiPdAu
Blank: Matte−Tin
I = Industrial (−40°C to +85°C)
Product Number
5111
Resistance
−10: 10 kW
−50: 50 kW
−00: 100 kW
Package
L: PDIP
V: SOIC
Y: TSSOP
Z: MSOP
Table 7. ORDERING INFORMATION
Orderable Part Number
CAT5111LI−10−G
Resistance (kW)
Package−Pins
PDIP−8
Lead Finish
10
50
NiPdAu
CAT5111LI−50−G
CAT5111LI−00−G
100
10
CAT5111VI−10−GT3
CAT5111VI−50−GT3
CAT5111VI−00−GT3
CAT5111YI−10−GT3
CAT5111YI−50−GT3
CAT5111YI−00−GT3
CAT5111ZI−10−T3
SOIC−8
TSSOP−8
MSOP−8
NiPdAu
NiPdAu
50
100
10
50
100
10
Matte−Tin
CAT5111ZI−50−T3
50
CAT5111ZI−00−T3
100
10.All packages are RoHS compliant.
11. Standard lead finish is NiPdAu, except MSOP package is Matte−Tin.
12.Contact factory for Matte−Tin finish availability for PDIP, SOIC and TSSOP packages.
13.The device used in the above example is a CAT5111VI−10−GT3 (SOIC, Industrial Temperature, 10 kW, NiPdAu, Tape & Reel, 3,000/Reel).
14.For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
DPP is a trademark of Semiconductor Components Industries, LLC.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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USA/Canada
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Phone: 421 33 790 2910
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Phone: 81−3−5773−3850
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For additional information, please contact your local
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