CAT5112YI-00-GT3 [ONSEMI]

32-Tap Digitally Programmable Potentiometer (DPP™) with Buffered Wiper; 32抽头数字可编程电位计( DPP ™ )与缓冲刷
CAT5112YI-00-GT3
型号: CAT5112YI-00-GT3
厂家: ONSEMI    ONSEMI
描述:

32-Tap Digitally Programmable Potentiometer (DPP™) with Buffered Wiper
32抽头数字可编程电位计( DPP ™ )与缓冲刷

转换器 电阻器 光电二极管
文件: 总11页 (文件大小:137K)
中文:  中文翻译
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CAT5112  
32-Tap Digitally Programmable Potentiometer (DPP™)  
with Buffered Wiper  
FEATURES  
DESCRIPTION  
The CAT5112 is a single digitally programmable  
potentiometer (DPP™) designed as a electronic  
replacement for mechanical potentiometers. Ideal for  
automated adjustments on high volume production  
lines, they are also well suited for applications where  
equipment requiring periodic adjustment is either  
difficult to access or located in a hazardous or remote  
environment.  
„ 32-position linear taper potentiometer  
„ Non-volatile EEPROM wiper storage;  
buffered wiper  
„ Low power CMOS technology  
„ Single supply operation: 2.5 V - 6.0 V  
„ Increment up/down serial interface  
„ Resistance values: 10 k, 50 kand 100 kΩ  
The CAT5112 contains a 32-tap series resistor array  
connected between two terminals RH and RL. An  
up/down counter and decoder that are controlled by  
three input pins, determines which tap is connected to  
the wiper, RWB. The CAT5112 wiper is buffered by an  
op amp that operates rail to rail. The wiper setting,  
stored in non-volatile memory, is not lost when the  
device is powered down and is automatically recalled  
when power is returned. The wiper can be adjusted to  
test new system values without effecting the stored  
setting. Wiper-control of the CAT5112 is accompli-  
„ Available in PDIP, SOIC, TSSOP and MSOP  
packages  
APPLICATIONS  
„ Automated product calibration  
„ Remote control adjustments  
„ Offset, gain and zero control  
„ Tamper-proof calibrations  
„ Contrast, brightness and volume controls  
„ Motor controls and feedback systems  
„ Programmable analog functions  
¯¯  
¯
¯¯¯  
shed with three input control pins, CS, U/D, and INC.  
¯¯¯  
The INC input increments the wiper in the direction  
¯
which is determined by the logic state of the U/D input.  
¯¯  
The CS input is used to select the device and also  
store the wiper position prior to power down.  
The digitally programmable potentiometer can be  
used as a buffered voltage divider. For applications  
where the potentiometer is used as a 2-terminal  
variable resistor, please refer to the CAT5114. The  
buffered wiper of the CAT5112 is not compatible with  
that application.  
For Ordering Information details, see page 10.  
FUNCTIONAL DIAGRAM  
R
H
V
CC  
R
H
U/D  
Control  
and  
Memory  
+
+
INC  
CS  
R
R
R
R
WB  
L
WB  
Power On Recall  
L
GND  
Electronic Potentiometer Implementation  
© 2009 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
1
Doc. No. MD-2002 Rev. O  
CAT5112  
PIN CONFIGURATION  
PIN DESCRIPTIONS  
PDIP 8-Lead (L)  
SOIC 8 Lead (V)  
MSOP 8 Lead (Z)  
Name Function  
¯¯¯  
INC  
Increment Control  
Up/Down Control  
TSSOP 8 Lead (Y)  
¯
U/D  
¯¯¯  
¯¯  
CS  
1
8 VCC  
¯¯  
1
8 RL  
INC  
RH Potentiometer High Terminal  
GND Ground  
32 CAT 7 RWB  
¯
U/D  
VCC  
2 CAT 7  
CS  
¯¯¯  
INC  
6 GND  
RH  
3
6 RL  
RWB Buffered Wiper Terminal  
RL Potentiometer Low Terminal  
GND 4  
5 RWB  
¯
U/D  
4
5 RH  
¯¯  
CS  
Chip Select  
VCC Supply Voltage  
PIN DESCRIPTION  
¯¯¯  
¯
¯¯¯  
high state, activity on the INC and U/D inputs will not  
affect or change the position of the wiper.  
INC: Increment Control Input  
¯¯¯  
The INC input (on the falling edge) moves the wiper in  
the up or down direction determined by the condition  
of the U/D input.  
DEVICE OPERATION  
¯
The CAT5112 operates like a digitally controlled  
potentiometer with RH and RL equivalent to the high  
and low terminals and RWB equivalent to the mecha–  
nical potentiometer's wiper. There are 32 available tap  
positions including the resistor end points, RH and RL.  
There are 31 resistor elements connected in series  
between the RH and RL terminals. The wiper terminal  
is connected to one of the 32 taps and controlled by  
¯
U/D: Up/Down Control Input  
¯
The U/D input controls the direction of the wiper  
¯¯  
movement. When in a high state and CS is low, any  
¯¯¯  
high-to-low transition on INC will cause the wiper to  
move one increment toward the RH terminal. When in  
a low state and CS is low, any high-to-low transition  
¯¯  
¯¯¯  
on INC will cause the wiper to move one increment  
towards the RL terminal.  
¯¯¯  
¯
¯¯  
three inputs, INC, U/D and CS. These inputs control a  
five-bit up/down counter whose output is decoded to  
select the wiper position. The selected wiper position  
can be stored in nonvolatile memory using the INC  
RH: High End Potentiometer Terminal  
RH is the high end terminal of the potentiometer. It is  
not required that this terminal be connected to a  
potential greater than the RL terminal. Voltage applied  
to the RH terminal cannot exceed the supply voltage,  
VCC or go below ground, GND.  
¯¯  
and CS inputs.  
¯¯  
With CS set LOW the CAT5112 is selected and will  
¯
¯¯¯  
respond to the U/D and INC inputs. HIGH to LOW  
¯¯¯  
transitions on INC wil increment or decrement the  
¯
wiper (depending on the state of the U/D input and  
R
WB: Wiper Potentiometer Terminal (Buffered)  
five-bit counter). The wiper, when at either fixed  
terminal, acts like its mechanical equivalent and does  
not move beyond the last position. The value of the  
RWB is the buffered wiper terminal of the potentio–  
meter. Its position on the resistor array is controlled by  
¯¯¯  
¯
¯¯  
the control inputs, INC, U/D and CS.  
¯¯  
counter is stored in nonvolatile memory whenever CS  
¯¯¯  
transitions HIGH while the INC input is also HIGH.  
RL: Low End Potentiometer Terminal  
When the CAT5112 is powered-down, the last stored  
wiper counter position is maintained in the nonvolatile  
memory. When power is restored, the contents of the  
memory are recalled and the counter is set to the  
value stored.  
RL is the low end terminal of the potentiometer. It is  
not required that this terminal be connected to a  
potential less than the RH terminal. Voltage applied to  
the RL terminal cannot exceed the supply voltage, VCC  
or go below ground, GND. RL and RH are electrically  
interchangeable.  
¯¯¯  
With INC set low, the CAT5112 may be deselected  
and powered down without storing the current wiper  
position in nonvolatile memory. This allows the system  
to always power up to a preset value stored in non-  
volatile memory.  
¯¯  
CS: Chip Select  
The chip select input is used to activate the control  
input of the CAT5112 and is active low. When in a  
Doc. No. MD-2002 Rev. O  
2
© 2009 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
CAT5112  
OPERATION MODES  
R
H
Operation  
¯¯¯  
INC  
¯¯  
CS  
¯
U/D  
C
C
H
High to Low  
High to Low  
High  
Low  
Low  
High  
Low  
X
Wiper toward RH  
Wiper toward RL  
R
WI  
R
WB  
Low to High  
Low to High  
High  
Store Wiper Position  
No Store, Return to Standby  
Standby  
C
W
Low  
X
X
X
L
Potentiometer  
Equivalent Circuit  
R
L
ABSOLUTE MAXIMUM RATINGS(1)  
Parameters  
Supply Voltage  
VCC to GND  
Inputs  
Ratings  
Units  
Parameters  
Ratings  
Units  
Operating Ambient Temperature  
Commercial (‘C’ or Blank suffix)  
Industrial (‘I’ suffix)  
-0.5 to +7  
V
0 to 70  
ºC  
ºC  
ºC  
ºC  
ºC  
-40 to +85  
+150  
¯¯  
-0.5 to VCC +0.5  
-0.5 to VCC +0.5  
-0.5 to VCC +0.5  
-0.5 to VCC +0.5  
-0.5 to VCC +0.5  
-0.5 to VCC +0.5  
V
V
V
V
V
V
Junction Temperature  
CS to GND  
¯¯¯  
INC to GND  
Storage Temperature  
-65 to 150  
+300  
¯
Lead Soldering (10s max)  
U/D to GND  
RH to GND  
RL to GND  
RWB to GND  
RELIABILITY CHARACTERISTICS  
Symbol Parameter  
Test Method  
Min  
2000  
Typ  
Max  
Units  
V
(2)  
VZAP  
ESD Susceptibility MIL-STD-883, Test Method 3015  
(2) (3)  
ILTH  
TDR  
NEND  
Latch-Up  
JEDEC Standard 17  
100  
mA  
Data Retention  
Endurance  
MIL-STD-883, Test Method 1008  
MIL-STD-883, Test Method 1003  
100  
Years  
Stores  
1,000,000  
DC ELECTRICAL CHARACTERISTICS  
VCC = +2.5 V to +6 V unless otherwise specified  
Power Supply  
Symbol Parameter  
VCC Operating Voltage Range  
Conditions  
Min  
2.5  
Typ  
Max  
6
Units  
V
VCC = 6 V, f = 1 MHz, IW = 0  
CC = 6 V, f = 250 kHz, IW = 0  
Programming, VCC = 6 V  
CC = 3 V  
¯¯  
200  
100  
1000  
500  
µA  
µA  
µA  
µA  
ICC1  
Supply Current (Increment)  
V
ICC2  
Supply Current (Write)  
V
CS = VCC - 0.3 V  
¯ ¯¯¯  
(3)  
ISB1  
Supply Current (Standby)  
75  
150  
µA  
U/D, INC = VCC - 0.3 V or GND  
Notes:  
(1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this  
specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.  
(2) This parameter is tested initially and after a design or process change that affects the parameter.  
(3) Latch-up protection is provided for stresses up to 100mA on address and data pins from -1 V to VCC + 1 V  
(4) IW = source or sink  
(5) These parameters are periodically sampled and are not 100% tested.  
© 2009 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
3
Doc. No. MD-2002 Rev. O  
CAT5112  
Logic Inputs  
Symbol Parameter  
Conditions  
VIN = VCC  
VIN = 0 V  
Min  
Typ  
Max  
10  
Units  
µA  
µA  
V
IIH  
Input Leakage Current  
IIL  
Input Leakage Current  
-10  
VIH1  
VIL1  
VIH2  
VIL2  
TTL High Level Input Voltage  
TTL Low Level Input Voltage  
CMOS High Level Input Voltage  
CMOS Low Level Input Voltage  
2
0
VCC  
4.5 V VCC 5.5 V  
2.5 V VCC 6 V  
0.8  
V
VCC x 0.7  
-0.3  
VCC + 0.3  
V
V
CC x 0.2  
V
Potentiometer Characteristics  
Symbol  
Parameter  
Conditions  
-10 Device  
-50 Device  
-00 Device  
Min  
Typ  
Max  
Units  
10  
50  
RPOT  
Potentiometer Resistance  
kΩ  
100  
Pot. Resistance Tolerance  
Voltage on RH pin  
±20  
VCC  
VCC  
%
V
VRH  
VRL  
0
0
Voltage on RL pin  
V
Resolution  
1
%
INL  
Integral Linearity Error  
Differential Linearity Error  
IW 2 µA  
IW 2 µA  
0.5  
0.25  
1
LSB  
LSB  
DNL  
0.5  
0.05VCC VWB 0.95VCC,  
VCC = 5 V  
ROUT  
IOUT  
Buffer Output Resistance  
Buffer Output Current  
1
3
0.05VCC VWB 0.95VCC,  
VCC = 5 V  
mA  
TCRPOT  
TCRATIO  
TC of Pot Resistance  
Ratiometric TC  
300  
20  
ppm/ºC  
ppm/ºC  
pF  
CRH/CRL/CRW Potentiometer Capacitances  
8/8/25  
1.7  
fc  
Frequency Response  
Output Voltage Range  
Passive Attenuator, 10kΩ  
IOUT 100 µA, VCC = 5 V  
MHz  
VWB(SWING)  
0.01VCC  
0.99VCC  
Doc. No. MD-2002 Rev. O  
4
© 2009 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
CAT5112  
AC CONDITIONS OF TEST  
VCC Range  
2.5V VCC 6V  
0.2VCC to 0.7VCC  
10 ns  
Input Pulse Levels  
Input Rise and Fall Times  
Input Reference Levels  
0.5VCC  
AC OPERATING CHARACTERISTICS  
VCC = +2.5 V to +6.0 V, VH = VCC, VL = 0 V, unless otherwise specified  
Symbol Parameter  
Min  
100  
50  
100  
250  
250  
1
Typ(1)  
Max  
Units  
ns  
¯¯  
¯¯¯  
tCI  
tDI  
1
5
CS to INC Setup  
¯
¯¯¯  
ns  
U/D to INC Setup  
¯
¯¯¯  
tID  
ns  
U/D to INC Hold  
¯¯¯  
tIL  
ns  
INC LOW Period  
¯¯¯  
tIH  
ns  
INC HIGH Period  
¯¯¯  
¯¯  
tIC  
µs  
INC Inactive to CS Inactive  
¯¯  
tCPH  
tCPH  
tIW  
100  
10  
ns  
CS Deselect Time (NO STORE)  
¯¯  
ms  
µs  
CS Deselect Time (STORE)  
¯¯¯  
5
INC to VOUT Change  
¯¯¯  
tCYC  
1
µs  
INC Cycle Time  
(2)  
¯¯¯  
tR, tF  
500  
1
µs  
INC Input Rise and Fall Time  
(2)  
tPU  
tWR  
Power-up to Wiper Stable  
Store Cycle  
ms  
ms  
10  
A.C. TIMING  
CS  
(store)  
t
CYC  
t
t
IC  
t
CPH  
CI  
t
IL  
t
IH  
90%  
90%  
INC  
U/D  
10%  
t
DI  
t
ID  
t
F
t
R
(3)  
t
IW  
MI  
R
WB  
Notes:  
(1) Typical values are for TA = 25ºC and nominal supply voltage.  
(2) This parameter is periodically sampled and not 100% tested.  
(3) MI in the A.C. Timing diagram refers to the minimum incremental change in the W output due to a change in the wiper position.  
© 2009 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
5
Doc. No. MD-2002 Rev. O  
CAT5112  
PACKAGE OUTLINE DRAWINGS  
(1)(2)  
PDIP 8-Lead 300 mil (L)  
SYMBOL  
MIN  
NOM  
MAX  
A
A1  
A2  
b
5.33  
0.38  
2.92  
0.36  
1.14  
0.20  
9.02  
7.62  
3.30  
0.46  
4.95  
0.56  
1.78  
0.36  
10.16  
8.25  
b2  
c
1.52  
E1  
0.25  
D
9.27  
E
7.87  
e
2.54 BSC  
6.35  
E1  
eB  
L
6.10  
7.87  
2.92  
7.11  
10.92  
3.80  
PIN # 1  
IDENTIFICATION  
3.30  
D
TOP VIEW  
E
A2  
A1  
A
c
b2  
L
eB  
e
b
SIDE VIEW  
END VIEW  
Notes:  
(1) All dimensions are in millimeters.  
(2) Complies with JEDEC Specification MS-001.  
Doc. No. MD-2002 Rev. O  
6
© 2009 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
CAT5112  
(1)(2)  
SOIC 8-LEAD Narrow Body (150 mil) (V)  
SYMBOL  
MIN  
NOM  
MAX  
1.75  
0.25  
0.51  
0.25  
5.00  
6.20  
4.00  
A
A1  
b
1.35  
0.10  
0.33  
0.19  
4.80  
5.80  
3.80  
c
E1  
E
D
E
E1  
e
1.27 BSC  
h
0.25  
0.40  
0º  
0.50  
1.27  
8º  
L
PIN # 1  
IDENTIFICATION  
θ
TOP VIEW  
D
h
A1  
θ
A
c
e
b
L
SIDE VIEW  
END VIEW  
Notes:  
(1) All dimensions are in millimeters. Angles in degrees.  
(2) Complies with JEDEC Specification MS-012.  
© 2009 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
7
Doc. No. MD-2002 Rev. O  
CAT5112  
TSSOP 8-Lead (Y) (1)(2)  
b
SYMBOL  
MIN  
NOM  
MAX  
1.20  
0.15  
1.05  
0.30  
0.20  
3.10  
6.50  
4.50  
A
A1  
A2  
b
0.05  
0.80  
0.19  
0.09  
2.90  
6.30  
4.30  
0.90  
c
D
3.00  
6.40  
E
E1  
E
E1  
e
4.40  
0.65 BSC  
1.00 REF  
0.60  
L
L1  
θ1  
0.50  
0°  
0.75  
8°  
e
TOP VIEW  
D
c
A2  
A1  
A
θ1  
L1  
L
SIDE VIEW  
END VIEW  
Notes:  
(1) All dimensions are in millimeters.  
(2) Complies with JEDEC Standard MO-153  
Doc. No. MD-2002 Rev. O  
8
© 2009 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
CAT5112  
MSOP 8-Lead (Z) (1)(2)  
SYMBOL  
MIN  
NOM  
MAX  
1.10  
0.15  
0.95  
0.38  
0.23  
3.10  
5.00  
3.10  
A
A1  
A2  
b
0.05  
0.75  
0.22  
0.13  
2.90  
4.80  
2.90  
0.10  
0.85  
c
D
3.00  
4.90  
E
E
E1  
E1  
e
3.00  
0.65 BSC  
0.60  
L
0.40  
0º  
0.80  
6º  
L1  
L2  
θ
0.95 REF  
0.25 BSC  
TOP VIEW  
D
A2  
A
DETAIL A  
A1  
e
b
c
SIDE VIEW  
END VIEW  
θ
L2  
L
L1  
DETAIL A  
Notes:  
(1) All dimensions are in millimeters. Angles in degrees.  
(2) Complies with JEDEC Specification MS-187.  
© 2009 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
9
Doc. No. MD-2002 Rev. O  
CAT5112  
EXAMPLE OF ORDERING INFORMATION (1)  
Prefix  
Device #  
Suffix  
CAT  
5112  
V
I
-10  
G(4) T3  
Optional  
Temperature Range  
Tape & Reel  
I = Industrial (-40ºC to 85ºC)  
T: Tape & Reel  
3: 3000/Reel  
Company ID  
Product Number  
Resistance  
-10: 10 kꢀ  
-50: 50 kꢀ  
-00: 100 kꢀ  
Lead Finish  
Blank: Matte-Tin  
G: NiPdAu  
5112  
Package  
L: PDIP  
V: SOIC  
Y: TSSOP  
Z: MSOP  
ORDERING INFORMATION  
Orderable Part Number  
CAT5112LI-10-G  
Resistance (k)  
Package-Pins Lead Finish (4)  
10  
50  
PDIP-8  
CAT5112LI-50-G  
CAT5112LI-00-G  
100  
10  
CAT5112VI-10-GT3  
CAT5112VI-50-GT3  
CAT5112VI-00-GT3  
CAT5112YI-10-GT3  
CAT5112YI-50-GT3  
CAT5112YI-00-GT3  
CAT5112ZI-10-GT3  
CAT5112ZI-50-GT3  
CAT5112ZI-00-GT3  
SOIC-8  
50  
100  
10  
NiPdAu  
TSSOP-8  
50  
100  
10  
MSOP-8  
50  
100  
Notes:  
(1) All packages are RoHS-compliant (Lead-free, Halogen-free).  
(2) The standard lead finish is NiPdAu.  
(3) This device used in the above example is a CAT5112VI-10-GT3 (SOIC, Industrial Temperature, 10 k, NiPdAu, Tape & Reel).  
(4) For Matte-Tin finish, contact factory.  
Doc. No. MD-2002 Rev. O  
10  
© 2009 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
 
CAT5112  
REVISION HISTORY  
Date  
Rev. Description  
10-Mar-07  
29-Mar-04  
12-Apr-04  
J
K
L
Updated Potentiometer Parameters  
Change Green Package marking for SOIC from W to V  
Update Reel Ordering Information  
Add Package Outline Drawings  
04-Jun-07  
M
Update Example of Ordering Information  
Add MD- to the Document Number  
Update Package Outline Drawings  
Change logo and fine print to ON Semiconductor  
20-Nov-08  
10-Jul-09  
N
O
Update Ordering Information table  
ON Semiconductor and  
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any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights  
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