CAT5113YI-50-G-T3
更新时间:2024-10-29 18:16:47
品牌:ONSEMI
描述:50K DIGITAL POTENTIOMETER, INCREMENT/DECREMENT CONTROL INTERFACE, 100 POSITIONS, PDSO8, 4.40 X 3 MM, HALOGEN FREE AND ROHS COMPLIANT, MO-153, TSSOP-8
CAT5113YI-50-G-T3 概述
50K DIGITAL POTENTIOMETER, INCREMENT/DECREMENT CONTROL INTERFACE, 100 POSITIONS, PDSO8, 4.40 X 3 MM, HALOGEN FREE AND ROHS COMPLIANT, MO-153, TSSOP-8 数字电位计
CAT5113YI-50-G-T3 规格参数
是否无铅: | 不含铅 | 是否Rohs认证: | 符合 |
生命周期: | Active | 零件包装代码: | TSSOP |
包装说明: | TSSOP, | 针数: | 8 |
Reach Compliance Code: | compliant | ECCN代码: | EAR99 |
HTS代码: | 8542.39.00.01 | 风险等级: | 5.16 |
Is Samacsys: | N | 其他特性: | NONVOLATILE MEMORY |
控制接口: | INCREMENT/DECREMENT | 转换器类型: | DIGITAL POTENTIOMETER |
JESD-30 代码: | R-PDSO-G8 | JESD-609代码: | e4 |
长度: | 4.4 mm | 湿度敏感等级: | 1 |
功能数量: | 1 | 位置数: | 100 |
端子数量: | 8 | 最高工作温度: | 85 °C |
最低工作温度: | -40 °C | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | TSSOP | 封装形状: | RECTANGULAR |
封装形式: | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH | 峰值回流温度(摄氏度): | NOT SPECIFIED |
认证状态: | Not Qualified | 电阻定律: | LINEAR |
最大电阻容差: | 20% | 最大电阻器端电压: | 6 V |
最小电阻器端电压: | 座面最大高度: | 1.2 mm | |
标称供电电压: | 3 V | 表面贴装: | YES |
标称温度系数: | 300 ppm/°C | 温度等级: | INDUSTRIAL |
端子面层: | Nickel/Palladium/Gold (Ni/Pd/Au) | 端子形式: | GULL WING |
端子节距: | 0.65 mm | 端子位置: | DUAL |
处于峰值回流温度下的最长时间: | NOT SPECIFIED | 标称总电阻: | 50000 Ω |
宽度: | 3 mm | Base Number Matches: | 1 |
CAT5113YI-50-G-T3 数据手册
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PDF下载CAT5113
100‐tap Digital
Potentiometer (POT)
Description
The CAT5113 is a single digital POT designed as an electronic
replacement for mechanical potentiometers. Ideal for automated
adjustments on high volume production lines, they are also well suited
for applications where equipment requiring periodic adjustment is
either difficult to access or located in a hazardous or remote
environment.
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The CAT5113 contains a 100-tap series resistor array connected
between two terminals R and R . An up/down counter and decoder
that are controlled by three input pins, determines which tap is
SOIC−8
V SUFFIX
CASE 751BD
MSOP−8
Z SUFFIX
CASE 846AD
H
L
connected to the wiper, R . The wiper setting, stored in nonvolatile
W
memory, is not lost when the device is powered down and is
automatically reinstated when power is returned. The wiper can be
adjusted to test new system values without affecting the stored setting.
Wiper-control of the CAT5113 is accomplished with three input
control pins, CS, U/D, and INC. The INC input increments the wiper
in the direction which is determined by the logic state of the U/D input.
The CS input is used to select the device and also store the wiper
position prior to power down.
PDIP−8
L SUFFIX
CASE 646AA
TSSOP−8
Y SUFFIX
CASE 948AL
PIN CONFIGURATIONS
The digital POT can be used as a three-terminal resistive divider or
as a two-terminal variable resistor.
1
V
CS
INC
U/D
CC
Features
R
R
GND
L
H
R
WB
100-position Linear Taper Potentiometer
Non-volatile EEPROM Wiper Storage
10 nA Ultra-low Standby Current
Single Supply Operation: 2.5 V − 6.0 V
Increment Up/Down Serial Interface
Resistance Values: 1 kW, 10 kW, 50 kW and 100 kW
Available in PDIP, SOIC, TSSOP and MSOP Packages
These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
Compliant
PDIP (L), SOIC (V), MSOP (Z)
1
R
CS
CC
INC
L
V
R
WB
GND
R
U/D
H
TSSOP (Y)
(Top Views)
PIN FUNCTION
Applications
Pin Name
INC
Function
Automated Product Calibration
Remote Control Adjustments
Offset, Gain and Zero Control
Tamper-proof Calibrations
Contrast, Brightness and Volume Controls
Motor Controls and Feedback Systems
Programmable Analog Functions
Increment Control
Up/Down Control
U/D
R
Potentiometer High Terminal
Ground
H
GND
R
W
Wiper Terminal
R
Potentiometer Low Terminal
Chip Select
L
CS
V
CC
Supply Voltage
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
Semiconductor Components Industries, LLC, 2013
1
Publication Order Number:
June, 2013 − Rev. 26
CAT5113/D
CAT5113
DEVICE MARKING INFORMATION
MSOP
PDIP
SOIC
TSSOP
RL4A
CAT5113VT
YMXXXX
RL4A
CAT5113LT
YMXXXX
AARR
YMP
A3RL
4YMXXX
R = Resistance:
0 = 1 kW
2 = 10 kW
4 = 50 kW
5 = 100 kW
L = Assembly Location
4 = Lead Finish − NiPdAu
A = Product Revision (Fixed as “A”)
CAT5113L = Device Code (PDIP)
CAT5113V = Device Code (SOIC)
T = Temperature Range (Industrial)
Y = Production Year (Last Digit)
M = Production Month (1−9, A, B, C)
AARR = CAT5113ZI−10−T3
AARC = CAT5113ZI−50−T3
AARG = CAT5113ZI−00−T3
Y = Production Year (Last Digit)
M = Production Month (1−9, A, B, C)
P = Product Revision
A3 = Device Code
R = Resistance:
2 = 10 kW
4 = 50 kW
5 = 100 kW
L = Assembly Location
4 = Lead Finish − NiPdAu
Y = Production Year (Last Digit)
M = Production Month (1−9, A, B, C)
XXX = Last Three Digits of
XXX = Assembly Lot Number
XXXX = Last Four Digits of Assembly Lot Number
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2
CAT5113
Functional Diagram
R
5−Bit
H
31
30
U/D
INC
CS
R
H
R
W
R
L
Up/Down
Counter
V
CC
R
R
R
29
28
1 of 32
Decoder
H
U/D
5−Bit
Nonvolatile
Memory
Control
Transfer Resistor
Gates Array
INC
CS
and
W
Memory
Power On
Recall
2
Store and
Recall
L
1
0
V
CC
Control
Circuitry
GND
GND
R
R
L
W
Figure 1. General
Figure 2. Detailed
Device Operation
Figure 3. Electronic
Potentiometer
Implementation
Pin Description
The CAT5113 operates like a digitally controlled
INC: Increment Control Input
potentiometer with R and R equivalent to the high and low
H
L
The INC input moves the wiper in the up or down direction
determined by the condition of the U/D input.
terminals and
R
W
equivalent to the mechanical
potentiometer’s wiper. There are 100 available tap positions
including the resistor end points, R and R . There are 99
U/D: Up/Down Control Input
H
L
The U/D input controls the direction of the wiper movement.
When in a high state and CS is low, any high−to−low
transition on INC will cause the wiper to move one
resistor elements connected in series between the R and R
terminals. The wiper terminal is connected to one of the 100
H
L
taps and controlled by three inputs, INC, U/D and CS. These
inputs control a seven−bit up/down counter whose output is
decoded to select the wiper position. The selected wiper
position can be stored in nonvolatile memory using the INC
and CS inputs.
increment toward the R terminal. When in a low state and
H
CS is low, any high-to-low transition on INC will cause the
wiper to move one increment towards the R terminal.
L
R : High End Potentiometer Terminal
H
With CS set LOW the CAT5113 is selected and will
respond to the U/D and INC inputs. HIGH to LOW
transitions on INC will increment or decrement the wiper
(depending on the state of the U/D input and seven-bit
counter). The wiper, when at either fixed terminal, acts like
its mechanical equivalent and does not move beyond the last
position. The value of the counter is stored in nonvolatile
memory whenever CS transitions HIGH while the INC input
is also HIGH. When the CAT5113 is powered-down, the last
stored wiper counter position is maintained in the
nonvolatile memory. When power is restored, the contents
of the memory are recalled and the counter is set to the value
stored.
R
is the high end terminal of the potentiometer. It is not
H
required that this terminal be connected to a potential greater
than the R terminal. Voltage applied to the R terminal
cannot exceed the supply voltage, V or go below ground,
L
H
CC
GND.
R : Wiper Potentiometer Terminal
W
R
is the wiper terminal of the potentiometer. Its position on
W
the resistor array is controlled by the control inputs, INC,
U/D and CS. Voltage applied to the R terminal cannot
exceed the supply voltage, V or go below ground, GND.
W
CC
R : Low End Potentiometer Terminal
L
R is the low end terminal of the potentiometer. It is not
L
With INC set low, the CAT5113 may be de-selected and
powered down without storing the current wiper position in
nonvolatile memory. This allows the system to always
power up to a preset value stored in nonvolatile memory.
required that this terminal be connected to a potential less
than the R terminal. Voltage applied to the R terminal
cannot exceed the supply voltage, V or go below ground,
GND. R and R are electrically interchangeable.
H
L
CC
L
H
CS: Chip Select
The chip select input is used to activate the control input of
the CAT5113 and is active low. When in a high state, activity
on the INC and U/D inputs will not affect or change the
position of the wiper.
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3
CAT5113
Table 1. OPERATION MODES
INC
High to Low
High to Low
High
CS
Low
U/D
High
Low
X
Operation
Wiper toward H
Low
Wiper toward L
Low to High
Low to High
High
Store Wiper Position
No Store, Return to Standby
Standby
Low
X
X
X
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameters
Ratings
Units
Supply Voltage
V
V
to GND
−0.5 to +7
CC
Inputs
V
CS to GND
INC to GND
U/D to GND
H to GND
−0.5 to V +0.5
CC
−0.5 to V +0.5
V
V
CC
−0.5 to V +0.5
CC
−0.5 to V +0.5
V
CC
L to GND
−0.5 to V +0.5
V
CC
W to GND
−0.5 to V +0.5
V
CC
Operating Ambient Temperature
Commercial (‘C’ or Blank suffix)
C
0 to 70
−40 to +85
+150
Industrial (‘I’ suffix)
Junction Temperature
Storage Temperature
Lead Soldering (10 s max)
C
C
C
C
−65 to 150
+300
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 3. RELIABILITY CHARACTERISTICS
Symbol
(Note 1)
Parameter
ESD Susceptibility
Latch-Up
Test Method
Min
2000
Typ
Max
Units
V
V
MIL−STD−883, Test Method 3015
JEDEC Standard 17
ZAP
I
(Notes 1, 2)
100
mA
LTH
T
Data Retention
Endurance
MIL−STD−883, Test Method 1008
MIL−STD−883, Test Method 1003
100
Years
Stores
DR
N
1,000,000
END
1. This parameter is tested initially and after a design or process change that affects the parameter.
2. Latch-up protection is provided for stresses up to 100 mA on address and data pins from −1 V to V + 1 V
CC
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4
CAT5113
Table 4. DC ELECTRICAL CHARACTERISTICS (V = +2.5 V to +6 V unless otherwise specified)
CC
Symbol
Parameter
Conditions
Min
Typ
Max
Units
POWER SUPPLY
V
I
Operating Voltage Range
Supply Current (Increment)
2.5
–
–
–
6.0
100
50
V
CC
V
V
= 6 V, f = 1 MHz, I = 0
mA
mA
mA
mA
mA
CC1
CC2
CC
W
= 6 V, f = 250 kHz, I = 0
–
–
CC
W
I
Supply Current (Write)
Programming, V = 6 V
–
–
1000
500
1
CC
V
CC
= 3 V
–
–
I
(Note 3)
Supply Current (Standby)
CS = V − 0.3 V
U/D, INC = V − 0.3 V or GND
–
0.01
SB1
CC
CC
LOGIC INPUTS
I
Input Leakage Current
V
V
= V
CC
–
–
–
–
–
–
10
mA
mA
V
IH
IN
I
Input Leakage Current
= 0 V
−10
IL
IN
V
IH2
CMOS High Level Input Voltage
CMOS Low Level Input Voltage
2.5 V V 6 V
V
CC
x 0.7
V
+ 0.3
CC
CC
V
−0.3
V
x 0.2
V
IL2
CC
POTENTIOMETER CHARACTERISTICS
R
Potentiometer Resistance
−01 Device
−10 Device
−50 Device
−00 Device
1
kW
POT
10
50
100
Pot. Resistance Tolerance
20
%
V
V
RH
Voltage on R pin
0
0
V
CC
CC
H
V
RL
Voltage on R pin
V
V
L
Resolution
1
%
INL
Integral Linearity Error
Differential Linearity Error
Wiper Resistance
I
I
2 mA
2 mA
0.5
0.25
1
LSB
LSB
W
W
DNL
0.5
400
1000
4.4
W
R
WI
V
= 5 V, I = 1 mA
W
CC
CC
V
= 2.5 V, I = 1 mA
W
W
I
W
Wiper Current
(Note 4)
−4.4
mA
TC
TC of Pot Resistance
Ratiometric TC
300
ppm/C
ppm/C
nV/Hz
pF
RPOT
RATIO
TC
20
V
Noise
100 kHz / 1 kHz
8/24
8/8/25
1.7
N
C /C /C
H
Potentiometer Capacitances
Frequency Response
L
W
fc
Passive Attenuator, 10 kW
MHz
3. Latch-up protection is provided for stresses up to 100 mA on address and data pins from −1 V to V + 1 V
CC
4. This parameter is not 100% tested.
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5
CAT5113
Table 5. AC TEST CONDITIONS
V
CC
Range
2.5 V V 6 V
CC
Input Pulse Levels
0.2 V to 0.7 V
CC
CC
Input Rise and Fall Times
Input Reference Levels
10 ns
0.5 V
CC
Table 6. AC OPERATING CHARACTERISTICS (V = +2.5 V to +6.0 V, V = V , V = 0 V, unless otherwise specified)
CC
H
CC
L
Symbol
Parameter
Min
100
50
100
250
250
1
Typ (Note 5)
Max
−
Units
ns
t
CI
t
DI
t
ID
CS to INC Setup
U/D to INC Setup
U/D to INC Hold
INC LOW Period
INC HIGH Period
−
−
−
−
−
−
−
−
1
−
−
–
5
−
ns
−
ns
t
−
ns
IL
IH
IC
t
t
−
ns
INC Inactive to CS Inactive
CS Deselect Time (NO STORE)
CS Deselect Time (STORE)
−
ms
t
t
100
10
−
−
ns
CPH
CPH
−
ms
ms
t
IW
INC to V
Change
5
OUT
t
INC Cycle Time
1
−
ms
CYC
t , t (Note 6) INC Input Rise and Fall Time
−
500
1
ms
R
F
t
(Note 6)
Power-up to Wiper Stable
Store Cycle
–
ms
ms
PU
t
–
10
WR
5. Typical values are for T = 25C and nominal supply voltage.
A
6. This parameter is periodically sampled and not 100% tested.
7. MI in the A.C. Timing diagram refers to the minimum incremental change in the W output due to a change in the wiper position.
CS
(store)
t
CYC
t
t
IC
CPH
t
CI
t
IL
t
IH
90%
90%
10%
INC
U/D
t
DI
t
ID
t
F
t
R
(3)
t
IW
MI
R
W
Figure 4. A.C. Timing
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6
CAT5113
APPLICATIONS INFORMATION
(a) resistive divider
(b) variable resistance
(c) two−port
Figure 5. Potentiometer Configuration
Applications
3
2
V (−)
+
–
1
R
R
4
3
+5 V
1
+5 V
8
R
1
2
1
7
R
R
A
6
+5 V
+5 V
4
8
1
pR
POT
8
7
4
R
–
+
A
9
10
2
2
1
7
3
5
3
5
4
R
(1−p)R
V
1
POT
O
3
8
R
2
11
B
555
4
R
2
R
–
+
R
3
4
6
CAT5113/5114
6
5
+2.5 V
7
V (+)
2
2
0.01 mF
0.003 mF
1
C
0.01 mF
A = A = A = / LM6064
1
2
3
4
R = R = R = 5 kW
2
3
4
R
= 10 kW
POT
Figure 6. Programmable Instrumentation
Amplifier
Figure 7. Programmable Sq. Wave Oscillator (555)
IC3A
6
–
+
V
REF
= 1 V
1
/ 74HC132
7
4
OSC
+5 V
8
5
+200 mV
20 kW
IC1B
2
1
7
10 kW
+
–
499 kW
V
CORR
4
0.01 mF
499 kW
+5 V
4
CS
2
3
–
CAT5111/5112
IC2
1
V
OUT
= 1 V 1 mV
+
IC1A
11
−5 V
499 kW
499 kW
= 1 V 50 mV
V
SENSOR
Figure 8. Sensor Auto Referencing Circuit
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7
CAT5113
+5 V
8
100 kW
2
1
7
CAT5113/5114
V
OUT
V
O
(REG)
4
R
V
(UNREG)
1
IN
2952
6.8 mF
11 kW 0.1 mF
(1−p)R
330 W
pR
SHUTDOWN
1.23 V
1 MW
330 W
SD
FB
GND
6
3
R
820 W
2
5
1 mF
+5 V
7
+5 V
7
+5 V
8
2
2
3
2
3
10 k
–
+
–
+
A
A
1
2
3
V
O
1
7
6
6
R
10 kW
6
3
I
S
4
5
4
CAT5113/5114
4
LT1097
+2.5 V
Figure 9. Programmable Voltage Regulator
Figure 10. Programmable I to V Converter
+5 V
IC1
393
IC2
74HC132
R
R
V
LL
1
3
2
–
+
1
7
OSC
CLO
C
1
3
6
R3
0.001 mF
R
100 kW
2
C
1 mF
2
–
+
R1
+5 V
2
CHI
10 kW
V
7
S
–
0.1 mF
50 kW
0.001 mF
V
O
+5 V
5
+5 V
V
UL
6
+
R2
4
8
3
A
2
1
7
1
10 kW
+5 V
IC3
CAT5111/5112
+2.5 V
+5 V
8
6
3
CAT5113/5114
4
5
2
–
+
10 kW
1
7
V
O
Figure 12. Programmable Bandpass Filter
0 V 2.5 V
O
AI
IC4
4
+2.5 V
0 V 2.5 V
V
S
S
Figure 11. Automatic Gain Control
R
1
100 kW
+5 V
+5 V
R
1
–
+
Serial
Bus
+5 V
100 kW
V
S
2
3
R
4
–
+
2.5 kW
I
S
1
+2.5 V
11
R
1
CAT5111/5112
100 kW
R
1
100 kW
+
5
6
7
+2.5 V
A = A = LMC6064A
–
A
2
1
2
Figure 13. Programmable Current Source/Sink
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8
CAT5113
Table 7. ORDERING INFORMATION
†
Orderable Part Number
CAT5113LI−01−G
Resistance (kW)
Lead Finish
Package−Pins
Shipping
1
10
50
100
1
CAT5113LI−10−G
PDIP−8
(Pb-Free)
NiPdAu
50 Units / Rail
CAT5113LI−50−G
CAT5113LI−00−G
CAT5113VI−01−GT3
CAT5113VI−10−GT3
CAT5113VI−50−GT3
CAT5113VI−00−GT3
CAT5113YI−01−GT3
CAT5113YI−10−GT3
CAT5113YI−50−GT3
CAT5113YI−00−GT3
CAT5113ZI−01−T3
CAT5113ZI−10−T3
CAT5113ZI−50−T3
CAT5113ZI−00−T3
10
50
100
1
SOIC−8
(Pb-Free)
NiPdAu
NiPdAu
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
10
50
100
1
TSSOP−8
(Pb-Free)
10
50
100
MSOP−8
(Pb-Free)
Matte-Tin
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
8. All packages are RoHS-compliant (Pb-Free, Halogen-Free).
9. The standard lead finish is NiPdAu, except MSOP package is Matte-Tin.
10.Contact factory for Matte-Tin finish availability for PDIP, SOIC and TSSOP packages.
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9
CAT5113
PACKAGE DIMENSIONS
PDIP−8, 300 mils
CASE 646AA
ISSUE A
SYMBOL
MIN
NOM
MAX
A
5.33
A1
A2
b
0.38
2.92
0.36
3.30
0.46
1.52
0.25
9.27
4.95
0.56
1.78
0.36
10.16
b2
c
1.14
0.20
9.02
E1
D
E
E1
e
7.62
6.10
7.87
6.35
8.25
7.11
2.54 BSC
7.87
2.92
10.92
3.80
eB
L
PIN # 1
IDENTIFICATION
3.30
D
TOP VIEW
E
A2
A1
A
c
b2
L
eB
e
b
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters.
(2) Complies with JEDEC MS-001.
http://onsemi.com
10
CAT5113
PACKAGE DIMENSIONS
SOIC 8, 150 mils
CASE 751BD
ISSUE O
SYMBOL
MIN
NOM
MAX
1.35
A
A1
b
1.75
0.25
0.51
0.25
0.10
0.33
0.19
c
E1
E
D
E
E1
e
4.80
5.80
3.80
5.00
6.20
4.00
1.27 BSC
h
0.25
0.40
0º
0.50
1.27
8º
L
PIN # 1
IDENTIFICATION
θ
TOP VIEW
D
h
A1
θ
A
c
e
b
L
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MS-012.
http://onsemi.com
11
CAT5113
PACKAGE DIMENSIONS
MSOP 8, 3x3
CASE 846AD
ISSUE O
SYMBOL
MIN
NOM
MAX
A
A1
A2
b
1.10
0.15
0.95
0.38
0.23
3.10
5.00
3.10
0.05
0.75
0.22
0.13
2.90
4.80
2.90
0.10
0.85
c
D
3.00
4.90
E
E1
E
E1
e
3.00
0.65 BSC
0.60
L
0.40
0.80
L1
L2
θ
0.95 REF
0.25 BSC
0º
6º
TOP VIEW
D
A2
A
DETAIL A
A1
e
b
c
SIDE VIEW
END VIEW
q
L2
Notes:
L
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-187.
L1
DETAIL A
http://onsemi.com
12
CAT5113
PACKAGE DIMENSIONS
TSSOP8, 4.4x3
CASE 948AL
ISSUE O
b
SYMBOL
MIN
NOM
MAX
A
A1
A2
b
1.20
0.15
1.05
0.30
0.20
3.10
6.50
4.50
0.05
0.80
0.19
0.09
2.90
6.30
4.30
0.90
E
c
E1
D
3.00
6.40
E
E1
e
4.40
0.65 BSC
1.00 REF
0.60
L
L1
0.50
0.75
0º
8º
θ
e
TOP VIEW
D
c
A2
A
q1
A1
L1
L
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-153.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
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CAT5113/D
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