CAT824YTDI-GT3 [ONSEMI]

System Supervisory Voltage Reset with Watchdog and Manual Reset; 系统监控电压复位与看门狗和手动复位
CAT824YTDI-GT3
型号: CAT824YTDI-GT3
厂家: ONSEMI    ONSEMI
描述:

System Supervisory Voltage Reset with Watchdog and Manual Reset
系统监控电压复位与看门狗和手动复位

光电二极管 监控
文件: 总15页 (文件大小:127K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
CAT823, CAT824, CAT825  
System Supervisory Voltage Reset with  
Watchdog and Manual Reset  
FEATURES  
DESCRIPTION  
The CAT823, CAT824, and CAT825 provide basic  
reset and monitoring functions for the electronic  
systems. Each device monitors the system voltage  
and maintains a reset output until that voltage reaches  
the device’s specified trip value and then maintains  
the reset output active condition until the device’s  
internal timer, after a minimum timer of 140ms; to  
allow the systems power supply to stabilize.  
n Automatically restarts microprocessor after  
Power failure  
n Monitors pushbutton for external override  
n Accurate under voltage system monitoring  
n Brownout detection system reset for use with  
3.0, 3.3, and 5.0 volt systems  
n Pin and function compatible with the  
MAX823/24/25 products  
The CAT823 and CAT824 also have a watchdog input  
which can be used to monitor a system signal and  
cause a reset to be issued if the signal fails to change  
state prior to a timeout condition.  
n Operating Range from -40°C to +85°C  
n Available in TSOT-23 5-lead and SC-70 packages  
For Ordering Information details, see page 13 & 14.  
The CAT823 and CAT825 also provide a manual  
reset input which can be used to initiate reset if pulled  
low. This input can be directly attached to a push-  
button or a processor signal.  
APPLICATIONS  
n Microprocessor and Microcontroller based  
systems  
n Intelligent Instruments  
n Control Systems  
n Critical µP Monitors  
n Portable Equipment  
PIN FUNCTIONS  
PIN CONFIGURATION  
Pin Name Function  
TSOT-23 5-Lead  
SC-70 5-Lead  
CMOS Push-Pull Active Low Reset  
¯¯¯¯¯¯  
RESET  
Output  
1
2
5
4
1
2
5
4
RESET  
GND  
V
RESET  
GND  
V
CC  
CC  
GND  
Ground  
CAT823  
CAT824  
Manual Reset input – Pulled high  
Internally by a 52kΩ resistor designed  
to be driven low by a mechanical  
pushbutton, open drain output or CMOS  
output.  
3
3
WDI  
WDI  
MR  
RESET  
¯¯¯  
MR  
CMOS Push-Pull Active High Reset  
Output  
RESET  
1
5
V
RESET  
CC  
2
3
CAT825  
Watchdog Timer Input – Designed to be  
driven by a processor output or can be  
disabled by tri-stating or leaving open.  
GND  
WDI  
VCC  
4
MR  
RESET  
Power Supply  
© 2010 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
1
Doc. No. MD-3027, Rev. D  
CAT823, CAT824, CAT825  
BLOCK DIAGRAM  
V
CC  
TIMEOUT  
COMPARATOR  
LEVEL SENSE  
&
WDI*  
TIMER  
RESET  
V
CC  
DIGITAL  
DELAY  
TOLERANCE  
BIAS  
+
V
CC  
V
CC  
V
CC  
VOLTAGE  
REFERENCE  
RESET*  
52kΩ  
LEVEL SENSE  
&
MR*  
DEBOUNCE  
* Functions Available by Device  
¯¯¯¯¯¯  
RESET  
¯¯¯  
MR  
Device  
RESET  
WDI  
CAT823  
CAT824  
CAT825  
x
x
x
x
x
x
x
x
x
Doc. No. MD-3027, Rev. D  
2
© 2010 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
CAT823, CAT824, CAT825  
ABSOLUTE MAXIMUM RATINGS(1)  
Parameters  
Ratings  
Units  
V
Supply Voltage  
All other pins  
6
-0.3 to (VCC + 0.3)  
V
Input Current, VCC  
20  
20  
mA  
mA  
¯¯¯¯¯¯  
Output Current RESET, RESET  
Continuous Power Dissipations (TA = +70ºC)  
SC-70 5-lead (derate 3.1mW/ºC above +70ºC)  
TSOT-23 5-lead (derate 7.1mW/ºC above +70ºC)  
Storage Temperature  
247  
571  
mW  
mW  
ºC  
-65 to 150  
-40 to +85  
+300  
Operating Ambient Temperature  
ºC  
Lead Soldering (10 seconds max)  
ºC  
ESD Rating: Low Voltage Pins  
Human Body Model  
2000  
200  
V
V
Machine Model  
RECOMMENDED OPERATING CONDITIONS  
Parameter  
Range  
1.0 to 5.5  
Units  
V
VCC (TA = 0ºC to +70ºC)  
VCC (TA = -40ºC to +85ºC)  
All Other Pins  
1.2 to 5.5  
V
-0.1 to (VCC + 0.1)  
-40 to +85  
V
Ambient Temperature  
ºC  
Notes:  
(1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this  
specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.  
© 2010 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
3
Doc. No. MD-3027, Rev. D  
 
CAT823, CAT824, CAT825  
ELECTRICAL OPERATING CHARACTERISTICS  
DC Characteristics: VCC = 3.0V to 5.5V for L/M versions; VCC = 2.0V to 3.6V for the R/S/T/Y/Z version,  
-40ºC ≤ T A ≤ +85ºC unless otherwise noted. Typical Values at TA = 25ºC and VCC = 5V for L/M versions;  
V
CC = 3.3V for the T/S versions; VCC = 3.0V for the R version; and VCC = 2.5V for the Y/Z versions.(1)  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Units  
CAT823 (L/M Versions)  
CAT824 (L/M Versions)  
6
17  
µA  
CAT823 (R/S/T/Y/Z Versions)  
CAT824 (R/S/T/Y/Z Versions)  
4
12  
µA  
ICC  
Supply Current  
CAT825 (L/M Versions)  
3
2
8
6
µA  
µA  
V
CAT825 (R/S/T/Y/Z Versions)  
CAT82_L at -40ºC ≤ TA ≤ +85ºC  
CAT82_M at -40ºC ≤ TA ≤ +85ºC  
CAT82_T at -40ºC ≤ TA ≤ +85ºC  
CAT82_S at -40ºC ≤ TA ≤ +85ºC  
CAT82_R at -40ºC ≤ TA ≤ +85ºC  
CAT82_Z at -40ºC ≤ TA ≤ +85ºC  
CAT82_Y at -40ºC ≤ TA ≤ +85ºC  
4.50  
4.25  
3.00  
2.85  
2.55  
2.25  
2.13  
4.63 4.75  
4.38 4.50  
3.08 3.15  
2.93 3.00  
2.63 2.70  
2.32 2.38  
2.19 2.25  
V
V
VRST  
Reset Threshold  
V
V
V
V
Reset Threshold  
Tempco  
40  
ppm/ºC  
CAT82_L/M  
10  
5
mV  
mV  
µs  
Reset Threshold  
Hysteresis  
CAT82_R/S/T/Y/Z  
VCC to Reset Delay(2) VCC = VTH to (VTH - 100mV)  
tRD  
tRP  
20  
Reset Active  
Timeout Period  
140  
200  
400  
ms  
CAT82_L/M, VCC = VRST max  
ISOURCE = -120µA  
,
VCC - 1.5V  
0.8 x VCC  
¯¯¯¯¯¯  
Voltage  
RESET Output High  
VOH  
CAT82_T/S/R/Z/Y, VCC = VRST max  
ISOURCE = -30µA  
,
CAT82_L/M, VCC = VRST min  
ISINK = 3.2mA  
,
0.4  
0.3  
0.3  
0.3  
V
CAT82_T/S/R/Z/Y, VCC = VRST min  
ISINK = 1.2mA  
,
¯¯¯¯¯¯  
Voltage  
RESET Output Low  
VOL  
TA = 0ºC to +70ºC, VCC = 1V,  
VCC falling, ISINK = 50µA  
TA = TMIN to TMAX, VCC = 1.2V,  
VCC falling, ISINK = 100µA  
CAT82_L/M, Reset = 0V, VCC = 5.5V  
CAT82_L/M, Reset = 0V, VCC = 3.6V  
VCC > 1.8V, ISOURCE = -150µA  
1.5  
0.8  
¯¯¯¯¯¯  
Short-Circuit Current  
RESET Output  
ISOURCE  
VOH  
mA  
V
0.8 x VCC  
CAT824L/M & CAT825L/M,  
VCC = VRST max, ISINK = 3.2mA  
Reset Output  
Voltage  
0.4  
0.3  
VOL  
CAT824R/S/T/Y/Z & CAT825R/S/T/Y/Z,  
VCC = VRST max, ISINK = 1.2mA  
Notes:  
(1) Over-temperature limits are guaranteed by design and not production tested.  
(2) The RESET short-circuit current is the maximum pull-up current when reset is driven low by a bidirectional output.  
Doc. No. MD-3027 Rev. D  
4
© 2010 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
 
 
CAT823, CAT824, CAT825  
ELECTRICAL OPERATING CHARACTERISTICS (continued)  
DC Characteristics: VCC = 3.0V to 5.5V for L/M versions; VCC = 2.0V to 3.6V for the R/S/T/Y/Z version,  
-40ºC ≤ T A ≤ +85ºC unless otherwise noted. Typical Values at TA = 25ºC and VCC = 5V for L/M versions;  
VCC = 3.3V for the T/S versions; VCC = 3.0V for the R version; and VCC = 2.5V for the Y/Z versions.  
Symbol Parameter  
WATCHDOG INPUT (CAT823 & CAT824)  
Conditions  
Min  
Typ  
Max  
3.20  
Units  
tWD  
tWDI  
VIL  
Watchdog Timeout Period  
WDI Pulse Width  
1.12  
50  
1.60  
s
VIL = 0.4V, VIH = 0.8 x VCC  
ns  
0.3 x VCC  
160  
WDI Input Voltage(3)  
V
VIH  
0.7 x VCC  
-20  
WDI = VCC, Time Average  
WDI = 0V, Time Average  
120  
-15  
WDI Input Current(4)  
µA  
MANUAL RESET INPUT(CAT823 & CAT825)  
VIL  
0.3 x VCC  
¯¯¯  
V
MR Input Voltage  
VIH  
0.7 x VCC  
1
¯¯¯  
tPB  
µs  
µs  
ns  
kΩ  
MR Pulse Width  
¯¯¯  
tPDLY  
5
MR low to Reset Delay  
¯¯¯  
Pulse Width with No Reset  
100  
52  
MR Noise Immunity  
¯¯¯  
35  
75  
MR Pullup Resistance (internal)  
Notes:  
(3) WDI is internally serviced within the watchdog period if WDI is left open.  
(4) The WDI input current is specified as an average input current when the WDI input is driven high or low. The WDI input if connected to a  
three-stated output device can be disabled in the tristate mode as long as the leakage current is less than 10µA and a maximum  
capacitance of less than 200pF. To clock the WDI input in the active mode the drive device must be able to source or sink at least 200µA  
when active.  
© 2010 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
5
Doc. No. MD-3027, Rev. D  
 
 
CAT823, CAT824, CAT825  
TYPICAL ELECTRICAL OPERATING CHARACTERISTICS  
Normalized Reset Threshold  
Voltage vs. Temperature  
VCC Supply Current vs. Temperature  
9
8
7
6
5
4
3
2
1
1.06  
1.04  
1.02  
1.00  
0.98  
0.96  
0.94  
-40 -20  
0
20  
40  
60  
80 100  
-40 -20  
0
20 40 60 80 100 120  
TEMPERATURE (°C)  
TEM PERATURE (ºC)  
Doc. No. MD-3027 Rev. D  
6
© 2010 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
CAT823, CAT824, CAT825  
FUNCTIONAL DESCRIPTION  
MANUAL RESET  
The CAT823 and CAT825 each have a Manual Reset  
¯¯¯  
PROCESSOR RESET  
The CAT823-825 detect supply voltage (VCC)  
conditions that are below the specified voltage trip  
value (VRST) and provide a reset output to maintain  
(MR) input to allow for alternative control of the reset  
¯¯¯  
outputs. The MR input is designed for direct con-  
¯¯¯  
nection to a pushbutton (see Figure 1). The MR input  
¯¯¯¯¯¯  
correct system operation. On power-up, RESET (and  
is internally pulled up by 52kΩ resistor and must be  
pulled low to cause the reset outputs to go active.  
Internally, this input is debounced and timed such that  
RESET if available) are kept active for a minimum  
delay tRP of 140ms after the supply voltage (VCC) rises  
above VRST to allow the power supply and processor  
to stabilize. When VCC drops below the voltage trip  
value (VRST), the reset output signals RESET (and  
RESET) are pulled active. RESET (and RESET if  
available) is specifically designed to provide the reset  
input signals for processors. This provides reliable  
and consistent operation as power is turned on, off or  
during brownout conditions by maintaining the  
processor operation in known conditions.  
¯¯¯¯¯¯  
RESET (and RESET) signals of at least 140ms  
minimum will be generated. The min 140ms tRP delay  
commences as the Manual Reset input is released  
from the low level. (see Figure 2)  
¯¯¯¯¯¯  
¯¯¯¯¯¯  
Figure 1. Pushbutton RESET  
MR  
RESET  
GND  
Supply  
Voltage  
CAT825  
V
CC  
RESET  
Figure 2. Timing Diagram – Pushbutton RESET  
t
PB  
MR  
t
PDLY  
V
IH  
V
IL  
t
RP  
RESET  
RESET  
V
V
OH  
OL  
© 2010 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
7
Doc. No. MD-3027, Rev. D  
CAT823, CAT824, CAT825  
WATCHDOG TIMER  
The CAT823 and CAT824 provide a Watchdog input  
can be used to strobe the watchdog input. The most  
reliable is a dedicated I/O output transitioned by a  
specific software instruction.  
¯¯¯¯¯¯  
(WDI). The watchdog timer function forces RESET  
(and RESET in the CAT824) signals active when the  
WDI input does not have a transition from low-to-high  
or high-to-low within 1.12 seconds. Timeout of the  
The watchdog can be disabled by floating (or tri-  
stating) the WDI input (see Figure 4). If the watchdog  
is disabled the WDI pin will be pulled low for the first  
7/8th’s of the watchdog period (tWD) and pulled high for  
the last 1/8th of the watchdog period. This pulling low  
of the WDI input and then high is used to detect an  
open or tri-state condition and will continue to repeat  
until the WDI input is driven high or low.  
¯¯¯¯¯¯  
watchdog starts when RESET (RESET on the  
CAT824) becomes inactive. If a transition occurs on  
the WDI input pin prior to the watchdog time-out, the  
watchdog timer is reset and begins to time-out again.  
If the watchdog timer is allowed to time-out, then the  
reset output(s) will go active for tRP and once released  
will repeat the watchdog timeout process.  
Figure 3 below shows a typical implementation of a  
watchdog function. Any processor signal that repeats  
dependant on the normal operation of the processor  
or directed by the software operating on the processor  
For most efficient operation of devices with the  
watchdog function the WDI input should be held low  
the majority of the time and only strobed high as  
required to reset the watchdog timer.  
Figure 3. Watchdog Timer  
WDI  
MR  
PIC  
µC  
Supply  
Voltage  
GND  
RESET  
DECODER  
ADDRESS  
CAT823  
V
CC  
MCLR  
Figure 4. Watchdog Disable Circuit  
V
Tristate  
CC  
V
CC  
RESET  
GND  
150kΩ  
CAT823  
µC  
OUTPUT  
MR  
WDI  
110kΩ  
Doc. No. MD-3027 Rev. D  
8
© 2010 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
CAT823, CAT824, CAT825  
Figure 5. Timing Diagram – Strobe Input  
INVALID  
STROBE  
VALID  
STROBE  
INDETERMINATE  
STROBE  
WDI  
MIN.  
t
WD  
MAX.  
RESET  
Figure 6. Timing Diagram – Power Down  
V
CC  
V
(MAX)  
RST  
V
RST  
V
RST  
(MIN)  
t
RD  
RESET  
V
OH  
RESET Slews with V  
CC  
V
OL  
RESET (CAT824 & CAT825)  
Figure 7. Timing Diagram – Power Up  
V
(MAX)  
RST  
V
RST  
V
RST  
(MIN)  
V
CC  
t
RP  
RESET  
V
OH  
V
OL  
RESET (CAT824 & CAT825)  
RESET  
© 2010 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
9
Doc. No. MD-3027, Rev. D  
CAT823, CAT824, CAT825  
OUTPUT VALID CONDITIONS  
APPLICATION NOTES  
¯¯¯¯¯¯  
The RESET output uses a push-pull output which can  
µP’s with Bidirectional Reset Pins  
maintain a valid output down to a VCC of 1.0 volts. To  
sink current below 0.8V a resistor can be connected  
¯¯¯¯¯¯  
The RESET output can be pulled low by processors  
like the 68HC11 allowing for a system reset issued by  
the processor. The maximum pullup current that can  
be sourced by the CAT82_L/M is 1.5mA (and by the  
CAT82_T/R/S/Z/Y is 800µA) allowing the processor to  
pull the output low even when the CAT82x is pulling it  
high.  
¯¯¯¯¯¯  
from RESET to Ground (see Figure 8.)  
arrangement will maintain a valid value on the RESET  
output during both power up and down but will draw  
This  
¯¯¯¯¯¯  
¯¯¯¯¯¯  
current when the RESET output is in the high state. A  
resistor value of about 100kΩ should be adequate in  
most situations to maintain a low condition valid  
output down to VCC equal to 0V.  
Power Transients  
Generally short duration negative-going transients of  
less than 2µs on the power supply at VRST minimum  
will not cause a reset condition. However the lower  
the voltage of the transient the shorter the required  
time to cause a reset output. These issues can  
usually be remedied by the proper location of bypass  
capacitance on the circuit board.  
¯¯¯¯¯¯  
Figure 8. RESET Valid to 0 Volts VCC  
WDI  
MR  
100kΩ  
GND  
CAT823  
µC  
RESET  
V
CC  
RESET  
Doc. No. MD-3027 Rev. D  
10  
© 2010 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
CAT823, CAT824, CAT825  
PACKAGE OUTLINE DRAWINGS  
TSOT-23 5-Lead (TD)(1)(2)  
SYMBOL  
MIN  
NOM  
MAX  
1.00  
0.10  
0.90  
0.45  
0.20  
D
A
A1  
A2  
b
e
0.01  
0.80  
0.30  
0.12  
0.05  
0.87  
c
0.15  
D
2.90 BSC  
2.80 BSC  
1.60 BSC  
0.95TYP  
0.40  
E1  
E
E
E1  
e
L
0.30  
0º  
0.50  
8º  
L1  
L2  
θ
0.60 REF  
0.25 BSC  
TOP VIEW  
A2 A  
A1  
θ
L
b
c
L2  
L1  
SIDE VIEW  
END VIEW  
Notes:  
(1) All dimensions in millimeters. Angles in degrees.  
(2) Complies with JEDEC standard MO-193.  
© 2010 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
11  
Doc. No. MD-3027, Rev. D  
 
CAT823, CAT824, CAT825  
SC-70 5-Lead (SD)(1)(2)  
SYMBOL  
MIN  
NOM  
MAX  
1.10  
0.10  
1.00  
0.30  
0.18  
2.20  
2.40  
1.35  
D
A
A1  
A2  
b
0.80  
0.00  
0.80  
0.15  
0.10  
1.80  
1.80  
1.15  
e
e
c
D
2.00  
2.10  
E1  
E
E
E1  
e
1.25  
0.65 BSC  
0.36  
L
0.26  
0.46  
L1  
L2  
θ
0.42 REF  
0.15 BSC  
TOP VIEW  
0°  
4°  
8°  
θ1  
10°  
θ1  
A2  
A1  
A
θ
L
L1  
b
θ1  
c
L2  
SIDE VIEW  
END VIEW  
Notes:  
(1) All dimensions in millimeters. Angles in degrees.  
(2) Complies with JEDEC MO-203.  
Doc. No. MD-3027 Rev. D  
12  
© 2010 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
 
CAT823, CAT824, CAT825  
EXAMPLE OF ORDERING INFORMATION(1)  
Prefix  
Device #  
Suffix  
CAT  
823  
L
TD  
I
-G  
T3  
Product  
Number  
823  
Package  
TD: TSOT-23 5-Lead  
SD: SC-70 5-Lead  
Lead Finish  
G:NiPdAu  
Tape & Reel  
T: Tape & Reel  
3: 3,000/Reel  
Optional  
Company ID  
824  
825  
Reset Threshold  
Voltage  
Temperature Range  
I = Industrial (-40ºC to 85ºC)  
L: 4.63V  
M: 4.38V  
T: 3.08V  
S: 2.93V  
R: 2.63V  
Z: 2.32V  
Y: 2.19V  
TOP MARKING INFORMATION (FOR ALL THRESHOLDS)  
Device #  
CAT823  
CAT824  
CAT825  
CAT823  
CAT824  
CAT825  
Package  
TSOT-23  
TSOT-23  
TSOT-23  
SC-70  
Top Marking  
TS  
TB  
TD  
RG  
TB  
TD  
SC-70  
SC-70  
Notes:  
(1) All packages are RoHS-compliant (Lead-free, Halogen-free).  
(2) The standard lead finish is NiPdAu.  
(3) This device used in the above example is a CAT823LTDI -GT3 (4.63V, TSOT-23 5-Lead, Industrial Temperature, NiPdAu, Tape & Reel,  
3,000/Reel,  
(4) Contact factory for package availability.  
© 2010 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
13  
Doc. No. MD-3027, Rev. D  
 
CAT823, CAT824, CAT825  
ORDERING INFORMATION  
Inputs  
WDI  
Outputs  
Reset  
Device  
Package  
Threshold  
¯M¯R¯  
R¯¯E¯S¯E¯T¯ RESET  
CAT823LTDI-GT3  
CAT823MTDI-GT3  
CAT823TTDI-GT3  
CAT823STDI-GT3  
CAT823RTDI-GT3  
CAT823ZTDI-GT3  
CAT823YTDI-GT3  
CAT823LSDI-GT3  
CAT823MSDI-GT3  
CAT823TSDI-GT3  
CAT823SSDI-GT3  
CAT823RSDI-GT3  
CAT823ZSDI-GT3  
CAT823YSDI-GT3  
4.63V  
4.38V  
3.08V  
2.93V  
2.63V  
2.32V  
2.19V  
4.63V  
4.38V  
3.08V  
2.93V  
2.63V  
2.32V  
2.19V  
·
·
·
·
·
·
·
·
·
·
·
·
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·
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·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
TSOT-23-5  
SC-70-5  
CAT824LTDI-GT3  
CAT824MTDI-GT3  
CAT824TTDI-GT3  
CAT824STDI-GT3  
CAT824RTDI-GT3  
CAT824ZTDI-GT3  
CAT824YTDI-GT3  
CAT824LSDI-GT3  
CAT824MSDI-GT3  
CAT824TSDI-GT3  
CAT824SSDI-GT3  
CAT824RSDI-GT3  
CAT824ZSDI-GT3  
CAT824YSDI-GT3  
4.63V  
4.38V  
3.08V  
2.93V  
2.63V  
2.32V  
2.19V  
4.63V  
4.38V  
3.08V  
2.93V  
2.63V  
2.32V  
2.19V  
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
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·
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·
·
·
·
·
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·
·
·
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·
·
·
·
TSOT-23-5  
SC-70-5  
CAT825LTDI-GT3  
CAT825MTDI-GT3  
CAT825TTDI-GT3  
CAT825STDI-GT3  
CAT825RTDI-GT3  
CAT825ZTDI-GT3  
CAT825YTDI-GT3  
CAT825LSDI-GT3  
CAT825MSDI-GT3  
CAT825TSDI-GT3  
CAT825SDI-GT3  
CAT825RSDI-GT3  
CAT825ZSDI-GT3  
CAT825YSDI-GT3  
4.63V  
4.38V  
3.08V  
2.93V  
2.63V  
2.32V  
2.19V  
4.63V  
4.38V  
3.08V  
2.93V  
2.63V  
2.32V  
2.19V  
·
·
·
·
·
·
·
·
·
·
·
·
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TSOT-23-5  
SC-70-5  
Doc. No. MD-3027, Rev. D  
14  
© 2010 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
CAT823, CAT824, CAT825  
REVISION HISTORY  
Date  
Rev. Reason  
10-Sep-07  
A
Initial Release  
Update Package Outline Drawings  
Update Top Mark Information  
23-May-08  
B
5-Nov-08  
C
D
Change logo and fine print to ON Semiconductor  
Update Ordering Information Table  
01-July-10  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to  
any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer  
purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and  
distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated  
with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
N. American Technical Support: 800-282-9855 Toll Free  
USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
Japan Customer Focus Center:  
Phone: 81-3-5773-3850  
ON Semiconductor Website: www.onsemi.com  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada  
Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
Order Literature: http://www.onsemi.com/orderlit  
For additional information, please contact your local  
Sales Representative  
© 2010 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
15  
Doc. No. MD-3027, Rev. D  

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