CS8361YDWF16 [ONSEMI]

LDO 稳压器,5 V,双输出,微功耗,带重置和启用;
CS8361YDWF16
型号: CS8361YDWF16
厂家: ONSEMI    ONSEMI
描述:

LDO 稳压器,5 V,双输出,微功耗,带重置和启用

电源电路 线性稳压器IC
文件: 总8页 (文件大小:163K)
中文:  中文翻译
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CS8361  
5.0 V Dual Micropower  
Low Dropout Regulator  
with ENABLE and RESET  
The CS8361 is a precision Micropower dual voltage regulator with  
ENABLE and RESET.  
http://onsemi.com  
The 5.0 V standby output is accurate within 2% while supplying  
loads of 100 mA and has a typical dropout voltage of 400 mV.  
Quiescent current is low, typically 140 mA with a 300 mA load. The  
active RESET output monitors the 5.0 V standby output and is low  
during powerup and regulator dropout conditions. The RESET  
circuit includes hysteresis and is guaranteed to operate correctly with  
1.0 V on the standby output.  
The second output tracks the 5.0 V standby output through an  
external adjust lead, and can supply loads of 250 mA with a typical  
dropout voltage of 400 mV. The logic level ENABLE lead is used to  
control this tracking regulator output.  
Both outputs are protected against overvoltage, short circuit, reverse  
battery and overtemperature conditions. The robustness and low  
quiescent current of the CS8361 makes it not only well suited for  
automotive microprocessor applications, but for any battery powered  
microprocessor applications.  
SO16L  
DW SUFFIX  
CASE 751G  
2
D PAK7  
DPS SUFFIX  
CASE 936AB  
1
PIN CONNECTIONS AND  
MARKING DIAGRAM  
1
16  
V
IN  
V
STBY  
NC  
NC  
NC  
GND  
GND  
NC  
V
TRK  
GND  
GND  
Adj  
Features  
NC  
ENABLE  
NC  
RESET  
2 Regulated Outputs  
Standby Output 5.0 V 2%; 100 mA  
Tracking Output 5.0 V; 250 mA  
Low Dropout Voltage (0.4 V at Rated Current)  
RESET Option  
SO16L  
Pin 1. V  
STBY  
IN  
2. V  
3. V  
CS  
ENABLE Option  
Low Quiescent Current  
Protection Features  
TRK  
4. GND  
5. Adj  
6. ENABLE  
7. RESET  
8361  
AWLYWWG  
1
Independent Thermal Shutdown  
Short Circuit  
60 V Load Dump  
2
D PAK7  
CS8361 = Device Code  
A
= Assembly Location  
Reverse Battery  
WL  
YY  
WW  
G
= Wafer Lot  
= Year  
Internally Fused Leads in SO16L Package  
These are PbFree Devices  
= Work Week  
= PbFree Package  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 6 of this data sheet.  
*For additional information on our PbFree strategy  
and soldering details, please download the  
ON Semiconductor Soldering and Mounting  
Techniques Reference Manual, SOLDERRM/D.  
© Semiconductor Components Industries, LLC, 2009  
1
Publication Order Number:  
October, 2009 Rev. 17  
CS8361/D  
CS8361  
V
STBY  
V
IN  
5.0 V, 100 mA, 2.0%  
Overvoltage  
Shutdown  
Current  
Limit  
Bandgap  
BG  
RESET  
+
BG  
OVSD  
TSD OVSD  
V
IN  
V
TRK  
250 mA  
Current  
Limit  
Thermal  
Shutdown  
TSD  
Adj  
+
V
STBY  
ENABLE  
+
TSD OVSD  
BG  
RESET  
+
GND  
RESET  
Figure 1. Block Diagram. Consult Your Local Sales Representative for Positive ENABLE Option  
MAXIMUM RATINGS*  
Rating  
Value  
16 to 26  
60  
Unit  
V
Supply Voltage, V  
IN  
Positive Transient Input Voltage, tr > 1.0 ms  
V
Negative Transient Input Voltage, T < 100 ms, 1.0 % Duty Cycle  
Input Voltage Range (ENABLE, RESET)  
50  
V
0.3 to 10  
20  
V
Tracking Regulator (V  
, Adj)  
V
TRK  
Standby Regulator (V  
)
10  
V
STBY  
Junction Temperature  
40 to +150  
55 to +150  
2.0  
°C  
°C  
kV  
Storage Temperature Range  
ESD Susceptibility (Human Body Model)  
Lead Temperature Soldering  
Wave Solder (through hole styles only) Note 1  
Reflow (SMD styles only) Note 2  
260 peak  
230 peak  
°C  
°C  
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit  
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,  
damage may occur and reliability may be affected.  
1. 10 seconds max.  
2. 60 seconds max above 183°C  
*The maximum package power dissipation must be observed.  
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2
 
CS8361  
ELECTRICAL CHARACTERISTICS (6.0 V V 26 V, I  
= I = 100 mA, 40°C T +125°C,  
OUT2 A  
IN  
OUT1  
40°C T +150°C; unless otherwise stated.)  
J
Characteristic  
Test Conditions  
Min  
Typ  
Max  
Unit  
Tracking Output (V  
)
TRK  
V
TRK  
Tracking Error (V  
V  
6.0 V V 26 V, 100 mA I  
250 mA.  
25  
+25  
mV  
STBY  
TRK)  
IN  
TRK  
Note 3  
Adjust Pin Current, I  
Line Regulation  
Loop in Regulation  
1.5  
5.0  
5.0  
5.0  
50  
50  
mA  
mV  
mV  
Adj  
6.0 V V 26 V. Note 3  
IN  
Load Regulation  
100 mA I  
250 mA. Note 3  
TRK  
Dropout Voltage (V V  
)
I
I
= 100 mA.  
= 250 mA  
100  
400  
150  
700  
mV  
mV  
IN  
TRK  
TRK  
TRK  
Current Limit  
V
V
V
= 12 V, V  
= 4.5 V  
275  
500  
25  
50  
mA  
mA  
mA  
IN  
TRK  
Quiescent Current  
Reverse Current  
Ripple Rejection  
= 12 V, I  
= 250 mA, No Load on V  
IN  
TRK STBY  
= 5.0 V, V = 0 V  
200  
70  
1500  
TRK  
IN  
f = 120 Hz, I  
= 250 mA, 7.0 V V 17 V  
60  
dB  
TRK  
IN  
Standby Output (V  
)
STBY  
Output Voltage, V  
Line Regulation  
Load Regulation  
6.0 V V 26 V, 100 mA I 100 mA.  
STBY  
4.9  
5.0  
5.0  
5.0  
5.1  
50  
50  
V
STBY  
IN  
6.0 V V 26 V.  
mV  
mV  
IN  
100 mA I  
100 mA.  
STBY  
Dropout Voltage (V V  
)
I
I
= 100 mA.  
= 100 mA  
100  
400  
150  
600  
mV  
mV  
IN  
STBY  
STBY  
STBY  
Current Limit  
V
V
= 12 V, V  
= 12 V, V  
= 4.5 V  
= 0 V  
125  
10  
200  
100  
mA  
mA  
IN  
STBY  
STBY  
Short Circuit Current  
Quiescent Current  
IN  
V
IN  
V
IN  
= 12 V, I  
= 12 V, I  
= 100 mA, I  
= 300 mA, I  
= 0 mA  
TRK  
= 0 mA  
TRK  
10  
140  
20  
200  
mA  
mA  
STBY  
STBY  
Reverse Current  
Ripple Rejection  
V
= 5.0 V, V = 0 V  
100  
70  
200  
mA  
STBY  
IN  
f = 120 Hz, I  
= 100 mA, 7.0 V V 17 V  
60  
dB  
STBY  
IN  
RESET ENABLE Functions  
ENABLE Input Threshold  
ENABLE Input Bias Current  
0.8  
10  
4.59  
60  
1.2  
0
2.0  
10  
V
mA  
V
V
V
= 0 V to 10 V  
ENABLE  
RESET Threshold High (V  
RESET Hysteresis  
)
Increasing  
4.87  
120  
4.75  
V
0.02  
STBY  
RH  
STBY  
180  
0.08  
STBY  
mV  
V
RESET Threshold Low (V  
)
V
STBY  
Decreasing  
4.53  
V
RL  
RESET Leakage  
25  
0.4  
1.0  
mA  
V
Output Voltage, Low (V  
Output Voltage, Low (V  
)
1.0 V V  
V , R = 10 kW  
RST  
0.1  
0.6  
RLO  
STBY  
RL  
)
V
STBY  
, Power Up, Power Down  
V
RPEAK  
Protection Circuitry (Both Outputs)  
Independent Thermal Shutdown  
V
STBY  
V
TRK  
150  
150  
180  
165  
°C  
°C  
Overvoltage Shutdown  
30  
34  
38  
V
3. V  
connected to Adj lead. V  
can be set to higher values by using an external resistor divider.  
TRK  
TRK  
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3
 
CS8361  
PACKAGE PIN DESCRIPTION  
PACKAGE PIN #  
2
D PAK, 7 Pin  
SO16L  
PIN SYMBOL  
FUNCTION  
1
2
3
4
5
16  
V
Standby output voltage delivering 100 mA.  
Input voltage.  
STBY  
1
V
IN  
3
V
Tracking output voltage controlled by ENABLE delivering 250 mA.  
Reference ground connection.  
TRK  
4, 5, 12, 13  
6
GND  
Adj  
Resistor divider from V  
to Adj. Sets the output voltage on  
TRK  
TRK  
V
TRK  
. If tied to V  
, V  
will track V  
.
TRK  
STBY  
6
7
8
9
ENABLE  
RESET  
Provides on/off control of the tracking output, active LOW.  
CMOS compatible output lead that goes low whenever V  
out of regulation.  
falls  
STBY  
2, 7, 10, 11,  
14, 15  
NC  
No connection.  
CIRCUIT DESCRIPTION  
ENABLE Function  
VTRK Output Voltage  
The ENABLE function switches the output transistor for  
on and off. When the ENABLE lead voltage exceeds  
This output uses the same type of output device as V  
,
STBY  
V
but is rated for 250 mA. The output is configured as a  
tracking regulator of the standby output. By using the  
standby output as a voltage reference, giving the user an  
external programming lead (Adj lead), output voltages from  
5.0 V to 20 V are easily realized. The programming is done  
with a simple resistor divider (Figure 2), and following the  
formula:  
TRK  
1.4 V (Typ), V  
turns off. This input has several hundred  
TRK  
millivolts of hysteresis to prevent spurious output activity  
during powerup or powerdown.  
RESET Function  
The RESET is an open collector NPN transistor,  
controlled by a low voltage detection circuit sensing the  
V
+ V  
STBY  
  (1 ) R1ńR2) ) I   R1  
Adj  
V
(5.0 V) output voltage. This circuit guarantees the  
TRK  
STBY  
If another 5.0 V output is needed, simply connect the Adj  
lead to the V output lead.  
RESET output stays below 1.0 V (0.1 V Typ) when V  
is as low as 1.0 V to ensure reliable operation of  
STBY  
TRK  
microprocessorbased systems.  
5.0 V, 100 mA  
V
B+  
V
IN  
V
STBY  
DD  
C1*  
0.1 mF  
C2**  
10 mF  
ESR < 8.0 W  
CS8361  
MCU  
R3  
R1  
RESET  
RESET  
I/O  
ENABLE  
R2  
Adj  
SW 8.0 V,  
250 mA  
GND  
V
TRK  
GND  
C3**  
10 mF  
ESR < 8.0 W  
V
TRK  
V  
(1 + R1/R2)  
STBY  
For V  
8.0 V, R1/R2 0.6  
TRK  
*C1 is required if regulator is located far from power supply filter.  
**C2 and C3 are required for stability.  
Figure 2. Test and Application Circuit, 5.0 V, 8.0 V Regulator  
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4
 
CS8361  
5.0 V, 100 mA  
V
B+  
V
IN  
V
STBY  
DD  
C1*  
0.1 mF  
C2**  
10 mF  
ESR < 8.0 W  
CS8361  
MCU  
R3  
RESET  
RESET  
I/O  
ENABLE  
Adj  
SW 5.0 V,  
250 mA  
GND  
V
TRK  
GND  
C3**  
10 mF  
ESR < 8.0 W  
*C1 is required if regulator is located far from power supply filter.  
**C2 and C3 are required for stability.  
Figure 3. Test and Application Circuit, Dual 5.0 V Regulator  
APPLICATION NOTES  
External Capacitors  
I
is the maximum output current, for the  
is the maximum output current, for the  
OUT1(max)  
Output capacitors for the CS8361 are required for  
stability. Without them, the regulator outputs will oscillate.  
Actual size and type may vary depending upon the  
application load and temperature range. Capacitor effective  
series resistance (ESR) is also a factor in the IC stability.  
Worstcase is determined at the minimum ambient  
temperature and maximum load expected.  
Output capacitors can be increased in size to any desired  
value above the minimum. One possible purpose of this  
would be to maintain the output voltages during brief  
conditions of negative input transients that might be  
characteristic of a particular system.  
Capacitors must also be rated at all ambient temperatures  
expected in the system. To maintain regulator stability down  
to 40°C, capacitors rated at that temperature must be used.  
More information on capacitor selection for SMART  
REGULATOR®s is available in the SMART REGULATOR  
application note, “Compensation for Linear Regulators,”  
document number SR003AN/D, available through the  
Literature Distribution Center or via our website at  
http://www.onsemi.com.  
application,  
I
OUT2(max)  
application, and  
I is the quiescent current the regulator consumes at both  
Q
I
and I  
.
OUT1(max)  
OUT2(max)  
Once the value of P  
permissible value of R  
is known, the maximum  
D(max)  
can be calculated:  
qJA  
150° C * T  
+
A
R
QJA  
(2)  
P
D
The value of R  
can be compared with those in the  
qJA  
package section of the data sheet. Those packages with  
’s less than the calculated value in equation 2 will keep  
R
qJA  
the die temperature below 150°C.  
In some cases, none of the packages will be sufficient to  
dissipate the heat generated by the IC, and an external  
heatsink will be required.  
I
IN  
I
OUT1  
SMART  
REGULATOR  
V
V
OUT1  
IN  
Calculating Power Dissipation in a  
Dual Output Linear Regulator  
The maximum power dissipation for a dual output  
regulator (Figure 4) is  
I
OUT2  
Control  
Features  
V
OUT2  
NJ
NJ
Nj
V
V
* V  
* V  
I
)
) V  
P
+
IN(max)  
IN(max)  
OUT1(min) OUT1(max)  
D(max)  
Nj
(1)  
I
Q
I
IQ  
IN(max)  
OUT2(min) OUT2(max)  
where:  
V
V
V
is the maximum input voltage,  
IN(max)  
Figure 4. Dual Output Regulator With Key  
Performance Parameters Labeled.  
is the minimum output voltage from V  
is the minimum output voltage from V  
,
,
OUT1(min)  
OUT2(min)  
OUT1  
OUT2  
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5
 
CS8361  
Heat Sinks  
where:  
A heat sink effectively increases the surface area of the  
package to improve the flow of heat away from the IC and  
into the surrounding air.  
R
qJC  
R
qCS  
R
qSA  
= the junctiontocase thermal resistance,  
= the casetoheatsink thermal resistance, and  
= the heatsinktoambient thermal resistance.  
Each material in the heat flow path between the IC and the  
outside environment will have a thermal resistance. Like  
series electrical resistances, these resistances are summed to  
R
qJA  
appears in the package section of the data sheet. Like  
qJC  
R
, it too is a function of package type. R  
and R  
are  
qCS  
qSA  
functions of the package type, heatsink and the interface  
between them. These values appear in heat sink data sheets  
of heat sink manufacturers.  
determine the value of R  
qJA  
:
R
+ R  
) R  
) R  
QSA  
(3)  
QJA  
QJC  
QCS  
ORDERING INFORMATION*  
Device  
Package  
Shipping  
2
CS8361YDPS7G  
D PAK7  
50 Units/Rail  
(PbFree)  
2
CS8361YDPSR7G  
CS8361YDWF16G  
CS8361YDWFR16G  
D PAK7  
750 / Tape & Reel  
46 Units/Rail  
(PbFree)  
SO16L  
(PbFree)  
SO16L  
(PbFree)  
1000 / Tape & Reel  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Spe-  
cifications Brochure, BRD8011/D.  
*Contact your local sales representative for other package options including PSOP20, TO2207, DIP16, and SO20L.  
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6
CS8361  
PACKAGE DIMENSIONS  
SO16L  
DWF SUFFIX  
CASE 751G03  
ISSUE C  
A
D
q
16  
9
NOTES:  
1. DIMENSIONS ARE IN MILLIMETERS.  
2. INTERPRET DIMENSIONS AND TOLERANCES  
PER ASME Y14.5M, 1994.  
3. DIMENSIONS D AND E DO NOT INLCUDE MOLD  
PROTRUSION.  
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.  
5. DIMENSION B DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR  
PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS  
OF THE B DIMENSION AT MAXIMUM MATERIAL  
CONDITION.  
1
8
MILLIMETERS  
B
16X B  
DIM MIN  
MAX  
2.65  
0.25  
0.49  
0.32  
10.45  
7.60  
A
A1  
B
C
D
E
2.35  
0.10  
0.35  
0.23  
10.15  
7.40  
M
S
S
B
0.25  
T A  
e
1.27 BSC  
H
h
10.05  
0.25  
0.50  
0
10.55  
0.75  
0.90  
7
SEATING  
PLANE  
L
14X  
e
q
_
_
C
T
PACKAGE THERMAL DATA  
2
Parameter  
SO16L  
18  
D PAK, 7Pin  
Unit  
°C/W  
°C/W  
R
Typical  
Typical  
3.5  
q
JC  
R
75  
1050*  
q
JA  
*Depending on thermal properties of substrate. R  
= R  
+ R  
q
.
CA  
q
q
JA  
JC  
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7
CS8361  
PACKAGE DIMENSIONS  
D2PAK7 (SHORT LEAD)  
DPS SUFFIX  
CASE 936AB01  
ISSUE B  
A
SEATING  
PLANE  
NOTES:  
B
1. DIMENSIONING AND TOLERANCING PER ASME  
Y14.5M, 1994.  
A
M
M
0.10  
B A  
A
E
2. CONTROLLING DIMENSION: INCHES.  
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD  
FLASH AND GATE PROTRUSIONS. MOLD FLASH  
AND GATE PROTRUSIONS NOT TO EXCEED  
0.005 MAXIMUM PER SIDE. THESE DIMENSIONS  
TO BE MEASURED AT DATUM H.  
L1  
E1  
E/2  
c2  
4. THERMAL PAD CONTOUR OPTIONAL WITHIN  
DIMENSIONS E, L1, D1, AND E1. DIMENSIONS  
D1 AND E1 ESTABLISH A MINIMUM MOUNTING  
SURFACE FOR THE THERMAL PAD.  
D1  
D
DETAIL C  
H
INCHES  
MILLIMETERS  
DIM  
A
A1  
b
c
c2  
D
D1  
E
E1  
e
MIN  
MAX  
0.180  
0.010  
0.036  
0.026  
0.055  
0.368  
−−−  
MIN  
4.32  
0.00  
0.66  
0.43  
1.14  
8.25  
6.86  
9.65  
6.22  
MAX  
4.57  
0.25  
0.91  
0.66  
1.40  
9.53  
−−−  
0.170  
0.000  
0.026  
0.017  
0.045  
0.325  
0.270  
0.380  
0.245  
VIEW AA  
e
c
7X b  
SEATING  
PLANE  
A
M
M
B
0.13  
B A  
0.420  
−−−  
10.67  
−−−  
H
A1  
0.050 BSC  
1.27 BSC  
RECOMMENDED  
H
L
L1  
L3  
M
0.539  
0.058  
−−−  
0.010 BSC  
0.579  
0.078  
0.066  
13.69  
1.47  
−−−  
0.25 BSC  
0 °  
14.71  
1.98  
1.68  
SOLDERING FOOTPRINT*  
0.424  
0 °  
8 °  
8 °  
L
M
0.310  
GAUGE  
PLANE  
L3  
0.584  
DETAIL C  
0.136  
0.050  
7X  
0.040  
PITCH  
DIMENSIONS: MILLIMETERS  
*For additional information on our PbFree strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
SMART REGULATOR is a registered trademark of Semiconductor Components Industries, LLC (SCILLC).  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
N. American Technical Support: 8002829855 Toll Free  
USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
Japan Customer Focus Center  
Phone: 81357733850  
ON Semiconductor Website: www.onsemi.com  
Order Literature: http://www.onsemi.com/orderlit  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 3036752175 or 8003443860 Toll Free USA/Canada  
Fax: 3036752176 or 8003443867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
For additional information, please contact your local  
Sales Representative  
CS8361/D  

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