EMI9406MUTAG [ONSEMI]

EMI Filter Array, L-C with ESD Protection, for LCD and Camera;
EMI9406MUTAG
型号: EMI9406MUTAG
厂家: ONSEMI    ONSEMI
描述:

EMI Filter Array, L-C with ESD Protection, for LCD and Camera

CD
文件: 总6页 (文件大小:255K)
中文:  中文翻译
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EMI9406  
L-C LCD and Camera EMI  
Array with ESD Protection  
Functional Description  
The EMI9406 is an inductorbased (LC) EMI filter array with  
ESD protection, which integrates six filters in a uDFN package with  
0.40 mm pitch. Each EMI filter channel of the EMI9406 is  
implemented with the component value of 1.8 pF  
35 nH–4.7 pF35 nH–6 pF. The cutoff frequency at 3 dB  
attenuation is 300 MHz and can be used in applications where the data  
rates are as high as 160 Mbps, while providing greater than 35 dB  
attenuation over the 800 MHz to 2.7GHz frequency range. The parts  
include ESD diodes on every I/O pin and provide a high level of  
protection against electrostatic discharge (ESD). The ESD protection  
diodes connected to the external filter ports are designed and  
characterized to safely dissipate ESD strikes of 14 kV, which is  
beyond the maximum requirement of the IEC6100042 international  
standard.  
www.onsemi.com  
MARKING  
DIAGRAMS  
L6 MG  
12  
UDFN12  
CASE 517BD  
G
1
1
L6  
M
G
= Specific Device Code  
= Month Code  
= PbFree Package  
(Note: Microdot may be in either location)  
PINOUTS  
This device is particularly well suited for wireless handsets, mobile  
LCD modules and PDAs because of its small package format and  
easytouse pin assignments. In particular, the EMI9406 is ideal for  
EMI filtering and protecting data and control lines for the LCD display  
and camera interface in mobile handsets.  
Internal Pins  
(Lower ESD Event)  
1
2
3
4
5
6
7
The EMI9404 is housed in space saving, low profile, 0.40 mm pitch  
UDFN packages in a RoHS compliant, PbFree format.  
GND  
Features  
12  
11  
10  
9
8
Six Channels of EMI Filtering with Integrated ESD Protection  
PiStyle EMI Filters in a CapacitorInductorCapacitor (CLC)  
Network  
External Pins  
(Higher ESD Event)  
(Bottom View)  
14 kV ESD Protection (IEC 6100042 Level 4, contact discharge)  
at External Pin  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 3 of this data sheet.  
Greater than 35 dB Attenuation (typical) at 1 GHz  
UDFN PbFree Package with 0.40 mm Lead Pitch:  
6ch. = 12Lead UDFN  
UDFN PbFree Package with 0.40 mm Lead Pitch:  
12lead: 2.50 mm x 1.35 mm  
Increased Robustness Against Vertical Impacts During  
Manufacturing Process  
These Devices are PbFree and are RoHS Compliant  
Applications  
LCD and Camera Data Lines in Mobile Handsets  
Wireless Handsets  
I/O Port Protection for Mobile Handsets, Notebook  
Handheld PCs/PDAs  
Computers, PDAs, etc.  
EMI Filtering for Data Ports in Cell Phones, PDAs or  
Notebook Computer  
LCD and Camera Modules  
© Semiconductor Components Industries, LLC, 2011  
1
Publication Order Number:  
November, 2018 Rev. 1  
EMI9406/D  
EMI9406  
Figure 1. Electrical Schematic  
Table 1. PIN DESCRIPTIONS  
Pin #  
Name  
Description  
1
FILTER1  
FILTER2  
FILTER3  
FILTER4  
FILTER5  
FILTER6  
FILTER6  
FILTER5  
FILTER4  
FILTER3  
FILTER2  
FILTER1  
GND  
Filter + ESD Channel 1 (Internal)  
Filter + ESD Channel 2 (Internal)  
Filter + ESD Channel 3 (Internal)  
Filter + ESD Channel 4 (Internal)  
Filter + ESD Channel 5 (Internal)  
Filter + ESD Channel 6 (Internal)  
Filter + ESD Channel 6 (External)  
Filter + ESD Channel 5 (External)  
Filter + ESD Channel 4 (External)  
Filter + ESD Channel 3 (External)  
Filter + ESD Channel 2 (External)  
Filter + ESD Channel 1 (External)  
Device Ground  
2
3
4
5
6
7
8
9
10  
11  
12  
GND PAD  
SPECIFICATIONS  
MAXIMUM RATINGS  
Parameter  
Value  
–65 to +150  
15  
Unit  
°C  
Storage Temperature Range  
Current per Inductor  
mA  
mW  
DC Package Power Rating  
500  
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality  
should not be assumed, damage may occur and reliability may be affected.  
STANDARD OPERATING CONDITIONS  
Parameter  
Rating  
Unit  
Operating Temperature Range  
–40 to +85  
°C  
www.onsemi.com  
2
EMI9406  
ELECTRICAL OPERATING CHARACTERISTICS (Note 1)  
Symbol  
Parameter  
Total Channel Inductance  
Conditions  
Min  
Typ  
70  
Max  
24  
Unit  
nH  
W
L
TOT  
R
TOT  
Total Channel DC Resistance  
Total Channel Capacitance, 0 V bias  
Total Channel Capacitance, 2.5 V bias  
Standoff Voltage  
45  
C
TOT_0V  
TOT_2.5V  
ST  
LEAK  
SIG  
0 V dc; 1 MHz, 30 mV  
17.5  
11.5  
pF  
pF  
V
rms  
C
2.5 V dc; 1 MHz, 30 mV  
rms  
V
I = 10 mA  
5.5  
I
Diode Leakage Current  
VIN = +3.3 V  
0.1  
0.5  
mA  
V
V
Signal Clamp Voltage Positive Clamp  
Negative Clamp  
I
I
LOAD = 10 mA  
LOAD = 10 mA  
5.6  
1.5  
6.8  
0.8  
9.0  
0.4  
VESD  
Insystem ESD Withstand Voltage  
a) Contact discharge per IEC 6100042  
standard, Level 4 (External Pins)  
b) Contact discharge per IEC 6100042  
standard, Level 4 (Internal Pins)  
c) Air discharge per IEC6100042  
standard, Level 4 (External Pins)  
Notes 2 and 3  
14  
kV  
2
16  
V
C
Clamping Voltage  
TLP (Note 4)  
See Figures 4 through 7  
I
= 8 A  
= 16 A  
= 8 A  
= 16 A  
13.7  
20  
4.4  
7.6  
V
PP  
I
PP  
I
PP  
I
PP  
fC  
Cutoff frequency ZSOURCE = 50 W,  
ZLOAD = 50 W  
345  
MHz  
1. T = 25°C unless otherwise specified.  
A
2. ESD applied to input and output pins with respect to GND, one at a time.  
3. Unused pins are left open.  
4. ANSI/ESD STM5.5.1 Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model.  
TLP conditions: Z = 50 W, t = 100 ns, t = 4 ns, averaging window; t = 30 ns to t = 60 ns.  
0
p
r
1
2
PERFORMANCE INFORMATION  
TYPICAL FILTER PERFORMANCE  
(T = 25°C, DC Bias = 0 V, 50 W Environment)  
A
TYPICAL DIODE CAPACITANCE VS. INPUT  
VOLTAGE  
Figure 3. Filter Capacitance vs. Input Voltage  
(Normalized to Capacitance at 0 VDC and 25°C)  
Figure 2. Typical Filter Insertion Loss  
ORDERING INFORMATION  
Device  
Pins  
Marking  
Package  
Shipping  
EMI9406MUTAG  
12  
96  
UDFN12  
(PbFree)  
3000 / Tape & Reel  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
www.onsemi.com  
3
 
EMI9406  
VOLTAGE (V)  
VOLTAGE (V)  
Figure 4. Positive TLP IV Curve  
Figure 5. Negative TLP IV Curve  
Transmission Line Pulse (TLP) Measurement  
detail on TLP datasheet parameters, while application note  
AND9006/D provides a more complete explanation of the  
use of TLP for understanding protection product  
characteristics.  
Transmission Line Pulse (TLP) provides current versus  
voltage (IV) curves in which each data point is obtained  
from a 100 ns long rectangular pulse from a charged  
transmission line. A simplified schematic of a typical TLP  
system is shown in Figure 6. TLP IV curves of ESD  
protection devices accurately demonstrate the product’s  
ESD capability because the 10s of amps current levels and  
under 100 ns time scale match those of an ESD event. This  
is illustrated in Figure 7 where an 8 kV IEC 6100042  
current waveform into a short is compared with TLP current  
pulses at 8 A and 16 A, also into a short. A TLP IV curve  
shows the voltage at which the device turns on, as well as  
how well the device clamps voltage over a range of current  
levels. Typical TLP IV curves for the EMI9404 are shown  
in Figures 4 and 5 for positive and negative stress  
respectively. Application note AND9007/D gives more  
50 W Coax  
Cable  
L
Attenuator  
S
÷
50 W Coax  
Cable  
I
M
V
M
10 MW  
DUT  
V
C
Oscilloscope  
Figure 6. Simplified Schematic of a Typical TLP  
System  
Figure 7. Comparison Between 8 kV IEC 6100042 and 8 A and 16 A TLP Waveforms  
www.onsemi.com  
4
 
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
UDFN12, 2.5x1.35, 0.4P  
CASE 517BD01  
ISSUE O  
12  
1
DATE 18 NOV 2009  
SCALE 4:1  
A
B
D
NOTES:  
L
L
1. DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M, 1994.  
2X  
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. DIMENSION b APPLIES TO PLATED TERMINAL  
AND IS MEASURED BETWEEN 0.15 AND  
0.25 mm FROM THE TERMINAL TIP.  
4. COPLANARITY APPLIES TO THE EXPOSED  
PAD AS WELL AS THE TERMINALS.  
0.10  
C
L1  
DETAIL A  
PIN ONE  
REFERENCE  
E
OPTIONAL  
CONSTRUCTIONS  
2X  
MILLIMETERS  
0.10  
C
DIM MIN  
0.45  
A1 0.00  
MAX  
0.55  
0.05  
TOP VIEW  
MOLD CMPD  
EXPOSED Cu  
A
A
A3  
b
D
0.13 REF  
DETAIL B  
(A3)  
0.15  
0.25  
0.05  
C
C
A3  
2.50 BSC  
D2 1.90  
2.10  
E
1.35 BSC  
0.50  
0.40 BSC  
A1  
12X  
0.05  
E2 0.30  
e
K
L
L1  
DETAIL B  
A1  
SEATING  
NOTE 4  
OPTIONAL  
C
0.15  
0.20  
−−−  
−−−  
0.30  
0.05  
PLANE  
SIDE VIEW  
D2  
CONSTRUCTION  
DETAIL A  
GENERIC  
12X L  
MARKING DIAGRAM*  
6
1
E2  
XX MG  
G
1
12  
7
K
12X b  
e
XX  
M
G
= Specific Device Code  
= Month Code  
= PbFree Package  
0.10  
C A B  
0.05  
C
NOTE 3  
BOTTOM VIEW  
(Note: Microdot may be in either location)  
*This information is generic. Please refer  
to device data sheet for actual part  
marking.  
RECOMMENDED  
SOLDERING FOOTPRINT*  
PbFree indicator, “G” or microdot “ G”,  
12X  
0.40  
may or may not be present.  
2.20  
PACKAGE  
OUTLINE  
1.55  
0.50  
12X  
0.25  
0.40  
PITCH  
DIMENSIONS: MILLIMETERS  
*For additional information on our PbFree strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98AON47061E  
UDFN12, 2.5X1.35, 0.4P  
PAGE 1 OF 1  
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
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TECHNICAL PUBLICATIONS:  
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