ESDL3552BPFCT5G [ONSEMI]
超低电容 ESD 保护二极管;
| 型号： | ESDL3552BPFCT5G |
| 厂家： | 
ONSEMI |
| 描述： | 超低电容 ESD 保护二极管 二极管 |
| 文件： | 总6页 (文件大小：290K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
Ultra-Low Capacitance ESD
Protection Diodes
Micro−Packaged Diodes for ESD Protection
X4DFN3
CASE 718AB
ESDL3552B
The ESDL3552B is designed to protect voltage sensitive
components that require ultra-low capacitance from ESD and transient
voltage events. Excellent clamping capability, low capacitance, high
breakdown voltage, high linearity, low leakage, and fast response time
make these parts ideal for ESD protection on designs where board
space is at a premium. It has industry leading capacitance linearity
over voltage making it ideal for high−speed data line protection
applications.
MARKING DIAGRAM
PIN 1
A
= Specific Device Code
Features
I/O
I/O
Pin 1
Pin 3
• Industry Leading Capacitance Linearity Over Voltage
• Ultra−Low Capacitance: 0.25 pF
• Insertion Loss: 0.26 dB @ 5 GHz
• 0201 Isolated DSN Package: 0.62 mm x 0.32 mm
• Stand−off Voltage: 5.0 V
• Low Leakage: < 50 nA
• Low Dynamic Resistance: < 1.0 W
• These Devices are Pb−Free, Halogen−Free/BFR−Free and are RoHS
Compliant
GND
Pin 2
Typical Applications
• High Speed Data Line Protection
• USB 2.0, USB 3.0, USB 3.1
ORDERING INFORMATION
†
Package
Device
Shipping
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
X4DFN3
(Pb−Free/
Halide
10000 / Tape
& Reel
Rating
Symbol
Value
Unit
ESDL3552BPFCT5G
IEC 61000−4−2 Level 4 (Contact) (Note 1)
IEC 61000−4−2 Level 4 (Air) (Note 1)
ESD
20
20
kV
Free)
Maximum Peak Pulse Current
I
2.0
A
PP
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
IEC 61000−4−5 8/20 ms (Lightning) (Note 2)
Total Power Dissipation (Note 3) @ T = 25°C
Thermal Resistance, Junction−to−Ambient
°P °
R
300
400
mW
°C/W
A
D
q
JA
Junction and Storage Temperature Range
T , T
−55 to
+150
°C
J
stg
Lead Solder Temperature − Maximum
(10 Second Duration)
T
L
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Non−repetitive current pulse at T = 25°C, per IEC61000−4−2 waveform.
A
2. Non−repetitive current pulse at T = 25°C, per IEC61000−4−5 waveform.
A
3. Mounted with recommended minimum pad size, DC board FR−4
© Semiconductor Components Industries, LLC, 2018
1
Publication Order Number:
April, 2022 − Rev. 1
ESDL3552B/D
ESDL3552B
ELECTRICAL CHARACTERISTICS
A
I
(T = 25°C unless otherwise noted)
I
PP
Symbol
Parameter
I
Maximum Reverse Peak Pulse Current
PP
I
T
V
Clamping Voltage @ I
I
V
R
BR RWM
V
C
V
C
PP
V
I
V
V
V
R
T
RWM BR C
V
RWM
Working Peak Reverse Voltage
I
I
R
Maximum Reverse Leakage Current @ V
RWM
V
Breakdown Voltage @ I
Test Current
BR
T
I
PP
I
T
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
Bi−Directional Surge Protection
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
Parameter
Reverse Working Voltage
Breakdown Voltage
Symbol
Condition
Min
Typ
Max
5.0
Unit
V
V
RWM
Between any two pins (−40°C to +85°C)
V
BR
I
I
= 10 mA, Between any two pins (−40°C to +85°C)
= 1 mA, Between any two pins
= 5.0 V, T = 25°C
6.5
7.0
10.2
9.3
11.5
11
V
T
T
Reverse Leakage Current
Clamping Voltage TLP
I
R
V
V
I
0.001
0.001
14.5
0.05
0.25
mA
mA
V
RWM
A
= 5.0 V, T = 85°C
RWM
A
V
C
= 4 A
IEC 61000−4−2 Level 1 equivalent
PP
( 2 kV Contact, 4 kV Air)
Pin 1 to Pin 2, Pin 3 to Pin 2
21.5
V
I
PP
= 16 A
IEC 61000−4−2 Level 4 equivalent
( 8 kV Contact, 16 kV Air)
Pin 1 to Pin 2, Pin 3 to Pin 2
Reverse Peak Pulse Current
Clamping Voltage (8x20 ms)
Dynamic Resistance
Junction Capacitance
Capacitance Linearity
Insertion Loss
I
IEC61000−4−5 (8x20 ms), Between any two pins
= 2 A
2.0
3.0
14
A
V
PP
V
I
PP
18
C
R
100 ns TLP, Pin 1 to Pin 2, Pin 3 to Pin 2
0.58
0.25
0.03
W
DYN
C
V
= 0 V, f = 1 MHz, Between any two pins
= 0 V to 5 V, f = 1 MHz
0.30
pF
pF
dB
J
R
R
C
V
D
I
L
f = 2.5 GHz
f = 5.0 GHz
f = 10.0 GHz
0.16
0.26
0.41
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
110
100
90
10
0
−10
−20
−30
−40
−50
−60
80
70
60
50
40
30
−70
−80
20
10
−90
−100
−110
0
−10
−20
0
20
40
60
TIME (ns)
80
100
120
140
−20
0
20
40
60
TIME (ns)
80
100
120 140
Figure 1. ESD Clamping Voltage Screenshot
Figure 2. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC61000−4−2
Negative 8 kV Contact per IEC61000−4−2
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2
ESDL3552B
TYPICAL CHARACTERISTICS
20
18
16
14
12
10
8
10
9
20
18
16
14
12
10
8
10
9
Pin 1 to Pin 2
Pin 3 to Pin 2
Pin 1 to Pin 2
Pin 3 to Pin 2
8
8
7
7
Pin 1 to Pin 3
Pin 1 to Pin 3
6
6
5
5
4
4
6
3
6
3
4
2
0
2
1
0
4
2
0
2
1
0
0
2
4
6
8
10 12 14 16 18 20 22 24 26 28 30
0
2
4
6
8
10 12 14 16 18 20 22 24 26 28 30
VOLTAGE (V)
VOLTAGE (V)
Figure 3. Positive TLP I−V Curve
Figure 4. Negative TLP I−V Curve
18
16
14
12
10
8
18
16
14
12
10
8
6
6
4
4
2
2
0
0.0
0
0.0
0.5
1.0
1.5
2.0
(A)
2.5
3.0
3.5
0.5
1.0
1.5
I
PK
2.0
(A)
2.5
3.0
3.5
I
PK
Figure 5. Positive Clamping Voltage vs. Peak
Figure 6. Negative Clamping Voltage vs. Peak
Pulse Current (tp = 8/20 ms)
Pulse Current (tp = 8/20 ms)
1.E−02
1.E−03
1.E−04
1.E−05
1.E−06
1.E−07
1.E−08
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
1.E−09
1.E−10
1.E−11
0.05
0.00
1.E−12
−5 −4
−3 −2 −1
0
1
2
3
4
5
−12 −10 −8 −6 −4 −2
0
2
4
6
8
10 12
V
BIAS
(V)
V
R
(V)
Figure 7. Breakdown Voltage
Figure 8. Line Capacitance, f = 1 MHz
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3
ESDL3552B
TYPICAL CHARACTERISTICS
0
−0.2
−0.4
−0.6
−0.8
−1.0
−1.2
−1.4
−1.6
−1.8
−2.0
−2.2
−2.4
−2.6
−2.8
−3.0
1.E+07
1.E+08
1.E+09
1.E+10
FREQUENCY (Hz)
Figure 9. Insertion Loss
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4
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
X4DFN3 0.62x0.32, 0.225P
CASE 718AB
ISSUE A
SCALE 8:1
DATE 13 MAR 2018
NOTES:
A
B
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
D
2. CONTROLLING DIMENSION: MILLIMETERS.
PIN 1
REFERENCE
MILLIMETERS
DIM MIN
0.175
A1 0.000 0.015 0.030
NOM MAX
0.20 0.225
A
E
TOP VIEW
b
D
E
e
0.23
0.25
0.27
0.595 0.620 0.645
0.295 0.320 0.345
0.225 BSC
0.05
0.05
C
L
0.08
0.10
0.12
A
C
GENERIC
MARKING DIAGRAMS*
A1
SEATING
PLANE
C
SIDE VIEW
PIN 1
PIN 1
X
X
b
e
M
0.05
C A B
X
= Specific Device Code
1
L
RECOMMENDED
M
0.05
C A B
MOUNTING FOOTPRINT*
BOTTOM VIEW
0.225
PITCH
3X
3X
0.125
0.32
1
DIMENSIONS: MILLIMETERS
See Application Note AND8398/D for more mounting details
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON64083G
X4DFN3 0.62x0.32, 0.225P
PAGE 1 OF 1
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