ESDM3033N2T5G [ONSEMI]

ESD Protection Diode, 3.3 V;
ESDM3033N2T5G
型号: ESDM3033N2T5G
厂家: ONSEMI    ONSEMI
描述:

ESD Protection Diode, 3.3 V

文件: 总8页 (文件大小:272K)
中文:  中文翻译
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ESD Protection Diode  
MicroPackaged Diodes for ESD Protection  
ESDM3033  
The ESDM3033 is designed to protect voltage sensitive components  
that require low capacitance from ESD and transient voltage events.  
Excellent clamping capability, low capacitance, low leakage, and fast  
response time, make these parts ideal for ESD protection on designs  
where board space is at a premium.  
www.onsemi.com  
Features  
2
1
Low Clamping Voltage  
Small Body Outline Dimensions: 1.0 mm x 0.6 mm  
Low Body Height: 0.37 mm  
Standoff Voltage: 3.3 V  
MARKING  
DIAGRAM  
IEC6100042 Level 4 ESD Protection  
These Devices are PbFree, Halogen Free/BFR Free and are RoHS  
X2DFN2  
CASE 714AB  
JP M  
Compliant  
Typical Applications  
USB ID Line Protection  
mSD Card Protection  
Audio Line Protection  
GPIO  
JP = Specific Device Code  
= Date Code  
M
ORDERING INFORMATION  
MAXIMUM RATINGS  
Device  
ESDM3033N2T5G  
Package  
Shipping  
Rating  
IEC 6100042 (ESD)  
Symbol  
Value  
Unit  
X2DFN2  
(PbFree)  
8000 / Tape &  
Reel  
Contact  
Air  
30  
30  
kV  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specifications  
Brochure, BRD8011/D.  
Total Power Dissipation on FR5 Board  
°P °  
250  
mW  
D
(Note 1) @ T = 25°C  
A
Thermal Resistance, JunctiontoAmbient  
R
400  
55 to +150  
260  
°C/W  
°C  
q
JA  
Junction and Storage Temperature Range  
T , T  
J stg  
Lead Solder Temperature Maximum  
(10 Second Duration)  
T
L
°C  
Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
1. FR5 = 1.0 x 0.75 x 0.62 in.  
See Application Note AND8308/D for further description of survivability specs.  
© Semiconductor Components Industries, LLC, 2020  
1
Publication Order Number:  
June, 2020 Rev. 1  
ESDM3033/D  
 
ESDM3033  
ELECTRICAL CHARACTERISTICS  
(T = 25°C unless otherwise noted)  
A
I
I
PP  
Symbol  
Parameter  
I
Maximum Reverse Peak Pulse Current  
PP  
I
T
I
V
R
BR RWM  
V
Clamping Voltage @ I  
V
C
V
C
PP  
V
I
V
V
V
R
T
RWM BR C  
V
RWM  
Working Peak Reverse Voltage  
I
I
R
Maximum Reverse Leakage Current @ V  
RWM  
V
Breakdown Voltage @ I  
Test Current  
BR  
T
I
PP  
I
T
BiDirectional  
*See Application Note AND8308/D for detailed explanations of  
datasheet parameters.  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)  
A
Parameter  
Symbol  
Conditions  
Min  
Typ  
Max  
3.3  
7.0  
0.1  
6.0  
8.2  
Unit  
V
Reverse Working Voltage  
Breakdown Voltage (Note 2)  
Reverse Leakage Current  
Clamping Voltage (Note 3)  
Clamping Voltage (Note 3)  
Peak Pulse Current (Note 3)  
V
RWM  
V
BR  
I = 1 mA  
5.1  
V
T
I
R
V
RWM  
= 3.3 V  
mA  
V
V
C
I
I
t
= 1 A  
PP  
PP  
V
C
= 8 A  
V
I
PP  
= 8/20 ms  
P
9.9  
A
I
PP  
= 16 A  
Clamping Voltage  
TLP (Note 4)  
V
C
7.5  
V
IEC 6100042 Level 4 equivalent  
( 8 kV Contact, 15 kV Air)  
Junction Capacitance  
Dynamic Resistance  
Insertion Loss  
C
V
= 0 V, f = 1 MHz  
21  
pF  
W
J
R
R
TLP Pulse  
f = 10 MHz  
0.11  
0.01  
DYN  
dB  
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product  
performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
2. Breakdown voltage is tested from pin 1 to 2 and pin 2 to 1.  
3. Nonrepetitive current pulse at T = 25°C, per IEC6100045 waveform.  
A
4. ANSI/ESD STM5.5.1 Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model.  
TLP conditions: Z = 50 W, t = 100 ns, t = 4 ns, averaging window; t = 30 ns to t = 60 ns.  
0
p
r
1
2
TYPICAL CHARACTERISTICS  
40  
35  
30  
25  
20  
15  
10  
5
5
0
5  
10  
15  
20  
25  
30  
35  
40  
0
5  
20  
0
20  
40  
60  
TIME (ns)  
80  
100  
120 140  
20  
0
20  
40  
60  
80  
100  
120 140  
TIME (ns)  
Figure 1. ESD Clamping Voltage Screenshot  
Figure 2. ESD Clamping Voltage Screenshot  
Positive 8 kV Contact per IEC6100042  
Negative 8 kV Contact per IEC6100042  
www.onsemi.com  
2
 
ESDM3033  
TYPICAL CHARACTERISTICS  
1.E03  
1.E04  
1.E05  
1.E06  
1.E07  
1.E08  
1.E09  
1.E10  
1.E11  
25  
20  
15  
10  
5
0
10 8  
6  
4 2  
0
2
4
6
8
10  
5 4  
3 2 1  
0
1
2
3
4
5
V
R
(V)  
V
BIAS  
(V)  
Figure 3. IV Characteristics  
Figure 4. CV Characteristics  
1
0
80.0  
70.0  
60.0  
50.0  
40.0  
30.0  
20.0  
10.0  
0.0  
1  
2  
3  
4  
5  
6  
7  
8  
9  
10  
1.0E+07  
1.0E+08  
1.0E+09 0.0E+00  
5.0E+08  
1.0E+09  
1.5E+09 2.0E+09  
FREQUENCY  
FREQUENCY (Hz)  
Figure 5. RF Insertion Loss  
Figure 6. Capacitance over Frequency  
20  
10  
20  
18  
16  
14  
12  
10  
8  
10  
8
18  
16  
14  
12  
10  
8
8
6
4
6
4
6
6  
4
2
0
4  
2
0
2
2  
0
0
0
1
2
3
4
5
6
7
8
9
10  
0
1
2
3
4
5
6
7
8
9
10  
VOLTAGE (V)  
VOLTAGE (V)  
Figure 7. Positive TLP IV Curve  
Figure 8. Negative TLP IV Curve  
www.onsemi.com  
3
ESDM3033  
10  
9
8
7
6
5
4
3
2
1
0
9
8
7
6
5
4
3
2
1
0
0
2
4
6
8
10  
12  
0
2
4
6
8
10  
12  
I
PK  
(A)  
I
PK  
(A)  
Figure 9. Positive Clamping Voltage vs. Peak Pulse  
Figure 10. Negative Clamping Voltage vs. Peak  
Current (tp = 8/20 ms)  
Pulse Current (tp = 8/20 ms)  
www.onsemi.com  
4
ESDM3033  
IEC6100042 Waveform  
IEC 6100042 Spec.  
I
peak  
First Peak  
Current  
(A)  
100%  
90%  
Test Volt-  
age (kV)  
Current at  
30 ns (A)  
Current at  
60 ns (A)  
Level  
1
2
3
4
2
4
6
8
7.5  
15  
4
8
2
4
6
8
I @ 30 ns  
22.5  
30  
12  
16  
I @ 60 ns  
10%  
t
P
= 0.7 ns to 1 ns  
Figure 11. IEC6100042 Spec  
Device  
Under  
Test  
Oscilloscope  
ESD Gun  
50 W  
Cable  
50 W  
Figure 12. Diagram of ESD Test Setup  
ESD Voltage Clamping  
at the device level. ON Semiconductor has developed a way  
to examine the entire voltage waveform across the ESD  
protection diode over the time domain of an ESD pulse in the  
form of an oscilloscope screenshot, which can be found on  
the datasheets for all ESD protection diodes. For more  
information on how ON Semiconductor creates these  
screenshots and how to interpret them please refer to  
AND8307/D.  
For sensitive circuit elements it is important to limit the  
voltage that an IC will be exposed to during an ESD event  
to as low a voltage as possible. The ESD clamping voltage  
is the voltage drop across the ESD protection diode during  
an ESD event per the IEC6100042 waveform. Since the  
IEC6100042 was written as a pass/fail spec for larger  
systems such as cell phones or laptop computers it is not  
clearly defined in the spec how to specify a clamping voltage  
100  
t
r
PEAK VALUE I  
@ 8 ms  
RSM  
90  
80  
70  
60  
50  
40  
30  
20  
PULSE WIDTH (t ) IS DEFINED  
P
AS THAT POINT WHERE THE  
PEAK CURRENT DECAY = 8 ms  
HALF VALUE I /2 @ 20 ms  
RSM  
t
P
10  
0
0
20  
40  
t, TIME (ms)  
60  
80  
Figure 13. 8 X 20 ms Pulse Waveform  
www.onsemi.com  
5
ESDM3033  
50 W Coax  
Cable  
Transmission Line Pulse (TLP) Measurement  
L
Attenuator  
S
Transmission Line Pulse (TLP) provides current versus  
voltage (IV) curves in which each data point is obtained  
from a 100 ns long rectangular pulse from a charged  
transmission line. A simplified schematic of a typical TLP  
system is shown in Figure 14. TLP IV curves of ESD  
protection devices accurately demonstrate the product’s  
ESD capability because the 10s of amps current levels and  
under 100 ns time scale match those of an ESD event. This  
is illustrated in Figure 15 where an 8 kV IEC 6100042  
current waveform is compared with TLP current pulses at  
8 A and 16 A. A TLP IV curve shows the voltage at which  
the device turns on as well as how well the device clamps  
voltage over a range of current levels.  
÷
50 W Coax  
Cable  
I
M
V
M
10 MW  
DUT  
V
C
Oscilloscope  
Figure 14. Simplified Schematic of a Typical TLP  
System  
Figure 15. Comparison Between 8 kV IEC 6100042 and 8 A and 16 A TLP Waveforms  
www.onsemi.com  
6
 
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
X2DFN2 1.0x0.6, 0.65P  
CASE 714AB  
ISSUE B  
DATE 21 NOV 2017  
SCALE 8:1  
NOTES:  
0.10  
C
1. DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M, 1994.  
A B  
E
D
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. EXPOSED COPPER ALLOWED AS SHOWN.  
PIN 1  
INDICATOR  
MILLIMETERS  
DIM MIN  
NOM MAX  
A
A1  
b
D
E
e
L
0.34  
−−−  
0.45  
0.95  
0.55  
0.37  
0.03  
0.50  
1.00  
0.60  
0.65 BSC  
0.25  
0.40  
0.05  
0.55  
1.05  
0.65  
0.05  
C
TOP VIEW  
NOTE 3  
A
0.10  
0.10  
C
0.20  
0.30  
C
GENERIC  
MARKING DIAGRAM*  
A1  
SEATING  
PLANE  
C
SIDE VIEW  
XX M  
e
b
XX = Specific Device Code  
e/2  
M
0.05  
C A B  
M
= Date Code  
1
RECOMMENDED  
2X  
L
0.05  
SOLDER FOOTPRINT*  
M
C A B  
1.20  
2X  
BOTTOM VIEW  
2X  
0.47  
0.60  
PIN 1  
DIMENSIONS: MILLIMETERS  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
PbFree indicator, “G” or microdot “ G”,  
may or may not be present. Some products  
may not follow the Generic Marking.  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98AON98172F  
X2DFN2 1.0X0.6, 0.65P  
PAGE 1 OF 1  
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding  
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© Semiconductor Components Industries, LLC, 2019  
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