FAD7191M1X [ONSEMI]
600V，4.5A，高电流，高压和低压侧汽车门极驱动集成电路;
| 型号： | FAD7191M1X |
| 厂家： | 
ONSEMI |
| 描述： | 600V，4.5A，高电流，高压和低压侧汽车门极驱动集成电路 驱动 高压 光电二极管 接口集成电路 驱动器 |
| 文件： | 总14页 (文件大小：461K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
Automotive Gate Driver IC,
High and Low Side
600 V, 4.5 A
SOIC8
CASE 751EB
FAN7191-F085, FAD7191
Description
The FAN7191 / FAD7191 is a monolithic high− and low−side
gate−driver IC, which can drive high speed MOSFETs and IGBTs that
operate up to +600 V. It has a buffered output stage with all NMOS
transistors designed for high pulse driving capability and minimum
cross−conduction.
ON Semiconductor’s high−voltage process and common−mode
noise canceling technique provide stable operation of high−drivers
under high dV/dt noise circumstances. An advanced level−shift circuit
SOIC14
CASE 751EF
allows high−side gate driver operation up to V = −9.8 V (typical) for
S
ORDERING INFORMATION
V
BS
= 15 V.
†
Part Number
Package
Shipping
The UVLO circuit prevents malfunction when V
and V are
BS
DD
lower than the specified threshold voltage.
FAN7191MX−F085
FAN7191MX−F085−1
FAD7191M1X
8−SOP (751EB)
8−SOP (751EB)
14−SOP (751EF)
2500 / Tape
& Reel
The high current and low output voltage drop features make this
device suitable for controlling direct injection actuators and for use in
many automotive DC−DC converter and motor control applications.
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Features
• Floating Channel for Bootstrap Operation to +600 V
• 4.5 A Sourcing and 4.5 A Sinking Current Driving Capability
• Common−Mode dV/dt Noise Cancelling Circuit
• Built−in Under−Voltage Lockout for Both Channels
• Matched Propagation Delay for Both Channels
• 3.3 V and 5 V Input Logic Compatible
• Output In−phase with Input
• Enable Pin (For 14−SOP Package Only)
• 14−SOP with Separate Signal and Power Ground for Enhanced Noise
Immunity
• 14−SOP with Increased Clearance for High Voltage Applications
• Automotive Applications, AEC Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
Applications
• Electric and Hybrid Electric Vehicles
• 48 V Mild Hybrid Vehicles
• Automotive High Voltage DC−DC converters
• Motor Control (Fans, Pumps, Compressors)
• Advanced Fuel Injection Systems
• Starter/Alternator
• Electric Power Steering
• MOSFET and IGBT Driver Applications
© Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
February, 2022 − Rev. 7
FAN7191−F085/D
FAN7191−F085, FAD7191
Typical Application Circuit
Figure 1. Half−Bridge Application Circuit (8−SOP)
15 V
HIN
LIN
NC
1
2
3
4
5
6
7
14
13
12
11
10
V
B
HO
V
SS
Controller
C
BOOT
EN
V
S
FAD7191*
NC
NC
NC
COM
LO
9
8
V
DD
C
1
Figure 2. Half−Bridge Application Circuit (14−SOP)
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2
FAN7191−F085, FAD7191
Figure 3. Functional Block Diagram (8−SOP)
Figure 4. Functional Block Diagram (14−SOP)
INTERNAL BLOCK DIAGRAM
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3
FAN7191−F085, FAD7191
Pin Assignment
FAN7191*
FAD7191*
Figure 5. Pin Assignments (Top View)
Table 1. PIN DEFINITIONS
8−Pin
14−Pin
Name
Description
1
2
3
1
2
HIN
LIN
Logic Input for High−Side Gate Driver Output
Logic Input for Low−Side Gate Driver Output
Logic Ground, Power ground for 8−SOP
Enable Input (Internal Pull Up)
3
V
SS
4
EN
COM
LO
5
Power Ground for 14−SOP, Low−side Driver Return
Low−Side Driver Output
4
5
6
7
8
6
7
V
DD
Low−Side and Logic Power Supply Voltage
High−Side Floating Supply Return
High−Side Driver Output
11
12
13
V
S
HO
V
B
High−Side Floating Supply
8, 9, 10, 14
NC
No Connect
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4
FAN7191−F085, FAD7191
Table 2. ABSOLUTE MAXIMUM RATINGS
(T = −40°C to 125°C, unless otherwise specified. V , V and V are referenced to V )
A
B
DD
IN
SS
Symbol
Parameter
Min.
Max.
Unit
V
V
S
V
B
High−side offset voltage VS
V
− 25
V + 0.3
B
B
High−side floating supply voltage VB
High−side floating output voltage
−0.3
625
V
V
HO
V
DD
V
− 0.3
V + 0.3
B
V
S
Low−side and logic−fixed supply voltage
Power Ground (14−SOP)
−0.3
− 25
25
V
COM
V
V
V
V
V
+ 0.3
+ 0.3
+ 0.3
+ 0.3
V
DD
DD
DD
DD
DD
V
IN
Logic Input voltage (HIN, LIN, EN)
Low−Side Output Voltage LO (8−SOP)
Low−Side Output Voltage LO (14−SOP)
Minimum Pulse Width
−0.3
− 0.3
SS
V
V
LO
V
V
COM − 0.3
V
T
(Note 4)
80
ns
V/ns
W
pulse
d
VS/dt
Allowable offset voltage slew rate
50
P
D
Power Dissipation, T = 25°C
8−SOP
14−SOP
8−SOP
0.625
0.80
200
A
(Note 1, 2, 3)
W
θ
JA
Thermal Resistance, junction−to−ambient
°C/W
°C/W
°C
°C
V
(Note 1, 2)
14−SOP
156
T
J
Junction temperature
Storage temperature
+150
+150
2500
2000
2000
T
S
−55
ESD
Electrostatic
Human Body Model,
Discharge Capability JESD22−A114
8−SOP
14−SOP
Charged Device Model, JESD22−C101
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Mounted on 76.2 × 114.3 × 1.6 mm PCB (FR−4 glass epoxy material).
2. Refer to the following standards: JESD51−2: Integral circuits thermal test method environmental conditions – natural convection.
JESD51−3: Low effective thermal conductivity test board for leaded surface mount packages.
3. P is the power that raises T to 150°C for T = 25°C. P to be derated at higher ambient temperature.
D
J
A
D
4. Minimum input pulse width that guarantee to produce an output pulse. Valid for turn on and turn off pulse width.
Table 3. RECOMMENDED OPERATING CONDITIONS (V , V and V are referenced to V
)
SS
S
DD
IN
Symbol
Parameter
High−side floating supply voltage
High−side Floating Supply Offset Voltage
High−side Output Voltage
Min.
V + 10
Max.
Unit
V
V
V + 22
S
B
S
S
V
6 − V
600
V
BS
V
V
V
S
V
B
V
HO
Low−side and Logic Supply voltage
Low−side output voltage (8−SOP)
Low−side output voltage (14−SOP)
Logic input voltage (HIN, LIN, EN)
Power Ground (14−SOP)
10
0
22
V
DD
V
V
DD
DD
DD
DD
V
LO
COM
0
V
V
V
V
V
IN
V
COM
V
DD
− 22
V
T
A
Ambient Temperature
−40
+125
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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5
FAN7191−F085, FAD7191
Table 4. ELECTRICAL CHARACTERISTICS
(V
BIAS
(V , V ) = 15.0 V, V = V = COM, T = −40°C to 125°C, unless otherwise specified. The V , V and I parameters are
DD BS S SS A IL IH IN
referenced to V and are applicable to the respective input signals HIN and LIN. The V and I parameters are referenced to COM (or
SS
O
O
V
SS
in case of 8−SOP). V and COM (V for 8−SOP) are applicable to the respective outputs HO and LO)
S SS
Symbol
Characteristic
Condition
Min.
Typ.
Max.
Unit
POWER SUPPLY SECTION (V AND V
)
DD
BS
V
V
V
and V Supply Under−Voltage
7.8
7.2
8.8
8.3
0.5
9.8
9.1
V
DDUV+
DD
BS
Positive−going Threshold
BSUV+
V
V
V
DD
and V Supply Under−Voltage
DDUV−
BS
Negative Going Threshold
BSUV−
V
V
DD
supply under−voltage lockout
DDHYS
hysteresis
I
Offset Supply Leakage Current
V
= V = 600 V
50
μA
μA
LK
B
S
I
Quiescent V Supply Current
V
V
= 0 V or 5 V
= 0 V or 5 V
45
75
110
150
800
QBS
QDD
BS
IN
IN
I
Quiescent V Supply Current
DD
I
Operating V Supply Current
f
IN
= 20 kHz, RMS value
(See Figure 26)
400
PBS
BS
I
Operating V Supply Current
f
IN
= 20 kHz, RMS value
(See Figure 26)
400
800
PDD
DD
LOGIC INPUT SECTION (HIN, LIN, EN)
V
IH
Logic “1” Input Voltage
2.5
V
V
Logic “0” Input Voltage
1.2
50
IL
I
Logic “1” Input Bias Current (HIN/LIN)
Logic “0” Input Bias Current (HIN/LIN)
Enable High Input Bias Current
Enable Low Input Bias Current
Input Pull−down Resistance
V
V
= 5 V
= 0 V
25
μA
IN+
IN
I
1.0
2.0
−10
−20
IN−
EN+
EN−
IN
I
I
EN = 5 V
EN = 0 V
−100
−140
100
−50
−75
200
R
kΩ
IN
GATE DRIVER OUTPUT SECTION (HO, LO)
High−level Output Voltage, V
V
OH
−V
O
No Load
No Load
1.35
35
V
mV
A
BIAS
V
OL
Low−level Output Voltage, V
O
I
Output HIGH, Short−circuit Pulsed
Current
V
= 0 V, V = 5 V with
3.5
3.5
4.5
4.5
O+
O
IN
PW < 10μs
(Note 5)
I
Output LOW Short−circuit Pulsed
Current
V
O
= 15 V, V = 0 V with
(NoOte− 5)
IN
PW < 10 μs
V
Allowable Negative V Pin Voltage for
V = 15V
BS
−9.8
−9.0
V
V
S
S
HIN Signal Propagation to HO
Allowable COM−V ground offset
14−SOP, V = 15 V,
−7.0
COM−V
(Note 5)
SS
DD
= 0 V
SS
V
SS
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Parameters guaranteed by design.
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6
FAN7191−F085, FAD7191
Table 5. DYNAMIC ELECTRICAL CHARACTERISTICS
(V
BIAS
(V , V ) = 15.0 V, V = V = COM = 0 V, T = −40°C to 125°C, C
= 1000 pF unless otherwise specified)
DD
BS
S
SS
A
LOAD
Symbol
Characteristic
Condition
V = 0 V
Min.
Typ.
140
140
Max.
200
200
55
Unit
ns
t
on
t
off
Turn−on Propagation Delay
Turn−off Propagation Delay
Delay Matching
S
V = 0 V
S
ns
MT
ns
t
Turn−on Rise Time
25
25
50
ns
r
t
Turn−off Fall Time
50
ns
f
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7
FAN7191−F085, FAD7191
Typical Characteristics
200
150
100
50
200
150
100
50
Typ
Typ
Max
125
Max
0
0
−50
−25
0
25
50
75
100
125
−50
−25
0
25
50
75
100
Temperature (°C)
Temperature (°C)
Figure 6. Turn−on Propagation Delay
Figure 7. Turn−off Propagation Delay
vs. Temperature
vs. Temperature
50
40
30
20
10
0
50
40
30
20
10
0
Typ
Typ
Max
Max
−50
−25
0
25
50
75
100
125
−50
−25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
Figure 8. Turn−on Rise Time vs. Temperature
Figure 9. Turn−off Fall Time vs. Temperature
60
50
40
30
60
50
40
30
20
10
0
20
Typ
Typ
10
Max
Max
0
−50
−25
0
25
50
75
100
125
−50
−25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
Figure 10. Turn-on Delay Matching vs. Temperature
Figure 11. Turn-off Delay Matching vs. Temperature
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8
FAN7191−F085, FAD7191
Typical Characteristics (continued)
150
120
90
150
120
90
60
30
0
60
30
Typ
Typ
Max
Max
0
−50
−25
0
25
50
75
100
125
−50
−25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
Figure 12. Quiescent VDD Supply Current
vs. Temperature
Figure 13. Quiescent VBS Supply Current
vs. Temperature
800
600
400
200
0
800
600
400
200
0
Typ
Max
Typ
Max
−50
−25
0
25
50
75
100
125
−50
−25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
Figure 14. Operating VDD Supply Current
vs. Temperature
Figure 15. Operating VBS Supply Current
vs. Temperature
10
10
Min
Typ
Max
9
8
7
9
8
7
Min
Typ
Max
−50
−25
0
25
50
75
100
125
−50
−25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
Figure 16. VDD UVLO+ vs. Temperature
Figure 17. VDD UVLO− vs. Temperature
10
9
10
Min
Typ
Max
9
8
7
8
Min
Typ
Max
7
−50
−25
0
25
50
75
100
125
−50
−25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
Figure 18. VBS UVLO+ vs. Temperature
Figure 19. VBS UVLO− vs. Temperature
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9
FAN7191−F085, FAD7191
Typical Characteristics (continued)
30
25
20
15
10
1,4
1,2
1
0,8
0,6
0,4
0,2
0
5
0
Max
Typ
Typ
Max
−50
−25
0
25
50
75
100
125
−50
−25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
Figure 20. High−Level Output
Figure 21. Low−Level Output
Voltage vs. Temperature
Voltage vs. Temperature
3
3
2,5
2
2,5
2
1,5
1,5
1
Typ
Max
Typ
Max
1
−50
−25
0
25
50
75
100
125
−50
−25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
Figure 23. Logic Low Input
Voltage vs. Temperature
Figure 22. Logic High Input
Voltage vs. Temperature
60
50
40
30
20
10
0
−6
−7
−8
−9
−10
−11
−12
Typ
Max
Typ
Max
−50
−25
0
25
50
75
100
125
−50
−25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
Figure 24. Logic “1” Input Bias
Current vs. Temperature
Figure 25. Allowable Negative VS
Voltage vs. Temperature
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10
FAN7191−F085, FAD7191
Switching Time Definitions
15 V
HIN
LIN
1
2
3
4
5
6
7
NC 14
13
15 V
V
1
2
8
7
HIN
LIN
B
HIN
LIN
V
B
10 μF
10 μF
V
SS
HO 12
HO
100 nF
1 nF
EN FAD7191* V
11
10
S
1 nF
100 nF
100 nF
3
4
V
6
5
SS
V
S
COM
LO
NC
1 nF
15 V
15 V
NC
NC
9
8
LO
V
DD
1 nF
V
DD
10 μF
10 μF
Figure 26. Switching Time Test Circuit
EN
HIN
LIN
HIN
LIN
HO
LO
HO
LO
Figure 27. Input / Output Timing Diagram
HIN
LIN
50%
50%
t
t
R
t
t
F
ON
OFF
90%
90%
HO
LO
10%
10%
Figure 28. Switching Time Waveform Definitions
HIN
LIN
50%
50%
MT
LO
HO
90%
HO
10%
LO
MT
Figure 29. Delay Matching Waveform Definition
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11
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC8
CASE 751EB
ISSUE A
DATE 24 AUG 2017
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13735G
SOIC8
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC14
CASE 751EF
ISSUE O
DATE 30 SEP 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13739G
SOIC14
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
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