FAN2558S15X [ONSEMI]
LDO 稳压器,180 mA,低输出电压,带电源正常检测功能;型号: | FAN2558S15X |
厂家: | ONSEMI |
描述: | LDO 稳压器,180 mA,低输出电压,带电源正常检测功能 稳压器 |
文件: | 总17页 (文件大小:424K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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FAN2558/FAN2559
180mA Low Voltage CMOS LDO
Features
General Description
• Fixed 1.0V, 1.2V, 1.3V, 1.5V, 1.8V, 2.5V, 3.3V, 3.5V, 3.6V,
3.8V and Adjustable Output
• Power Good Indicator with Open Drain Output
• 180mA Output Current
The FAN2558/9 low voltage CMOS LDOs feature fixed or
adjustable output voltage, 180mA load current, delayed
power good output (open drain) and 1% output accuracy
with excellent line and load regulation. An external bypass
capacitor provides ultra-low noise operation.
• 100µA Ground Current
• Cbypass for Low Noise Operation
• Fast Enable for CDMA Applications
• High Ripple Rejection
• Current Limit
• Thermal Shutdown
• Excellent Line and Load Regulation
• Requires Only 1µF Output Capacitor
• Stable with 0 to 300mΩ ESR
• TTL-level Compatible Enable Input
• Active Output Discharge
The FAN2558/9 low voltage LDOs incorporate both thermal
shutdown and short circuit protection. Output is stable with a
1µF, low ESR capacitor. The FAN2558/9 family is available
in 5-Lead SOT-23, 6-Lead SOT-23 and 2x2mm MLP-6
packages.
FAN2558: Fixed Output LDO with Power Good output
FAN2558ADJ: Adjustable Output LDO with Power Good
output
Applications
• Processor Power-up sequencing
• PDAs, Cell Phones
FAN2559: Fixed Output LDO with Power Good output,
Low Noise
Available standard output voltages are 1.0, 1.2V, 1.3V, 1.5V,
1.8V, 2.5V, 3.3V, 3.5V, 3.6V, and 3.8V. Custom output volt-
age options are also available.
• Portable Electronic Equipment
• PCMCIA Vcc and Vpp regulation/switching
Typical Application
47KΩ
47KΩ
47KΩ
R
R
R
PG
PG
PG
V
V
V
V
OUT
V
V
OUT
IN
IN
IN
OUT
R
R
C
C
C
OUT
1
2
GND
OUT
GND
OUT
GND
C
ADJ
PG
BYP
C
BYP
EN
EN
EN
PG
PG
FAN2558
FAN2558ADJ
FAN2559
REV. 1.0.4 3/15/04
FAN2558/FAN2559
PRODUCTSPECIFICATIONS
Pin Assignments
TOP-VIEW
V
V
1
2
3
6
5
4
V
V
1
2
3
5
4
OUT
1
6
5
4
V
OUT
V
IN
IN
IN
OUT
GND
EN
NC/ADJ/BYP
PG
2
3
ADJ/BYP
PG
GND
EN
GND
EN
PG
FAN2558
5-Lead SOT-23 PACKAGE
FAN2558ADJ/FAN2559
6-Lead SOT-23 PACKAGE
FAN2558/FAN2558ADJ/FAN2559
2x2mm MLP-6 PACKAGE
Pin Name
FAN2558ADJ
6SOT-23 2x2mm MLP-6
Pin no.
FAN2558
FAN2559
5SOT-23
VIN
2x2mm MLP-6
6SOT-23
VIN
2x2mm MLP-6
1
2
3
4
5
6
VOUT
NC
VIN
GND.
EN
VOUT
ADJ
PG
VOUT
BYP
PG
GND.
EN
GND.
EN
PG
PG
EN
PG
EN
PG
EN
VOUT
GND
VIN
ADJ
VOUT
GND
VIN
BYP
VOUT
GND
VIN
Pin Descriptions
Symbol
Pin Function Description
VIN
VOUT
GND
PG
Power Supply Input
Regulated Voltage Output
Ground Connection
Power Good Output, Open Drain
ADJ
BYP
EN
Ratio of potential divider from Vout to ADJ determines output voltage
Reference Noise Bypass
Chip Enable Input. The regulator is fully enabled when TTL “H” is applied to this input. The regulator
enters into shutdown mode when TTL “L” is applied to this input.
2
REV. 1.0.4 3/15/04
PRODUCT SPECIFICATIONS
FAN2558/FAN2559
Absolute Maximum Ratings
Parameter
Min.
Max.
Units
V
VIN to GND
6
VIN + 0.3
150
Voltage on any other pin to GND
Junction Temperature (TJ)
Storage Temperature
-0.3
-55
-65
V
°C
°C
°C
W
150
Lead Soldering Temperature, 10 seconds
Power Dissipation (PD)
300
Internally
Limited
Electrostatic Discharge (ESD) Protection (Note1)
HBM
CDM
4
1
kV
Recommended Operating Conditions
Parameter
Min.
2.7
Typ.
Max.
5.5
Units
V
Supply Voltage Range, VIN for VOUT < 2.0V
Supply Voltage Range, VIN for VOUT ≥ 2.0V
Load Current
VOUT + VDROPOUT
5.5
V
180
VIN
VIN
125
235
75
mA
V
Enable Input Voltage VEN
0
0
Power Good Output Voltage Range VPG
Junction Temperature
V
-40
°C
Thermal Resistance-Junction to Ambient SOT-23 (Note 2)
°C/W
Thermal Resistance-Junction to Case, 2mm x 2mm
6-lead MLP
Notes:
1. Using Mil Std. 883E, method 3015.7 (Human Body Model) and EIA/JESD22C101-A (Charge Device Model)
2. Junction to ambient thermal resistance, Θ , is a strong function of PCB material, board thickness, thickness and number of
JC
copper plains, number of via used, diameter of via used, available copper surface, and attached heat sink characteristics.
REV. 1.0.4 3/15/04
3
FAN2558/FAN2559
PRODUCTSPECIFICATIONS
Electrical Characteristics
VIN = VIN min (note 5) to 5.5V, VEN = VIN, ILOAD = 100µA, TA = -40°C to +85°C, unless otherwise noted.Typical values
are at 25°C.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
VOUT
Output Voltage Accuracy
(Note 3)
ILOAD = 100µA
-2
1
2
ꢀ
VOUT(ADJ) Output Voltage Range
(Adjustable)
ILOAD = 100µA
1
VIN
V
∆VOUT_LNR Line Regulation
∆VOUT_LDR Load Regulation (Note 4)
VIN min < VIN < 5.5V
-0.3
0.3
4
ꢀ/V
ꢀ
ILOAD = 0.1mA to 150mA
2.5
0.1
ISD
Supply Current in Shutdown
Mode
VEN < 0.4V
PG = No Connection
µA
IGND
Ground Pin Current (Note 4)
ILOAD = 0mA, VIN = 5.5V
ILOAD = 150mA, VIN = 5.5V
VOUT = 0V
90
150
150
500
µA
110
350
150
ILIM
TSD
Current Limit
260
mA
°C
Thermal Shutdown
Temperature
Thermal Shutdown Hysteresis
Enable Input Low
10
°C
V
VENL
VENH
IE
VIN = 5.5V, Shutdown
VIN = 5.5V, Enabled
VENL ≤ 0.4V, VIN = 5.5V
VENH ≥ 1.6V, VIN = 5.5V
ꢀ of VOUT PG ON
0.4
Enable Input High
1.6
89
V
Enable Input Current
0.01
0.01
µA
VPG
Low Threshold
ꢀ
ꢀ
V
High Threshold
ꢀ of VOUT PG OFF
97
VPGL
IPG
PG Output Low Voltage
IPG_SINK = 100µA,
Fault Condition
0.02
0.01
30
0.1
PG Leakage Current
Enable Response Time
Power "ON" Delay Time
PG off, VPG =5.5V
µA
µS
µS
TEN
TON
COUT = 1µF
CBYPASS = 10nF
300
500
COUT = 1µF
CBYPASS = 10nF
VENL ≥ 1.6V,
300
V
IN = 0V to VOUT + 1V
DPG
PG Delay time
1
5
mS
mV
VDROP-OUT Dropout Voltage
(For Adjustable Output
VOUT > 2.7V and
ILOAD = 180mA
400
Version)
VFB_ADJ
Feedback Voltage
(For Adjustable Output
Version)
0.59
V
Note:
3. Guaranteed 1ꢀ output voltage accuracy parts are available on customer reꢁuest.
4. Measured at constant junction temperature using low duty cycle pulse testing.
5. V min = 2.7V or (V
+ 1V), whichever is greater.
IN
OUT
4
REV. 1.0.4 3/15/04
PRODUCT SPECIFICATIONS
FAN2558/FAN2559
DC Electrical Characteristics (Continued)
VIN = VIN min (note 5) to 5.5V, VEN = VIN, ILOAD = 100µA, TA = -40°C to +85°C, unless otherwise noted. Typical
values are at 25°C.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
PSRR
Power Supply Rejection Ratio
DC to 100kHz
COUT =1µF
50
dB
CBYPASS= 10nF
ILOAD = 0 to 150mA
VOUT ≤ 1.8V
eN
Output Noise
BW: 300Hz to 50kHz
COUT =1µF
30
µVRMS
CBYPASS= 10nF
ILOAD = 0 to 150mA
REV. 1.0.4 3/15/04
5
FAN2558/FAN2559
PRODUCTSPECIFICATIONS
capacitor quality still must be considered if the designer is to
achieve optimal circuit performance. In general, ceramic
capacitors offer superior ESR performance, and a smaller
case size than tantalum capacitors.
Functional Description
Utilizing BiCMOS technology, the FAN2525/FAN2559
product family is optimized for use in compact battery pow-
ered systems. These LDOs offer a unique combination of
high ripple rejection, low noise, low power consumption,
high tolerance for a variety of output capacitors, and less
than 1µA “OFF” current. In the circuit, a differential current
sense amplifier controls a series-pass P-Channel MOSFET to
achieve high ripple rejection. A separate error amplifier com-
pares the load voltage at the output with an onboard trimmed
low voltage bandgap reference for output regulation.
Input Capacitor
An input capacitor of 2.2µF (nominal value) or greater,
connected between the Input pin and Ground, placed in close
proximity to the device, will improve transient response and
ripple rejection. Higher values will further improve ripple
rejection and transient response. An input capacitor is rec-
ommended when the input source, either a battery or a regu-
lated AC voltage, is located far from the device. Any good
quality ceramic, tantalum, or metal film capacitor will give
acceptable performance; however, in extreme cases capacitor
surge current ratings may have to be considered.
Thermal shutdown and current limit circuits protect the
device under extreme conditions. When the device tempera-
ture reaches 150°C, the output is disabled. When the device
cools down by 10°C, it is re-enabled. The user can shut down
the device using the Enable control pin at any time. The cur-
rent limit circuit is trimmed, which leads to consistent power
on /enable delays, and provides safe short circuit current
densities even in narrow traces of the PCB.
Output Capacitor
An output capacitor is required to maintain regulator loop
stability. Stable operation will be achieved with a wide vari-
ety of capacitors with ESR values ranging from 0mΩ up to
400mΩ. Multilayer ceramic, tantalum or aluminum electro-
lytic capacitors may be used. A nominal value of at least 1µF
is recommended. Note that the choice of output capacitor
affects load transient response, ripple rejection, and it has a
slight effect on noise performance as well.
A carefully optimized control loop accommodates a wide
range of ESR values in the output bypass capacitor, allowing
the user to optimize space, cost, and performance require-
ments.
An Enable pin shuts down the regulator output to conserve
power, reducing supply current to less than 1µA.
An internal resistor of approximately 100Ω is connected
between VOUT and GND in shutdown mode, to discharge the
output capacitor at a faster rate.
The fixed-voltage FAN2559 has a noise bypass pin. Power
Good is available as a diagnostic function to indicate that the
output voltage has reduced within 5% of the nominal value.
Bypass Capacitor (FAN2559 Only)
In the fixed-voltage configuration, connecting a capacitor
between the bypass pin and ground can significantly reduce
output noise. Values ranging from 0pF to 47nF can be used,
depending on the sensitivity to output noise in the applica-
tion.
The six pin adjustable-voltage version utilizes pin 5 to con-
nect to an external voltage divider which feeds back to the
regulator error amplifier, thus setting the output voltage to
the desired value.
At the high-impedance Bypass pin, care must be taken in the
PCB layout to minimize noise pickup, and capacitors must
be selected to minimize current loading (leakage). Noise
pickup from external sources can be considerable. Leakage
currents into the Bypass pin will directly affect regulator
accuracy and should be kept as low as possible; thus, high-
quality ceramic and film types are recommended for their
low leakage characteristics. Cost-sensitive applications not
concerned with noise can omit this capacitor.
Applications Information
External Capacitors – Selection
The FAN2558/FAN2559 gives the user the flexibility to uti-
lize a wide variety of capacitors compared to other LDOs.
An innovative design approach offers significantly reduced
sensitivity to ESR, which degrades regulator loop stability in
older designs. While the improvements featured in the
FAN2558/FAN2559 family greatly simplify the design task,
6
REV. 1.0.4 3/15/04
PRODUCT SPECIFICATIONS
FAN2558/FAN2559
The ground pin current IGND can be found in the charts
provided in the Electrical Characteristics section.
Control Functions
Enable Pin
The relationship describing the thermal behavior of the
package is:
Connecting 2V or greater to the Enable pin will enable the
output, while 0.4V or less will disable it while reducing the
quiescent current consumption to less than 1µA. If this shut-
down function is not needed, the pin can simply be con-
nected permanently to the VIN pin. Allowing this pin to float
will cause erratic operation.
T
J(max) – T
A
-------------------------------
PD(max)
=
θJA
where TJ(max) is the maximum allowable junction tempera-
ture of the die, which is 125°C, and TA is the ambient operat-
ing temperature. θJA is dependent on the surrounding PC
board layout and can be empirically obtained. While the θJC
(junction-to-case) of the SOT23-5 package is specified at
130°C /W, the θJA of the minimum PWB footprint will be at
least 235°C /W. This can be improved by providing a heat
sink of surrounding copper ground on the PWB. Depending
on the size of the copper area, the resulting θJA can range
from approximately 180°C /W for one square inch to nearly
130°C /W for 4 square inches. The addition of backside cop-
per with through-holes, stiffeners, and other enhancements
can also aid in reducing thermal resistance. The heat contrib-
uted by the dissipation of other devices located nearby must
be included in the design considerations. Once the limiting
parameters in these two relationships have been determined,
the design can be modified to ensure that the device remains
within specified operating conditions. If overload conditions
are not considered, it is possible for the device to enter a
thermal cycling loop, in which the circuit enters a shutdown
condition, cools, re-enables, and then again overheats and
shuts down repeatedly due to an unmanaged fault condition.
Error Flag (Power Good)
Fault conditions such as input voltage dropout (low VIN),
overheating, or overloading (excessive output current), will
set an error flag. The PG pin which is an open-drain output,
will go LOW when VOUT is less than 95% or the specified
output voltage. When the voltage at VOUT is greater than
95% of the specified output voltage, the PG pin is HIGH. A
logic pull-up resistor of 47KΩ is recommended at this out-
put. The pin can be left disconnected if unused.
Thermal Protection
The FAN2558/FAN2559 is designed to supply high peak
output currents for brief periods, however sustained exces-
sive output load at high input - output voltage difference will
increase the device’s temperature and exceed maximum rat-
ings due to power dissipation. During output overload condi-
tions, when the die temperature exceeds the shutdown limit
temperature of 150°C, an onboard thermal protection will
disable the output until the temperature drops approximately
10°C below the limit, at which point the output is re-enabled.
During a thermal shutdown, the user may assert the power-
down function at the Enable pin, reducing power consump-
tion to a minimum.
Adjustable Version
The FAN2558ADJ includes an input pin ADJ which allows
the user to select an output voltage ranging from 1V to near
VIN, using an external resistor divider. The voltage VADJ pre-
sented to the ADJ pin is fed to the onboard error amplifier
which adjusts the output voltage until VADJ is equal to the
onboard bandgap reference voltage of 1.00V(typ). The equa-
Thermal Characteristics
The FAN2558/FAN2559 is designed to supply 180mA at the
specified output voltage with an operating die (junction)
temperature of up to 125°C. Once the power dissipation and
thermal resistance is known, the maximum junction tempera-
ture of the device can be calculated. While the power dissipa-
tion is calculated from known electrical parameters, the
actual thermal resistance depends on the thermal characteris-
tics of the SOT23-5 surface-mount package and the sur-
rounding PC board copper to which it is mounted.
tion is:
R1
VOUT = 0.59V × 1 + -----
R2
Since the bandgap reference voltage is trimmed, 1% initial
accuracy can be achieved. The total value of the resistor
chain should not exceed 250KOhm total to keep the error
amplifier biased during no-load conditions. Programming
output voltages very near VIN need to allow for the magni-
tude and variation of the dropout voltage VDO over load, sup-
ply, and temperature variations. Note that the low-leakage
FET input to the CMOS error amplifier induces no bias
current error to the calculation.
The power dissipation is equal to the product of the input-to-
output voltage differential and the output current plus the
ground current multiplied by the input voltage,
or:
PD = (VIN – VOUT) × IOUT + VIN × IGND
REV. 1.0.4 3/15/04
7
FAN2558/FAN2559
PRODUCTSPECIFICATIONS
load conditions. A large copper area in the local ground
serves as heat sink (as discussed above) when high power
dissipation significantly increases device temperature. Com-
ponent-side copper provides significantly better thermal per-
formance. Added feed through connecting the device side
ground plane to the back plane further reduces thermal resis-
tance.
General PCB Layout Considerations
For optimum device performance, careful circuit layout and
grounding techniques must be used. Establishing a small
local ground, to which the GND pin, and the output and
bypass capacitors are connected, is recommended. The input
capacitor should be grounded to the main ground plane. The
quiet local ground is then routed back to the main ground
plane using feed through via. In general, the high-frequency
compensation components (input, bypass, and output capaci-
tors) should be located as close to the device as possible.
Close proximity of the output capacitor is especially impor-
tant to achieve optimum performance, especially during high
8
REV. 1.0.4 3/15/04
PRODUCT SPECIFICATIONS
FAN2558/FAN2559
Block Diagram (Note 6)
V
IN
EN
Shutdown
Control
Bandgap
BYPASS
Precharge/Fast Enable
Error Amplifier
Shutdown
p
Load Current
Sense
Thermal
Shutdown
V
OUT
n
GND
PG
Out of Regulation
Detection
n
Delay
Over-Current
Dropout
Detection
GND
Note:
6. Fixed output voltage version. BYPASS pin is available for FAN2559 only.
REV. 1.0.4 3/15/04
9
FAN2558/FAN2559
PRODUCTSPECIFICATIONS
Typical Performance Characteristics
Unless otherwise specified, CIN = COUT = 1µF, RPG = 47kΩ, TA = 25°C, EN = VIN
Output Voltage vs.Temperature
Output Voltage vs.Temperature
I
= 0mA
LOAD
I
= 180mA
LOAD
V
= 5.5V
IN
V
= 5.5V
IN
Junction Temperature (°C)
Junction Temperature (°C)
Ground Current vs.Temperature
Ground Current vs.Temperature
I
= 180mA
LOAD
I
= 0mA
V
= 5.5V
LOAD
IN
V
= 5.5V
IN
V
= 2.7V
IN
V
= 2.7V
IN
Junction Temperature (°C)
Junction Temperature (°C)
Power On ResponseTime vs.Temperature
Enable ResponseTime vs.Temperature
Junction Temperature (°C)
Junction Temperature (°C))
10
REV. 1.0.4 3/15/04
PRODUCT SPECIFICATIONS
FAN2558/FAN2559
Typical Performance Characteristics (Continued)
Unless otherwise specified, CIN = COUT = 1µF, RPG = 47kΩ, TA = 25°C, EN = VIN
Power Good Delay vs. Input Voltage
Output Voltage vs. Input Voltage
I
= 100µA
LOAD
I
=100µA
LOAD
I
=180mA
LOAD
Input Voltage (V)
Input Voltage (V)
Output Voltage vs. Load Current
Output Voltage vs. Enable Voltage
C
=1µF
OUT
C
=1µF
OUT
I
=100µA
LOAD
V
=2.7V
IN
Load Current (mA)
Enable Voltage (V)
Ripple Rejection vs. Frequency
Ripple Rejection vs. Frequency
V
≤ 1.8V
OUT
I
=0mA
=1µF
= 10nF
V
≤ 1.8V
LOAD
OUT
I
=180mA
=1µF
LOAD
C
OUT
C
OUT
C
BYP
C
= 10nF
BYP
REV. 1.0.4 3/15/04
11
FAN2558/FAN2559
PRODUCTSPECIFICATIONS
Typical Performance Characteristics (Continued)
Unless otherwise specified, CIN = COUT = 1µF, RPG = 47kΩ, TA = 25°C, EN = VIN
Output Spectral Noise Density
I
= 180mA
LOAD
C
=1µF
OUT
C
= 10nF
BYP
V
=1.2V
=2.7V
OUT
Enable Delay = 27.6µS
V
IN
I
=0mA
=1µF
LOAD
C
OUT
BYP
C
=10nF
Time (20µS/div)
Load Transient Response
Power Good Delay
V
V
C
= 2.7V
=1.8V
= 4.7µF
V
=3V
IN
IN
Power Good Delay = 2mSec
V
C
=1V
=1µF
OUT
OUT
OUT
OUT
I
=100mA
LOAD
I
= 0mA
LOAD
Time (200µS/div)
Time (1mS/div)
Power Good in Fail Condition
25
20
15
10
5
V
= 4V
IN
V
= 5V
IN
V
= 3V
IN
0
0.0
0.5
1.0
1.5
2.0
Power Good Voltage (V)
12
REV. 1.0.4 3/15/04
PRODUCT SPECIFICATIONS
FAN2558/FAN2559
Mechanical Dimensions
2x2mm 6-Lead MLP
REV. 1.0.4 3/15/04
13
FAN2558/FAN2559
PRODUCTSPECIFICATIONS
Mechanical Dimensions
6-Lead SOT-23 Package
5-Lead SOT-23 Package
B
B
e
e
c
c
L
L
H
E
H
E
α
α
e1
D
e1
D
A
A
A1
A1
Symbol
Inches
Millimeters
Notes
Min
.035
.000
.008
.003
.106
.059
Max
.057
.006
.020
.010
.122
.071
Min
.90
Max
1.45
.15
A
A1
B
.00
.20
.50
c
.08
.25
D
E
2.70
1.50
3.10
1.80
e
.037 BSC
.075 BSC
.95 BSC
1.90 BSC
e1
H
L
.087
.126
.024
10°
2.20
3.20
.60
.004
0°
.10
0°
α
10°
Notes:
7. Package outline exclusive of mold flash & metal burr.
8. Packageoutline exclusive of solder plating.
9. EIAJ Ref Number SC_74A
14
REV. 1.0.4 3/15/04
PRODUCT SPECIFICATIONS
FAN2558/FAN2559
Ordering Information
TA= -40°C to 85°C
Part Number Output Voltage
Package Marking
58T
Package
Order Code
FAN2558
1.0V
1.2V
5-Lead SOT-23
FAN2558S10X
FAN2558S12X
FAN2558S13X
FAN2558S15X
FAN2558S18X
FAN2558S25X
FAN2558S33X
FAN2558S35X
FAN2558S36X
FAN2558S38X
FAN2558MP10X
FAN2558MP12X
FAN2558MP13X
FAN2558MP15X
FAN2558MP18X
FAN2558SX
58U
58X
1.3V
1.5V
58V
1.8V
58O
58J
2.5V
3.3V
58K
3.5V
58P
3.6V
58Q
58I
3.8V
1.0V
58T
2mm x 2mm 6-Lead MLP
1.2V
58U
58X
1.3V
1.5V
58V
1.8V
58O
58R
58R
59T
Adjustable
6-Lead SOT-23
2mm x 2mm 6-Lead MLP
6-Lead SOT-23
FAN2558MPX
FAN2559S10X
FAN2559S12X
FAN2559S13X
FAN2559S15X
FAN2559S18X
FAN2559MP10X
FAN2559MP12X
FAN2559MP13X
FAN2559MP15X
FAN2559MP18X
FAN2559
1.0V
1.2V
1.3V
1.5V
1.8V
1.0V
1.2V
1.3V
1.5V
1.8V
59U
59X
59V
59O
59T
2mm x 2mm 6-Lead MLP
59U
59X
59V
59O
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REV. 1.0.4 3/15/04
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