FAN7602BMX_技术文档

Is Now Part of

To learn more about ON Semiconductor, please visit our website at

www.onsemi.com

Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers

will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor

product management systems do not have the ability to manage part nomenclature that utilizes an underscore

(_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain

device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated

device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please

email any questions regarding the system integration to Fairchild_questions@onsemi.com.

ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number

of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right

to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability

arising out of the application or use of any product or circuit, and speciﬁcally disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON

Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON

Semiconductor data sheets and/or speciﬁcations can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s

technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA

Class 3 medical devices or medical devices with a same or similar classiﬁcation in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended

or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its ofﬁcers, employees, subsidiaries, afﬁliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out

of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor

is an Equal Opportunity/Afﬁrmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

March 2007

FAN7602B

Green Current-Mode PWM Controller

Features

Description

Green Current-Mode PWM Control

Fixed 65kHz Operation

The FAN7602B is a green current-mode PWM controller.

It is specially designed for off-line adapter applications;

DVDP, VCR, LCD monitor applications; and auxiliary

power supplies.

Internal High-Voltage Start-up Switch

Burst-Mode Operation

The internal high-voltage start-up switch and the burst-

mode operation reduce the power loss in standby mode.

As a result, it is possible to supply 0.5W load, limiting the

input power under 1W when the input line voltage is

Line Voltage Feedforward to Limit Maximum Power

Line Under-Voltage Protection

Latch Protection & Internal Soft-Start (10ms) Function

Overload Protection

265V . On no-load condition, input power is under 0.3W.

AC

Over-Voltage Protection

The maximum power can be limited constantly, regard-

less of the line voltage change, using the power limit

function.

Low Operation Current: 1mA Typical

8-pin DIP/SOP

The switching frequency is internally fixed at 65kHz.

Applications

The FAN7602B includes various protections for the sys-

tem reliability and the internal soft-start prevents the out-

put voltage over-shoot at start-up.

Adapter

LCD Monitor Power

Auxiliary Power Supply

Related Application Notes

AN6014 - Green Current Mode PWM Controller

FAN7602

Ordering Information

OperatingTemp.

Marking

Part Number

FAN7602BN

FAN7602BM

FAN7602BMX

Range

Pb-Free

Package

Packing Method

Code

8-DIP

Rail

FAN7602B

-25°C to +125°C

Yes

8-SOP

Tape & Reel

FAN7602B Rev. 1.0.0

www.fairchildsemi.com

Typical Application Diagram

FAN7602B

Figure 1. Typical Flyback Application

Internal Block Diagram

VSTR

8

6

V_CC

1

LUVP

OLP

LUVP

OVP

Auto Restart

Protection

SS End

19V

2V/1.5V

OVP

Latch

Protection

Reset

Circuit

5V Ref

12V/8V

UVLO

V_CC

SS End

10ms

Soft Start

Driver

Circuit

OUT

5

PWM

Block

Plimit

Offset

65kHz clock

3 CS/FB

Delay

Circuit

0.95V/0.88V

Latch/

Plimit

Latch

2

PWM+

Power Limit

OLP

Soft

Start

4V

Plimit

Offset

Plimit

Offset

Plimit

Offset

4

GND

Generator

Soft

Start

Figure 2. Functional Block Diagram of FAN7602B

FAN7602B Rev. 1.0.0

www.fairchildsemi.com

2

Pin Assignments

V_STR

8

NC

7

V_CC

6

Out

5

F A N 7 6 0 2 B

Y W W

1

2

3

4

LUVP

CS/FB

GND

Latch/

Plimit

Figure 3. Pin Configuration (Top View)

Pin Definitions

Pin #

Name

Description

Line Under-Voltage Protection Pin. This pin is used to protect the set when the

input voltage is lower than the rated input voltage range.

1

LUVP

Latch Protection and Power Limit Pin. When the pin voltage exceeds 4V, the latch

2

Latch/Plimit protection works; the latch protection is reset when the V_CCvoltage is lower than 5V.

For the power limit function, the OCP level decreases as the pin voltage increases.

Current Sense and Feedback Pin. This pin is used to sense the MOSFET current

3

4

5

CS/FB

GND

OUT

for the current mode PWM and OCP. The output voltage feedback information and

the current sense information are added using an external RC filter.

Ground Pin. This pin is used for the ground potential of all the pins. For proper oper-

ation, the signal ground and the power ground should be separated.

Gate Drive Output Pin. This pin is an output pin to drive an external MOSFET. The

peak sourcing current is 450mA and the peak sinking current is 600mA. For proper

operation, the stray inductance in the gate driving path must be minimized.

Supply Voltage Pin. IC operating current and MOSFET driving current are supplied

using this pin.

6

7

8

V_CC

NC

No Connection.

Start-up Pin. This pin is used to supply IC operating current during IC start-up. After

start-up, the internal JFET is turned off to reduce power loss.

V_STR

FAN7602B Rev. 1.0.0

www.fairchildsemi.com

3

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-

ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-

tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The

absolute maximum ratings are stress ratings only.

Symbol

V_CC

Parameter

Value

20

Unit

V

Supply Voltage

I_OH, I_OL

V_CS/FB

V_LUVP

V_Latch

V_STR

Peak Drive Output Current

CS/FB Input Voltage

+450/-600

-0.3 to 20

-0.3 to 10

600

mA

V

LUVP Input Voltage

V

Latch/Plimit Input Voltage

V_STRInput Voltage

V

T_J

Operating Junction Temperature

Operating Temperature Range

Storage Temperature Range

Power Dissipation

150

°C

W

kV

V

T_A

-25 to 125

-55 to 150

1.2

T_STG

P_D

V_{ESD_HBM}

V_{ESD_MM}

V_{ESD_CDM}

ESD Capability, Human Body Model

ESD Capability, Machine Model

ESD Capability, Charged Device Model

2.0

200

500

V

Thermal Impedance

Symbol

Parameter

Thermal Resistance, Junction-to-Ambient

Value

Unit

θ_JA

8-DIP

100

°C/W

Note:

1. Regarding the test environment and PCB type, please refer to JESD51-2 and JESD51-10.

www.fairchildsemi.com

FAN7602B Rev. 1.0.0

4

Electrical Characteristics

V_CC= 14V, T_A= -25°C~125°C, unless otherwise specified

Symbol

Parameter

Condition

Min.

Typ.

Max. Unit

START UP SECTION

I_STR

V_STRStart-up Current

V_STR= 30V, T_A= 25°C

0.7

1.0

1.4

mA

UNDER VOLTAGE LOCK OUT SECTION

V_th(start) Start Threshold Voltage

V_th(stop) Stop Threshold Voltage

HY(uvlo) UVLO Hysteresis

V_CCincreasing

V_CCdecreasing

11

7

12

8

13

9

V

3.6

4.0

4.4

SUPPLY CURRENT SECTION

I_STR

I_CC

Start-up Supply Current

Operating Supply Current

T_A= 25°C

250

1.0

320

1.5

μA

Output no switching

mA

SOFT-START SECTION

t_SS

Soft-Start Time⁽¹⁾

5

10

15

ms

PWM SECTION

f_OSC

V_CS/FB1

t_D

Operating Frequency

V_CS/FB= 0.2V, T_A= 25°C

T_A= 25°C

59

65

1.0

100

75

73

1.1

150

80

kHz

V

CS/FB Threshold Voltage

Propagation Delay to Output⁽¹⁾

Maximum Duty Cycle

0.9

ns

%

D_MAX

D_MIN

70

Minimum Duty Cycle

0

%

BURST MODE SECTION

V_CS/FB2Burst On Threshold Voltage

V_CS/FB3Burst Off Threshold Voltage

POWER LIMIT SECTION

K_PlimitOffset Gain

OUTPUT SECTION

T_A= 25°C

0.84

0.77

0.95

0.88

1.06

0.99

V

V_Latch/Plimit= 2V, T_A= 25°C

0.12

11.5

0.16

0.20

V_OH

V_OL

t_R

Output Voltage High

T_A= 25°C, I_source= 100mA

T_A= 25°C, I_sink= 100mA

T_A= 25°C, C_L= 1nF

12.0

1.0

45

14.0

2.5

V

Output Voltage Low

Rising Time⁽¹⁾

150

ns

t_F

Falling Time⁽¹⁾

T_A= 25°C, C_L= 1nF

35

PROTECTION SECTION

V_Latch

t_OLP

Latch Voltage

Overload Protection Time ⁽¹⁾

3.6

20

4.0

22

4.4

24

V

ms

Overload Protection Time at Start-

up

t_{OLP_ST}

V_OLP

30

37

0

44

0.1

2.1

ms

V

Overload Protection Level

Line Under-Voltage Protection On

to Off

V_LUVPoff

T_A= 25°C

1.9

2.0

V

Line Under-Voltage Protection Off

to On

V_LUVPon

T_A= 25°C

1.4

18

1.5

19

1.6

20

V

V_OVP

Note:

Over-Voltage Protection

1. These parameters, although guaranteed by design, are not tested in production.

www.fairchildsemi.com

FAN7602B Rev. 1.0.0

5

Typical Performance Characteristics

12.8

12.4

12.0

11.6

11.2

8.8

8.4

8.0

7.6

7.2

-25

0

25

50

75

100

125

-25

0

25

50

75

100

125

Temperature [°C]

Figure 4. Start Threshold Voltage vs. Temp.

Figure 5. Stop Threshold Voltage vs. Temp.

4.4

4.3

4.2

4.1

4.0

3.9

3.8

3.7

3.6

350

300

250

200

150

-25

0

25

50

75

100

125

-25

0

25

50

75

100

125

Temperature [°C]

Figure 6. UVLO Hysteresis vs. Temp.

Figure 7. Start-up Supply Current vs. Temp.

1.5

1.3

1.2

1.1

1.0

0.9

0.8

1.4

1.3

1.2

1.1

1.0

0.9

0.8

-25

0

25

50

75

100

125

-25

0

25

50

75

100

125

Temperature [°C]

Figure 8. Operating Supply Current vs. Temp.

Figure 9. V_STRStar-up Current vs. Temp.

FAN7602B Rev. 1.0.0

www.fairchildsemi.com

6

Typical Performance Characteristics (Continued)

70

68

66

64

62

60

1.10

CSFB2

CSFB3

1.05

1.00

0.95

0.90

0.85

0.80

0.75

0.70

-25

0

25

50

75

100

125

-25

0

25

50

75

100

125

Temperature [°C]

Figure 10. Burst On/Off Voltage vs. Temp.

Figure 11. Operating Frequency vs. Temp.

0.20

80

0.18

0.16

0.14

0.12

0.10

78

76

74

72

70

-25

0

25

50

75

100

125

-25

0

25

50

75

100

125

Temperature [°C]

Figure 12. Offset Gain vs. Temp.

Figure 13. Maximum Duty Cycle vs. Temp.

20.0

19.6

19.2

18.8

18.4

18.0

4.4

4.2

4.0

3.8

3.6

-25

0

25

50

75

100

125

-25

0

25

50

75

100

125

Temperature [°C]

Figure 14. OVP Voltage vs. Temp.

Figure 15. Latch Voltage vs. Temp.

FAN7602B Rev. 1.0.0

www.fairchildsemi.com

7

Typical Performance Characteristics (Continued)

2.10

2.05

2.00

1.95

1.90

1.70

1.65

1.60

1.55

1.50

1.45

1.40

-25

0

25

50

75

100

125

-25

0

25

50

75

100

125

Temperature [°C]

Figure 16. LUVP On-to-Off Voltage vs. Temp.

Figure 17. LUVP Off-to-On Voltage vs. Temp.

1.08

1.04

1.00

0.96

0.92

-25

0

25

50

75

100

125

Temperature [°C]

Figure 18. CS/FB Threshold Voltage vs. Temp.

FAN7602B Rev. 1.0.0

www.fairchildsemi.com

8

Applications Information

charging C_Fto adjust the offset voltage. If I_FBis zero, C_F

is discharged through R_Fand R_Sto lower offset voltage.

1. Start-up Circuit and Soft Start Block

The FAN7602B contains a start-up switch to reduce the

power loss of the external start-up circuit of the conven-

tional PWM converters. The internal start-up circuit

charges the V_CCcapacitor with 0.9mA current source if

the AC line is connected. The start-up switch is turned off

15ms after IC starts up, as shown in Figure 19. The soft-

start function starts when the V_CCvoltage reaches the

start threshold voltage of 12V and ends when the internal

soft-start voltage reaches 1V. The internal start-up circuit

starts charging the V_CCcapacitor again if the Vcc voltage

is lowered to the minimum operating voltage, 8V. The

UVLO block shuts down the output drive circuit and

some blocks to reduce the IC operating current and the

internal soft-start voltage drops to zero. If the V_CCvolt-

age reaches the start threshold voltage, the IC starts

switching again and the soft-start block works as well.

Figure 21 shows typical voltage waveforms of the CS/FB

pin. The current-sense waveform is added to the offset

voltage, as shown in Figure 21. The CS/FB pin voltage is

compared with PWM+ that is 1V - Plimit offset. If the CS/

FB voltage meets PWM+, the output drive is shut off. If

the feedback offset voltage is low, the switch on time is

increased. If the feedback offset voltage is high, the

switch on time is decreased. In this way, the duty cycle is

controlled according to the output load condition. In gen-

eral, the maximum output power increases as the input

voltage increases because the current slope during

switch on-time increases.

To limit the output power of the converter constantly, a

power-limit function is included. Sensing the converter

input voltage through the Latch/Plimit pin, the Plimit off-

set voltage is subtracted from 1V. As shown in Figure 21,

the Plimit offset voltage is subtracted from 1V and the

switch on-time decreases as the Plimit offset voltage

increases. If the converter input voltage increases, the

switch on-time decreases, keeping the output power

constant. The offset voltage is proportional to the Latch/

Plimit pin voltage and the gain is 0.16; if the Latch/Plimit

voltage is 1V, the offset voltage is 0.16V.

During the soft-start, the pulse-width modulated (PWM)

comparator compares the CS/FB pin voltage with the

soft-start voltage. The soft-start voltage starts from 0.5V

and the soft-start ends when it reaches 1V and the soft-

start time is 10ms. The start-up switch is turned off when

the soft-start voltage reaches 1.5V.

V_CC

12V

8V

Vcc

Start-up

Current

Plimit

Offset

PWM

Comparator

R_FB

CS/FB

Soft Start

Voltage

PWM+

Soft

Start

I_FB

R_F

Power

Limit

1.5V

1V

Isw

3

0.5V

Soft Start

Time (10ms)

C_F

t

R_S

5ms

Figure 19. Start-up Current and V_CCVoltage

2. Oscillator Block

Figure 20. Current-Sense and Feedback Circuits

1V

Power Limit

Offset

PWM+

The oscillator frequency is set internally. The switching

frequency is 65kHz.

CS/FB

GND

FB

Offset

3. Current Sense and Feedback Block

On Time

The FAN7602B performs the current sensing for the cur-

rent-mode PWM and the output voltage feedback with

only one pin, pin3. To achieve the two functions with one

pin, an internal leading edge blanking (LEB) circuit to fil-

ter the current-sense noise is not included because the

external RC filter is necessary to add the output voltage

feedback information and the current-sense information.

Figure 20 shows the current-sense and feedback cir-

cuits. R_Sis the current-sense resistor to sense the switch

current. The current-sense information is filtered by an

RC filter composed of R_Fand C_F. According to the output

voltage feedback information, I_FBcharges or stops

(a) Low-Power Limit Offset Case

1V

Power Limit

Offset

PWM+

CS/FB

FB

Offset

GND

On Time

(b) High-Power Limit Offset Case

Figure 21. CS/FB Pin Voltage Waveforms

FAN7602B Rev. 1.0.0

www.fairchildsemi.com

9

voltage feedback loop is saturated, and the OLP initiates

if the LUVP condition persists more than 22ms.

4. Burst-Mode Block

The FAN7602B contains the burst-mode block to reduce

the power loss at a light load and no load. A hysteresis

comparator senses the offset voltage of the Burst+ for

the burst mode, as shown in Figure 22. The Burst+ is the

sum of the CS/FB voltage and Plimit offset voltage. The

FAN7602B enters burst mode when the offset voltage of

the Burst+ is higher than 0.95V and exits the burst mode

when the offset voltage is lower than 0.88V. The offset

voltage is sensed during the switch off time.

Vin

1

LUVP

+

2V/1.5V

Figure 24. Line UVP Circuit

5.3 Latch Protection

O ffset

Delay

C ircuit

The latch protection is provided to protect the system

against abnormal conditions using the Latch/Plimit pin.

The Latch/Plimit pin can be used for the output over-

voltage protection and/or other protections. If the Latch/

Plimit pin voltage is made higher than 4V by an external

circuit, the IC is shut down. The latch protection is reset

when the V_CCvoltage is lower than 5V.

Burst+

3

C S/FB

+

−

0.95V/0.88V

Figure 22. Burst-Mode Block

5. Protection Block

5.4 Over-Voltage Protection (OVP)

The FAN7602B contains several protection functions to

improve system reliability.

If the V_CCvoltage reaches 19V, the IC shuts down and

the OVP protection is reset when the V_CCvoltage is

lower than 5V.

5.1 Overload Protection (OLP)

6. Output Drive Block

The FAN7602B contains the overload protection func-

tion. If the output load is higher than the rated output cur-

rent, the output voltage drops and the feedback error

amplifier is saturated. The offset of the CS/FB voltage

representing the feedback information is almost zero. As

shown in Figure 23, the CS/FB voltage is compared with

50mV reference when the internal clock signal is high

and, if the voltage is lower than 50mV, the OLP timer

starts counting. If the OLP condition persists for 22ms,

the timer generates the OLP signal. This protection is

reset by the UVLO. The OLP block is enabled after the

soft-start finishes.

The FAN7602B contains a single totem-pole output

stage to drive a power MOSFET. The drive output is

capable of up to 450mA sourcing current and 600mA

sinking current with typical rise and fall time of 45ns and

35ns, respectively, with a 1nF load.

Clock

OLP

3

CS/FB

22ms

Timer

50mV

Soft-Start

Figure 23. Overload Protection Circuit

5.2 Line Under-Voltage Protection

If the input voltage of the converter is lower than the min-

imum operating voltage, the converter input current

increases too much, causing component failure. There-

fore, if the input voltage is low, the converter should be

protected. In the FAN7602B, the LUVP circuit senses the

input voltage using the LUVP pin and, if this voltage is

lower than 2V, the LUVP signal is generated. The com-

parator has 0.5V hysteresis. If the LUVP signal is gener-

ated, the output drive block is shut down, the output

FAN7602B Rev. 1.0.0

www.fairchildsemi.com

10

Typical Application Circuit

Application

Output Power

48W

Input Voltage

Output Voltage

Adapter

Universal input (85~265V

)

12V

AC

Features

Low stand-by power (<0.3W at 265V

)

AC

Constant output power control

Key Design Notes

All the IC-related components should be placed close to IC, especially C107 and C110.

If R106 value is too low, there can be subharmonic oscillation.

R109 should be designed carefully to make V voltage higher than 8V when the input voltage is 265V at no load.

CC

AC

R110 should be designed carefully to make V voltage lower than OVP when the input voltage is 85V at full load.

CC AC

R103 should be designed to keep the MOSFET V voltage lower than maximum rating when the output is shorted.

DS

1. Schematic

R206 C204

D202

D204

L201

T1

1

3

12

BD101

C202

C201

C105

R112

D101

9

6

R114

D102

R109

R110

Q101

R105

C222

C109

C103 C104

5

ZD101

R102

1

R202

R113

C110

OP1

4

3

1

2

R204

C102

R101

8

7

6

5

R203 C203

LUVP

V_STR

R107

C107

2

3

4

Latch/

Plimit

NC

3

2

1

IC201

CS/FB

V_CC

R111

R104

D103

C101

R205

GND

Out

FUSE

IC101

AC INPUT

OP2

R207

4

1

2

3

C108

ZD201

R108

Figure 25. Schematic

FAN7602B Rev. 1.0.0

www.fairchildsemi.com

11

2. Inductor Schematic Diagram

3mm

1

12

Ns

Np2

N_Vcc

Np2

Np1

9

2

ShNiesld

Ns

Shield

5

3

5

ShNiesld

Np1

Shield

5

N_Vcc

6

Figure 26. Inductor Schematic Diagram

3. Winding Specification

No

Pin (s→f)

3 → 2

Wire

0.3^φ× 2

Turns

Winding Method

Np1

31

Solenoid Winding