FAN7710VN [ONSEMI]

用于紧凑型荧光灯的镇流器控制器;
FAN7710VN
型号: FAN7710VN
厂家: ONSEMI    ONSEMI
描述:

用于紧凑型荧光灯的镇流器控制器

控制器
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February 2012  
FAN7710V  
Ballast Control IC for Compact Fluorescent Lamps  
Features  
Description  
FAN7710V developed using Fairchild’s high-voltage  
process and system-in-package (SiP) concept, are  
ballast-control integrated circuits (ICs) for compact  
fluorescent lamps (CFL). FAN7710V incorporates a  
preheating / ignition function, controlled by a user-  
selected external capacitor, to increase lamp life. The  
FAN7710V detects switch operation after ignition mode  
through an internal active Zero-Voltage Switching (ZVS)  
control circuit. This control scheme enables the  
FAN7710V to detect an open-lamp condition, without the  
expense of external circuitry, and prevents stress on the  
MOSFETs. The high-side driver in the FAN7710V has a  
common-mode noise cancellation circuit that provides  
robust operation against high-dv/dt noise intrusion.  
.
.
Integrated Half-Bridge MOSFET  
Floating Channel FAN7710V for Bootstrap Operation  
to +440V  
.
.
.
.
.
.
.
.
Low Startup and Operating Current: 120μA, 2.6mA  
Under-Voltage Lockout with 1.8V of Hysteresis  
Adjustable Run Frequency and Preheat Time  
Internal Active ZVS Control  
Internal Protection Function (No Lamp)  
Internal Clamping Zener Diode  
High Accuracy Oscillator  
Soft-Start Functionality  
8-DIP  
Applications  
.
Compact Fluorescent Lamp Ballast  
Ordering Information  
Operating  
Temperature  
Part Number  
Package  
Packing Method  
FAN7710VN  
-40 to +125°C  
8-Lead Dual Inline Package (DIP)  
Tube  
© 2009 Fairchild Semiconductor Corporation  
FAN7710V • 1.0.4  
www.fairchildsemi.com  
Typical Applications Diagrams  
Figure 1. Typical Application Circuit for Compact Fluorescent Lamp  
Internal Block Diagram  
Figure 2. Functional Block Diagram  
© 2009 Fairchild Semiconductor Corporation  
FAN7710V • 1.0.4  
www.fairchildsemi.com  
2
Pin Configuration  
Figure 3. Pin Configuration (Top View)  
Pin Definitions  
Pin #  
Name  
VDC  
VB  
Description  
1
2
3
4
5
6
7
8
High-Voltage Supply  
High-Side Floating Supply  
Supply Voltage  
VDD  
RT  
Oscillator Frequency Set Resistor  
Preheating Time Set Capacitor  
Signal Ground  
CPH  
SGND  
PGND  
OUT  
Power Ground  
High-Side Floating Supply Return  
© 2009 Fairchild Semiconductor Corporation  
FAN7710V • 1.0.4  
www.fairchildsemi.com  
3
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be  
operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In  
addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The  
absolute maximum ratings are stress ratings only. TA=25°C unless otherwise specified.  
Symbol  
VB  
Parameter  
High-Side Floating Supply Voltage  
High-Side Floating Supply Return  
RT, CPH Pins Input Voltage  
Min.  
-0.3  
-0.3  
-0.3  
Typ.  
Max.  
465.0  
440.0  
8.0  
Unit  
V
VOUT  
VIN  
V
V
ICL  
Clamping Current Level(1)  
25  
mA  
V/ns  
°C  
dVOUT/dt  
TA  
Allowable Offset Voltage Slew Rate  
Operating Temperature Range  
Storage Temperature Range  
50  
-40  
-65  
+125  
+150  
TSTG  
°C  
PD  
Power Dissipation  
2.1  
70  
W
Thermal Resistance, Junction-to-Air  
°C/W  
ΘJA  
Note:  
1. Do not supply a low-impedance voltage source to the internal clamping Zener diode between the GND and the  
VDD pin of this device.  
© 2009 Fairchild Semiconductor Corporation  
FAN7710V • 1.0.4  
www.fairchildsemi.com  
4
Electrical Characteristics  
VBIAS (VDD, VB -VOUT)=14.0V and TA=25°C, unless otherwise specified.  
Symbol  
Parameter  
Conditions  
Min. Typ. Max. Unit  
High-Voltage Supply Section  
VDC  
High-Voltage Supply Voltage  
440  
V
Low-Side Supply Section (VDD  
)
VDDTH(ST+) VDD UVLO Positive-Going Threshold  
VDDTH(ST-) VDD UVLO Negative-Going Threshold  
VDDHY(ST) VDD-Side UVLO Hysteresis  
VDD Increasing  
12.4  
10.8  
13.4  
11.6  
1.8  
14.4  
12.4  
VDD Decreasing  
V
VCL  
IST  
Supply Camping Voltage  
IDD=10mA  
14.8  
15.2  
120  
2.6  
Startup Supply Current  
VDD=10V  
µA  
IDD  
Dynamic Operating Supply Current  
50kHz, CL=1nF  
mA  
High-Side Supply Characteristics (VB-VOUT  
)
VHSTH(ST+) High-Side UVLO Positive-Going Threshold  
VHSTH(ST-) High-Side UVLO Negative-Going Threshold  
VHSHY(ST) High-Side UVLO Hysteresis  
VB-VOUT Increasing  
VB-VOUT Decreasing  
8.5  
7.9  
9.2  
8.6  
0.6  
50  
10.0  
9.5  
V
IHST  
IHD  
High-Side Quiescent Supply Current  
VB -VOUT=14V  
µA  
High-Side Dynamic Operating Supply Current  
50kHz, CL=1nF  
250  
Oscillator Section  
VMPH CPH Pin Preheating Voltage Range  
IPH  
2.5  
1.25  
8
3.0  
2.00  
12  
3.5  
2.85  
16  
V
CPH Pin Charging Current During Preheating  
CPH Pin Charging Current During Ignition  
CPH Pin Voltage Level at Running Mode  
Preheating Frequency  
VCPH=1V  
VCPH=4V  
µA  
IIG  
VMO  
fPRE  
fOSC  
7.0  
85  
V
72  
98  
kHz  
kHz  
RT=80kΩ, VCPH=2V  
RT=80kΩ  
Running Frequency  
48.7  
53.0  
57.3  
VCPH=1V, VOUT=SGND  
During Preheat Mode  
DTMAX  
DTMIN  
Maximum Dead Time  
Minimum Dead Time  
3.1  
1.0  
µs  
µs  
VCPH=6V, VOUT=SGND  
During Run Mode  
Protection Section  
VCPHSD Shutdown Voltage  
2.6  
V
VRT=0 After Run Mode  
ISD  
Shutdown Current  
250  
450  
µA  
°C  
TSD  
Thermal Shutdown(2)  
+165  
Internal MOSFET Section  
ILKMOS  
RON  
IS  
Internal MOSFET Leakage Current  
Static Drain-Source On-Resistance  
VDS=400V  
50  
6.0  
µA  
VGS=10V, ID=190mA  
4.6  
Maximum Continuous Drain-Source Diode Forward Current  
0.38  
3.04  
1.4  
A
V
ISM  
Maximum Pulsed Continuous Drain-Source Diode Forward Current  
VSD  
Drain-Source Diode Forward Voltage  
VGS=0V, IS=0.38A  
Note:  
2. These parameters, although guaranteed, is not 100% tested in production.  
© 2009 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7710V • 1.0.4  
5
Typical Performance Characteristics  
Figure 4. Startup Current vs. Temperature  
Figure 5. Preheating Current vs. Temperature  
Figure 6. Ignition Current vs. Temperature  
Figure 7. Operating Current vs. Temperature  
Figure 8. High-Side Quiescent Current  
vs. Temperature  
Figure 9. Shutdown Current vs. Temperature  
© 2009 Fairchild Semiconductor Corporation  
FAN7710V • 1.0.4  
www.fairchildsemi.com  
6
Typical Performance Characteristics (Continued)  
Figure 10. VDD UVLO vs. Temperature  
Figure 11. VBS UVLO vs. Temperature  
Figure 12. VDD Clamp Voltage vs. Temperature  
Figure 13. Shutdown Voltage vs. Temperature  
Figure 14. Running Frequency vs. Temperature  
Figure 15. Preheating Frequency vs. Temperature  
© 2009 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7710V • 1.0.4  
7
Typical Performance Characteristics (Continued)  
Figure 16. Minimum Dead Time vs. Temperature  
Figure 17. Maximum Dead Time vs. Temperature  
Figure 19. On-Resistance Variation vs.  
Drain Current and Gate Voltage  
Figure 18. On-Region Characteristics  
Figure 20. Body Diode Forward Voltage Variation  
vs. Source Current and Temperature  
Figure 21. Breakdown Voltage Variation  
vs. Temperature  
© 2009 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7710V • 1.0.4  
8
Typical Performance Characteristics (Continued)  
Figure 22. On-Resistance Variation vs. Temperature  
Figure 23. Maximum Safe Operating Area  
Figure 24. Maximum Drain-Current  
vs. Case Temperature  
© 2009 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7710V • 1.0.4  
9
Typical Application Information  
result, the current warms up the filament for easy  
ignition. The amount of the current can be adjusted by  
controlling the oscillation frequency or changing the  
capacitance of CP. The driving frequency, fPRE, is called  
preheating frequency and is derived by:  
1. Under-Voltage Lockout (UVLO) Function  
The FAN7710V has UVLO circuits for both high-side and  
low-side circuits. When VDD reaches VDDTH(ST+), UVLO is  
released and the FAN7710V operates normally. At UVLO  
condition, FAN7710V consumes little current, noted as  
IST. Once UVLO is released, FAN7710V operates  
normally until VDD goes below VDDTH(ST-), the UVLO  
hysteresis. At UVLO condition, all latches that determine  
the status of the IC are reset. When the IC is in the  
shutdown mode, the IC can restart by lowering VDD  
fPRE = 1.6 × fOSC  
(1)  
After the warm-up, the FAN7710V decreases the  
frequency, shown as (B) of Figure 26. This action  
increases the voltage of the lamp and helps the  
fluorescent lamp ignite. The ignition frequency is  
described as a function of CPH voltage, as follows:  
voltage below VDDTH(ST-)  
.
FAN7710V has a high-side gate driver circuit. The supply  
for the high-side driver is applied between VB and VOUT  
.
+1 × f  
CPH OSC  
fIG  
=
0.3 × 5-V  
(2)  
(
)
To protect from malfunction of the driver at low supply  
voltage between VB and VOUT, there is an additional  
UVLO circuit between the supply rails. If VB-VOUT is under  
VHSTH(ST+), the driver holds LOW state to turn off the high-  
side switch, as shown in Figure 25. As long as VB-VOUT is  
where VCPH is the voltage of CPH capacitor.  
Equation 2 is valid only when VCPH is between 3V and 5V  
before entering running mode. Once VCPH reaches 5V,  
the internal latch records the exit from ignition mode.  
Unless VDD is below VDDTH(ST-), the preheating and  
ignition modes appear only during lamp-start transition.  
higher than VHSTH(ST-) after VB-VOUT exceeds VHSTH(ST+)  
operation of the driver continues.  
,
2. Oscillator  
Finally, the lamp is driven at a fixed frequency by an  
external resistor, RT, shown as (C) in Figure 26. If VDD is  
higher than VDDTH(ST+) and UVLO is released, the voltage  
of the RT pin is regulated to 4V. This voltage adjusts the  
oscillator's control current according to the resistance of  
RT. Because this current and an internal capacitor set the  
oscillation frequency, the FAN7710V does not need any  
external capacitors.  
The ballast circuit for a fluorescent lamp is based on the  
LCC resonant tank and a half-bridge inverter circuit, as  
shown in Figure 25. To accomplish Zero-Voltage  
Switching (ZVS) of the half-bridge inverter circuit, the  
LCC is driven at a higher frequency than its resonant  
frequency, which is determined by L, CS, CP, and RL;  
where RL is the equivalent lamp's impedance.  
VDC  
The proposed oscillation characteristic is given by:  
FAN7710  
VDD  
RT  
VDC  
4 ×109  
RT  
Inverter  
(3)  
fOSC  
=
Oscillator  
VB  
VDD  
High-side  
LCC resonant tank  
driver  
Even in the active ZVS mode, shown as (D) in Figure 26,  
the oscillation frequency is not changed. The dead time  
is varied according to the resonant tank characteristic.  
Filament  
L
CS  
RT  
Dead-time  
controller  
CPH  
OUT  
PGND  
Low-side  
driver  
CPH  
SGND  
RL  
CP  
40dB  
equivalent lamp impedance  
FAN7710 Rev. 1.00  
Figure 25. Typical Connection Method  
RL=100k  
The transfer function of LCC resonant tank is heavily  
dependent on the lamp impedance, RL, as illustrated in  
Figure 26. The oscillator in FAN7710V generates  
effective driving frequencies to assist lamp ignition and  
improve lamp life longevity. Accordingly, the oscillation  
frequency is changed in following sequence:  
20dB  
RL=10k  
Preheating  
frequency  
(B)  
0dB  
Preheating Frequency Ignition Frequency Normal  
Running Frequency  
(A)  
(C)  
RL=1k  
Running frequency  
RL=500  
Before the lamp is ignited, the lamp impedance is very  
high. Once the lamp is turned on, the lamp impedance  
significantly decreases. Since the resonant peak is very  
high due to the high-resistance of the lamp at the instant  
of turning on the lamp, the lamp must be driven at higher  
frequency than the resonant frequency, shown as (A) in  
Figure 26. In this mode, the current supplied by the  
inverter mainly flows through CP. CP connects both  
filaments and makes the current path to ground. As a  
(D) Dead-time control mode  
at fixed frequency  
FAN7710 Rev. 1.00  
Figure 26. LCC Transfer Function in Terms  
of Lamp Impedance  
© 2009 Fairchild Semiconductor Corporation  
FAN7710V • 1.0.4  
www.fairchildsemi.com  
10  
3.2 Ignition Mode (t1~t2)  
3. Operation Modes  
FAN7710V has four operation modes: (A) preheating  
mode, (B) ignition mode, (C) active ZVS mode and (D)  
shutdown mode; all depicted in Figure 27. The modes  
are automatically selected by the voltage of CPH  
capacitor shown in Figure 27. In modes (A) and (B), the  
CPH acts as a timer to determine the preheating and  
ignition times. After preheating and ignition modes, the  
role of the CPH is changed to stabilize the active ZVS  
control circuit. In this mode, the dead time of the inverter  
is selected by the voltage of CPH. Only when in active  
ZVS mode is it possible to shut off the whole system  
using the CPH pin. Pulling the CPH pin below 2V in  
active ZVS mode causes the FAN7710V series to enter  
shutdown mode. In shutdown mode, all active operation  
is stopped except UVLO and some bias circuitry. The  
shutdown mode is triggered by the external CPH control  
or the active ZVS circuit. The active ZVS circuit  
automatically detects lamp removal (open-lamp  
condition) and decreases CPH voltage below 2V to  
protect the inverter switches from damage.  
When the CPH voltage exceeds 3V, the internal  
current source charging CPH is increased about six  
times larger than IPH, noted as IIG, causing rapid  
increase in CPH voltage. The internal oscillator  
decreases the oscillation frequency from fPRE to fOSC as  
CPH voltage increases. As depicted in Figure 27,  
lowering the frequency increases the voltage across  
the lamp. Finally, the lamp ignites. Ignition mode is  
when CPH voltage is between 3V and 5V. Once CPH  
voltage reaches 5V, the FAN7710V does not return to  
ignition mode, even if the CPH voltage is in that range,  
until the FAN7710V restarts from below VDDTH(ST-)  
.
Since the ignition mode continues when CPH is from  
3V to 5V, the ignition time is given by:  
2×CPH  
IIG  
tignition  
=
[seconds]  
(5)  
In this mode, dead time varies according to the CPH  
voltage.  
CPH voltage [V]  
(C) Active ZVS mode  
3.3 Running Mode and Active Zero-Voltage Switching  
(AZVS) Mode (t2~)  
8
(B) Ignition Mode  
7
6
5
When CPH voltage exceeds 5V, the operating  
frequency is fixed to fOSC by RT. However, active ZVS  
operation is not activated until CPH reaches ~6V. Only  
the FAN7710V prepares for active ZVS operation from  
the instant CPH exceeds 5V during t2 to t3. When  
CPH becomes higher than ~6V at t3, the active ZVS  
operation is activated. To determine the switching  
condition, FAN7710V detects the transition time of the  
output (VS pin) of the inverter by using the VB pin.  
From the output-transition information, FAN7710V  
controls the dead time to meet the ZVS condition. If  
ZVS is satisfied, the FAN7710V slightly increases the  
CPH voltage to reduce the dead time and to find  
optimal dead time, which increases the efficiency and  
decreases the thermal dissipation and EMI of the  
inverter switches. If ZVS fails, the FAN7710V  
decreases CPH voltage to increase the dead time.  
CPH voltage is adjusted to meet optimal ZVS  
operation. During the active ZVS mode, the amount of  
(A) Preheating Mode  
4
3
2
(D) Shutdown  
mode  
1
0
3
2
1
time  
0
Dead-Time[μs]  
Oscillation  
frequency  
Preheating Frquency:fPRE  
Preheating  
Mode  
Running frequency:  
fOSC  
Running  
Mode  
Ignition  
Mode  
time  
t0  
FAN7710 Rev. 1.00  
t1 t2 t3  
Figure 27. Operation Modes  
3.1 Preheating Mode (t0~t1)  
the charging / discharging current is the same as IPH  
.
When VDD exceeds VDDTH(ST+), the FAN7710V series  
starts operation. At this time, an internal current source  
(IPH) charges CPH. CPH voltage increases from 0V to  
3V in preheating mode. Accordingly, the oscillation  
frequency follows Equation 4. In this mode, the lamp is  
not ignited, but warmed up for easy ignition. The  
preheating time depends on the size of CPH:  
Figure 28 depicts normal operation waveforms.  
3×CPH  
IPH  
tpreheat  
=
[seconds]  
(4)  
According to the preheating process, the voltage  
across the lamp to ignite is reduced and the lifetime of  
the lamp is increased. In this mode, the dead time is  
fixed at its maximum value.  
© 2009 Fairchild Semiconductor Corporation  
FAN7710V • 1.0.4  
www.fairchildsemi.com  
11  
4. Automatic Open-Lamp Detection  
The FAN7710V can automatically detect an open-lamp  
condition. When the lamp is opened, the resonant tank  
fails to make a closed-loop to the ground, as shown in  
Figure 30. The supplied current from the OUT pin is used  
to charge and discharge the charge pump capacitor, CP.  
Since the open-lamp condition means resonant tank  
absence, it is impossible to meet ZVS condition. In this  
condition, the power dissipation of the FAN7710V, due to  
capacitive load drive, is estimated as:  
1
2
Pdissipation  
=
×CP ×VDC × f [W ]  
(6)  
2
where f is driving frequency and VDC is DC-link voltage.  
Figure 28. LCC Transfer Function in Terms  
of Lamp Impedance  
Figure 30. Current Flow When the Lamp is Open  
Assuming that CP, VDC, and f are 1nF, 311V, and 50kHz,  
respectively; the power dissipation reaches about 2.4W  
and the temperature of is increased rapidly. If no  
protection is provided, the IC can be damaged by the  
thermal attack. Note that a hard-switching condition  
during the capacitive-load drive causes EMI.  
3.4 Shutdown Mode  
If the voltage of capacitor CPH is decreased below  
~2.1V by an external application circuit or internal  
protection circuit, the IC enters shutdown mode. Once  
the IC enters shutdown mode, this status continues  
until an internal latch is reset by decreasing VDD below  
Figure 31 illustrates the waveforms during the open-lamp  
condition. In this condition, the charging and discharging  
current of CP is directly determined by FAN7710V and  
considered hard-switching condition. The FAN7710V  
tries to meet ZVS condition by decreasing CPH voltage  
to increase dead time. If ZVS fails and CPH goes below  
2V, even though the dead time reaches its maximum  
value, FAN7710V shuts off the IC to protect against  
damage. To restart FAN7710V, VDD must be below  
VDDTH(ST-) to reset an internal latch circuit, which  
remembers the status of the IC.  
V
DDTH(ST-). Figure 29 shows an example of external  
shutdown control circuit.  
Figure 29. External Shutdown Circuit  
Shutdown  
Release Restart  
The amount of the CPH charging current is the same  
as IPH, making it possible to shut off the IC using a  
small signal transistor. Only the FAN7710V provides  
active ZVS operation by controlling the dead time  
according to the voltage of CPH. If ZVS fails, even at  
the maximum dead time, FAN7710V stops driving  
the inverter.  
VDD  
VDDTH(ST+)  
VDDTH(ST-)  
time  
Active ZVS activated  
CPH  
6V  
5V  
Automatic  
Shutdown  
3V  
2V  
The FAN7710V thermal shutdown circuit senses the  
junction temperature of the IC. If the temperature  
exceeds ~160°C, the thermal shutdown circuit stops  
operation of the FAN7710V.  
time  
Running mode  
Active ZVS mode  
OUT  
0V  
time  
The current usages of shutdown mode and under-  
voltage lockout status are different. In shutdown mode,  
some circuit blocks, such as bias circuits, are kept  
alive. Therefore, the current consumption is slightly  
higher than during under-voltage lockout.  
Shutdown  
mode  
Preheating period  
(Filament warm-up)  
Ignition period  
FAN7710 Rev. 1.00  
Figure 31. CPH Voltage Variation During Open-Lamp  
© 2009 Fairchild Semiconductor Corporation  
FAN7710V • 1.0.4  
www.fairchildsemi.com  
12  
This current flows along path 1 in Figure 32. It charges  
CVDD, which is a bypass capacitor to reduce the noise on  
the supply rail. If CVDD is charged over the threshold  
voltage of the internal shunt regulator, the shunt  
regulator turns on and regulates VDD with the trigger  
voltage.  
5. Power Supply  
When VDD is lower than VDDTH(ST+), it consumes very little  
current, IST, making it possible to supply current to the  
VDD pin using a resistor with high resistance (Rstart in  
Figure 32). Once UVLO is released, the current  
consumption is increased and whole circuit is operated,  
which requires additional power supply for stable  
operation. The supply must deliver at least several mA. A  
charge pump circuit is a cost-effective method to create  
an additional power supply and allows CP to be used to  
reduce the EMI.  
When OUT is changing from HIGH to LOW state, CCP is  
discharged through Dp2, shown as path 2 in Figure 32.  
These charging/discharging operations are continued  
until FAN7710V is halted by shutdown operation. The  
charging current, I, must be large enough to supply the  
operating current of FAN7710V.  
VDC  
The supply for the high-side gate driver is provided by  
the boot-strap technique, as illustrated in Figure 33.  
When the low-side MOSFET connected between OUT  
and PGND pins is turned on, the charging current for VB  
flows through DB. Every low OUT gives the chance to  
charge the CB. Therefore, CB voltage builds up only when  
FAN7710V operates normally.  
Rstart  
FAN7710  
dv/dt  
VDD  
RT  
VDC  
VB  
Shunt  
regulator  
CS  
(2)  
L
CVDD  
CPH  
SGND  
OUT  
PGND  
RL  
CP  
When OUT goes HIGH, the diode DB is reverse-biased  
and CB supplies the current to the high-side driver. At this  
time, since CB discharges, VB-VOUT voltage decreases. If  
VB-VOUT goes below VHSTH(ST-), the high-side driver  
cannot operate due to the high-side UVLO protection  
circuit. CB must be chosen to be large enough not to fall  
into UVLO range, due to the discharge during a half of  
the oscillation period, especially when the high-side  
MOSFET is turned on.  
(1)  
CCP  
Dp1  
Dp2  
FAN7710 Rev. 1.00  
Charge pump  
Figure 32. Local Power Supply for VDD Using a  
Charge-Pump Circuit  
VDC  
DB  
As presented in Figure 32; when OUT is HIGH, the  
inductor current and CCP create an output transition with  
FAN7710  
Rstart  
Bootstrap circuit  
the slope of dv/dt. The rising edge of OUT charges CCP  
.
VDD  
RT  
VDC  
VB  
At that time, the current that flows through CCP is:  
dv  
CB  
I CCP  
×
(7)  
L
CS  
CVDD  
dt  
CPH  
SGND  
OUT  
PGND  
RL  
CP  
Chraging path  
Cp  
Dp1  
Dp2  
FAN7710 Rev. 1.00  
Figure 33. Implementation of Floating Power Supply  
Using the Bootstrap Method  
© 2009 Fairchild Semiconductor Corporation  
FAN7710V • 1.0.4  
www.fairchildsemi.com  
13  
Design Guide  
If Rstart meets Equation 14, restart operation is possible.  
However, it is not recommended to choose Rstart at that  
range since VDD rising time could be long and increase  
the lamp's turn-on delay time, as depicted in Figure 34.  
1. Startup Circuit  
The startup current (IST) has to be supplied to the IC  
through the startup resistor, Rstart. Once operation starts,  
the power is supplied by the charge pump circuit. To  
reduce the power dissipation in Rstart, select Rstart as high  
as possible, considering the current requirements at  
startup. For 220VAC power, the rectified voltage by the  
full-wave rectifier makes DC voltage, as shown in  
Equation 8. The voltage contains lots of AC component,  
due to poor regulation characteristic of the simple full-  
wave rectifier:  
VDD  
VCL  
VDDTH(ST+)  
VDDTH(ST-)  
tstart  
(8)  
VDC  
= 2 ×220[V] 311[V]  
Considering the selected parameters, Rstart must satisfy  
the following equation:  
0
time  
FAN7710 Rev. 1.00  
VDC VDDTH(ST +)  
> IST  
(9)  
Figure 34. VDD Build-up  
Rstart  
Figure 35 shows the equivalent circuit for estimating tstart  
From the circuit analysis, VDD variation versus time is  
given by:  
.
From Equation 9, Rstart is selected as:  
VDC VDDTH(ST +)  
> R start  
(10)  
IST  
start CVDD  
)
VDD (t) = V Rstart IST 1 et /(R  
(
)
(15)  
(
)
DC  
Note that if choosing the maximum Rstart, it takes a long  
time for VDD to reach VDDTH(st+). Considering VDD rising  
time, Rstart must be selected as shown in Figure 34.  
Another important concern for choosing Rstart is the  
available power rating of Rstart. To use a commercially  
available, low-cost 1/4Ω resistor, Rstart must obey the  
following rule:  
where CVDD is the total capacitance of the bypass  
capacitors connected between VDD and GND.  
From Equation 15, it is possible to calculate tstart by  
substituting VDD(t) with VDDTH(ST+)  
:
VDC Rstart IST VDDTH(ST +)  
VDD Rstart IST  
tstart = −Rstart CVDD ln  
(16)  
(17)  
2
V
VCL  
(
)
1
4
DC  
(11)  
<
[W ]  
In general, Equation 16 can be simplified as:  
Rstart  
Rstart CVDD VDDTH(ST +)  
Assuming VDC=311V and VCL=15V, the minimum  
resistance of Rstart is about 350kΩ.  
tstart  
VDC Rstart IST VDDTH(ST +)  
When the IC operates in shutdown mode due to thermal  
protection, open-lamp protection, or hard-switching  
protection; the IC consumes shutdown current, ISD, which  
is larger than IST. To prevent restart during this mode,  
Rstart must be selected to cover ISD current consumption.  
The following equation must be satisfied:  
Accordingly, tstart can be controlled by adjusting the value  
of Rstart and CVDD For example, if VDC=311V,  
.
Rstart=560kΩ, CVDD=10µF, Ist=120µA, and VDDTH(ST+)  
=
13.5V; tstart is about 0.33s.  
VDC VDDTH(ST +)  
> R start  
(12)  
ISD  
RSTART  
From Equations 10 - 12; it is possible to select Rstart  
:
IST  
(1) For safe startup without restart in shutdown mode:  
VDD  
VDC VDDTH(ST +)  
2
4 V VCL < Rstart  
<
(
)
(13)  
DC  
ISD  
(2) For safe startup with restart from shutdown mode:  
CVDD  
VDC VDDTH(ST +)  
VDC VDDTH(ST +)  
SGND  
< Rstart  
<
(14)  
ISD  
IST  
Figure 35. Equivalent Circuit During Startup  
© 2009 Fairchild Semiconductor Corporation  
FAN7710V • 1.0.4  
www.fairchildsemi.com  
14  
2. Current Supplied by Charge Pump  
3. Lamp Turn-On Time  
For the IC supply, the charge pump method is used in  
Figure 36. Since CCP is connected to the half-bridge  
output, the supplied current by CCP to the IC is  
determined by the output voltage of the half-bridge.  
The turn-on time of the lamp is determined by supply  
build-up time tstart, preheating time, and ignition time;  
where tstart has been obtained by Equation 17. When the  
IC's supply voltage exceeds VDDTH(ST+) after turn-on or  
restart, the IC operates in preheating mode. This  
operation continues until CPH pin's voltage reaches ~3V.  
In this mode, CPH capacitor is charged by IPH current, as  
depicted in Figure 37. The preheating time is achieved  
by calculating:  
When the half-bridge output shows rising slope, CCP is  
charged and the charging current is supplied to the IC.  
The current can be estimated as:  
VDC  
DT  
dV  
dt  
I = CCP  
CCP  
(18)  
3 × CPH  
IPH  
tpreheat  
=
[seconds]  
(21)  
where DT is the dead time and dV/dt is the voltage  
variation of the half-bridge output.  
The preheating time is related to lamp life (especially  
filament). Therefore, the characteristics of a given lamp  
should be considered when choosing the time.  
When the half-bridge shows falling slope, CCP is  
discharged through Dp2. Total supplied current, Itotal, to  
the IC during switching period, t, is:  
Itotal = I DT = CCP VDC  
IPH  
(19)  
From Equation 19, the average current, Iavg, supplied to  
the IC is obtained by:  
CPH  
Itotal CCP VDC  
CPH  
Iavg  
=
=
= CCP VDC f  
(20)  
t
t
SGND  
For stable operation, Iavg must be higher than the  
required current. If Iavg exceeds the required current, the  
residual current flows through the shunt regulator  
implemented on the chip, which can cause unwanted  
heat generation. Therefore, CCP must be selected  
considering stable operation and thermal generation.  
Figure 37. Preheating Timer  
Compared to the preheating time, it is almost impossible  
to exactly predict the ignition time, whose definition is the  
time from the end of the preheating time to ignition. In  
general, the lamp ignites during the ignition mode.  
Therefore, assume that the maximum ignition time is the  
same as the duration of ignition mode, from 3V until CPH  
reaches 5V. Thus, ignition time can be defined as:  
For example, if CCP=0.5nF, VDC=311V, and f=50kHz, Iavg  
is ~7.8mA; it is enough current for stable operation.  
Discharging mode  
Charging mode  
CCP  
CCP  
Dp1  
To VDD  
Dp1  
To VDD  
Idp1=0  
Idp1  
CVDD  
CVDD  
CPH  
IIG  
CPH  
IIG  
Dp2  
Dp2  
tignition = (5 3)  
= 2  
(22)  
f=1/t  
Note that in ignition mode, CPH is charged by IIG, which  
is six times larger than IPH. Consequently, total turn-on  
time is approximately VDD Build-Time + Preheating Time  
+ Ignition Time, or:  
VDC  
DT:dead time  
Half-bridge output  
CPH  
IIG  
CPH  
IIG  
tignition  
=
(5 3  
)
= 2  
[seconds]  
(23)  
Idp1  
FAN7710 Rev. 1.00  
Figure 36. Charge Pump Operation  
© 2009 Fairchild Semiconductor Corporation  
FAN7710V • 1.0.4  
www.fairchildsemi.com  
15  
Component List for 20W CFL Application (3)  
Part  
Value  
Note  
Part  
Value  
Diode  
Note  
Resistor  
R1(4)  
R2  
470k  
90kΩ  
0.25W  
D1  
D2  
D3  
D4  
D5  
1N4007  
1N4007  
1N4007  
1N4007  
UF4007  
1kV, 1A  
1kV, 1A  
1kV, 1A  
1kV, 1A  
1kV, 1A  
0.25W, 1%  
Capacitor  
C1  
10μF/400V  
10μF/50V  
Electrolytic Capacitor, 105°C  
C2(5)  
Electrolytic Capacitor, 105°C  
Miller Capacitor  
C3  
C4  
100nF/25V  
470pF/500V  
680nF/25V  
2.7nF/1kV  
33nF/630V  
D6  
D7  
UF4007  
UF4007  
IC  
1kV, 1A  
1kV, 1A  
Ceramic Capacitor  
Miller Capacitor, 5%  
Miller Capacitor  
C5(6)  
C6(7)  
C7(7)  
IC  
FAN7710V  
Ballast IC  
Miller Capacitor  
Inductor  
L2(7)  
2.5mH  
EE1916S,280T  
Notes:  
3. Refer to the Typical Application Circuit for 3U type CFL lamp provided in Figure 1.  
4. Refer to the Design Guide startup circuit in Figure 35. Due to reducing power loss on the startup resistor (R1) for  
high-efficiency systems, it is possible to use a higher resistor value than recommended. In this case, the IC doesn’t  
reliably keep SD (shutdown) state for protection. Carefully select the startup resistor (R1) or use the recommended  
value (470k) to sufficiently supply shutdown current (ISD) and startup current (IST).  
5. Normally, this component could be changed to a normal miller capacitor to increase system reliability instead of  
the electrolytic capacitor with high temperature characteristics.  
6. Temperature dependency of the capacitance is important to prevent destruction of the IC. Some capacitors show  
capacitance degradation in high temperatures and cannot guarantee enough preheating time to safely ignite the  
lamp during the ignition period at high temperatures. If the lamp does not ignite during the ignition period, the IC  
cannot guarantee ZVS operation, Thus, the peak current of the switching devices can be increased above  
allowable peak current level of the switching devices. Especially in high temperatures, the switching device can be  
easily destroyed. Consequently, CPH capacitor (C5) must be large enough to warm the filaments of the lamp up  
over the concerning temperature range.  
7. Consider the components (L2, C6, C7) of resonant tank variation over the concerning temperature range. Normally,  
these components would be changed toward increasing inductance and capacitance in high temperature. That  
means that the resonant frequency is decreased. In the lower resonant frequency condition, the preheating current  
reduces, so the resonant tank cannot supply enough to preheat the filaments before lamp turn on. If the preheating  
current is insufficient, the ignition voltage / current is increased. Check the ignition current in high temperature: the  
current capacity of internal MOSFETs on IC must be larger than ignition current.  
© 2009 Fairchild Semiconductor Corporation  
FAN7710V • 1.0.4  
www.fairchildsemi.com  
16  
Physical Dimensions  
9.83  
9.00  
6.67  
6.096  
8.255  
7.61  
3.683  
3.20  
7.62  
5.08 MAX  
0.33 MIN  
3.60  
3.00  
(0.56)  
2.54  
0.356  
0.20  
0.56  
0.355  
9.957  
7.87  
1.65  
1.27  
7.62  
NOTES: UNLESS OTHERWISE SPECIFIED  
A) THIS PACKAGE CONFORMS TO  
JEDEC MS-001 VARIATION BA  
B) ALL DIMENSIONS ARE IN MILLIMETERS.  
C) DIMENSIONS ARE EXCLUSIVE OF BURRS,  
MOLD FLASH, AND TIE BAR EXTRUSIONS.  
D) DIMENSIONS AND TOLERANC  
ASME Y14.5M-1994  
ES PER  
E) DRAWING FILENAME AND REVSION: MKT-N08FREV2.  
Figure 38. 8-Lead, Dual Inline Package (DIP)  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,  
specifically the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/.  
© 2009 Fairchild Semiconductor Corporation  
FAN7710V • 1.0.4  
www.fairchildsemi.com  
17  
© 2009 Fairchild Semiconductor Corporation  
FAN7710V • 1.0.4  
www.fairchildsemi.com  
18  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent  
coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.  
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