FCH085N80-F155 [ONSEMI]

功率 MOSFET，N 沟道，SUPERFET® II，800 V，46 A，85 mΩ，TO-247;


型号：	FCH085N80-F155
厂家：	ONSEMI
描述：	功率 MOSFET，N 沟道，SUPERFET® II，800 V，46 A，85 mΩ，TO-247
文件：	总10页 (文件大小：567K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MOSFET – N-Channel,

SUPERFET⁾II

800 V, 46 A, 85 mW

FCH085N80

Description

SuperFET II MOSFET is ON Semiconductor’s brand−new high

voltage super−junction (SJ) MOSFET family that is utilizing charge

balance technology for outstanding low on−resistance and lower gate

charge performance. This technology is tailored to minimize

conduction loss, provide superior switching performance, dv/dt rate

and higher avalanche energy. Consequently, SuperFET II MOSFET is

very suitable for the switching power applications such as PFC,

server/telecom power, FPD TV power, ATX power and industrial

power applications.

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MAX

I MAX

DS(ON)

800 V

85 mW @ 10 V

46 A

Features

• Typ. R

= 67 mW

• 850 V @ T = 150°C

DS(on)

• Ultra Low Gate Charge (Typ. Q = 196 nC)

• Low E

(Typ. 18 mJ @ 400 V)

OSS

• Low Effective Output Capacitance (Typ. C

• 100% Avalanche Tested

= 568 pF)

oss(eff.)

N-CHANNEL MOSFET

• These Devices are Pb−Free and are RoHS Compliant

Applications

• AC−DC Power Supply

• LED Lighting

TO−247−3LD

CASE 340CH

MARKING DIAGRAM

FCH085N80

AYWWG

FCH085N80 = Specific Device Code

= Assembly Location

= Year

= Work Week

= Pb−Free Package

ORDERING INFORMATION

See detailed ordering and shipping information on page 2 of

this data sheet.

Publication Order Number:

November, 2019 − Rev. 3

FCH085N80/D

FCH085N80

ABSOLUTE MAXIMUM RATINGS (T = 25°C unless otherwise noted)

Symbol

Parameter

Value

800

Unit

DSS

GSS

Drain to Source Voltage

Gate to Source Voltage

− DC

− AC (f > 1 Hz)

Drain Current:

− Continuous (T = 25°C)

− Continuous (T = 100°C)

Drain Current:

− Pulsed (Note 1)

138

Single Pulsed Avalanche Energy (Note 2)

Avalanche Current (Note 2)

Repetitive Avalanche Energy (Note 1)

MOSFET dv/dt

1701

9.2

4.4

V/ns

dv/dt

100

Peak Diode Recovery dv/dt (Note 3)

Power Dissipation

(T = 25°C)

446

W/°C

°C

Derate Above 25°C

3.5

T , T

Operating and Storage Temperature Range

−55 to + 150

300

STG

Maximum Lead Temperature for Soldering, 1/8″ from Case for 5 seconds

°C

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be affected.

1. Repetitive rating: pulse−width limited by maximum junction temperature.

2. I = 9.2 A, V = 50 V, R = 25 W, starting T = 25 °C.

3. I ≤ 46 A, di/dt ≤ 200 A/ms, V ≤ BV

, starting T = 25 °C.

DSS

PACKAGE MARKING AND ORDERING INFORMATION

Part Number

Top Marking

Package

Packing Method

Reel Size

Tape Width

Quantity

FCH085N80−F155

FCH085N80

TO−247 G03

Tube

N/A

30 Units

THERMAL CHARACTERISTICS

Symbol

Parameter

FCH085N80−F155

Unit

Thermal Resistance, Junction to Case, Max.

Thermal Resistance, Junction to Ambient, Max.

0.28

40.0

°C/W

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FCH085N80

ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

OFF CHARACTERISTICS

Drain to Source Breakdown Voltage

= 0 V, I = 1 mA, T = 25°C

800

−

DSS

DBV

/DT

Breakdown Voltage Temperature

Coefficient

= 1 mA, Referenced to 25°C

−

0.8

V/°C

DSS

Zero Gate Voltage Drain Current

= 800 V, V = 0 V

−

DSS

= 640 V, V = 0 V, T = 125 °C

250

100

Gate to Body Leakage Current

20 V, V = 0 V

GSS

ON CHARACTERISTICS

Gate Threshold Voltage

= V , I = 4.6 mA

2.5

−

4.5

−

GS(th)

DS(on)

Static Drain to Source On Resistance

Forward Transconductance

= 10 V, I = 23 A

= 20 V, I = 23 A

−

DYNAMIC CHARACTERISTICS

Input Capacitance

= 100 V, V = 0 V, f = 1 MHz

−

8140

255

10825

iss

oss

rss

oss

Output Capacitance

340

−

Reverse Transfer Capacitance

Output Capacitance

= 480 V, V = 0 V, f = 1 MHz

1000

728

196

−

Effective Output Capacitance

Total Gate Charge at 10 V

Gate to Source Gate Charge

Gate to Drain “Miller” Charge

Equivalent Series Resistance

= 0 V to 480 V, V = 0 V

−

oss(eff.)

= 640 V, I = 46 A V = 10 V

255

−

g(tot)

(Note 4)

−

ESR

f = 1 MHz

0.8

−

SWITCHING CHARACTERISTICS

Turn-On Delay Time

Turn−On Rise Time

Turn-Off Delay Time

Turn−Off Fall Time

= 400 V, I = 46 A,

−

100

120

330

d(on)

= 10 V, R = 4.7 W

(Note 4)

160

d(off)

DRAIN-SOURCE DIODE CHARACTERISTICS

Maximum Continuous Source to Drain Diode Forward Current

Maximum Pulsed Drain to Source Diode Forward Current

−

138

1.2

−

Drain to Source Diode Forward Voltage

Reverse Recovery Time

= 0 V, I = 46 A

−

= 0 V, I = 46 A,

800

di /dt = 100 A/ms

Reverse Recovery Charge

−

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product

performance may not be indicated by the Electrical Characteristics if operated under different conditions.

4. Essentially independent of operating temperature typical characteristics.

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FCH085N80

TYPICAL CHARACTERISTICS

Figure 2. Transfer Characteristics

Figure 1. On−Region Characteristics

Figure 4. Body Diode Forward Voltage Variation

vs. Source Current and Temperature

Figure 3. On−Resistance Variation vs. Drain

Current and Gate Voltage

Figure 6. Gate Charge Characteristics

Figure 5. Capacitance Characteristics

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FCH085N80

TYPICAL CHARACTERISTICS

Figure 7. Breakdown Voltage Variation vs.

Figure 8. On−Resistance Variation vs.

Temperature

Figure 10. Maximum Drain Current vs. Case

Temperature

Figure 9. Maximum Safe Operating Area

Figure 11. Eoss vs. Drain to Source Voltage

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FCH085N80

TYPICAL CHARACTERISTICS

Figure 12. Transient Thermal Response Curve

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FCH085N80

DUT

= Const.

Charge

Figure 13. Gate Charge Test Circuit & Waveform

90%

10%

90%

10%

DUT

d(off)

d(on)

off

Figure 14. Resistive Switching Test Circuit & Waveforms

E_AS

@ LI_AS

DSS

I (t)

DUT

(t)

Time

Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms

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FCH085N80

DUT

−

Driver

Same Type

as DUT

− dv/dt controlled by R

− I controlled by pulse period

Gate Pulse Width

D +

Gate Pulse Period

10 V

(Driver)

, Body Diode Forward Current

di/dt

(DUT)

Body Diode Reverse Current

Body Diode Recovery dv/dt

(DUT)

Body Diode

Forward Voltage Drop

Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms

SUPERFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or

other countries.

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MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

TO−247−3LD

CASE 340CH

ISSUE A

DATE 09 OCT 2019

GENERIC

MARKING DIAGRAM*

XXXXXXXXX

AYWWG

XXXX = Specific Device Code

= Assembly Location

= Year

WW = Work Week

= Pb−Free Package

*This information is generic. Please refer to

device data sheet for actual part marking.

Pb−Free indicator, “G” or microdot “G”, may

or may not be present. Some products may

not follow the Generic Marking.

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DOCUMENT NUMBER:

DESCRIPTION:

98AON13853G

TO−247−3LD

PAGE 1 OF 1

ON Semiconductor and

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

FCH085N80-F155 [ONSEMI]

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