FDM3622 [ONSEMI]

N 沟道 PowerTrench® MOSFET 100V,4.4A,60mΩ;
FDM3622
型号: FDM3622
厂家: ONSEMI    ONSEMI
描述:

N 沟道 PowerTrench® MOSFET 100V,4.4A,60mΩ

开关 光电二极管 晶体管
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August 2014  
FDM3622  
N-Channel PowerTrench® MOSFET  
100V, 4.4A, 60mΩ  
Features  
General Description  
This N-Channel MOSFET is produced using Fairchild  
Semiconductor's advanced PowerTrench process that has  
been especially tailored to minimize the on-state resistance and  
yet maintain low gate charge for superior switching performance.  
„ Max rDS(on) = 60mΩ at VGS = 10V, ID = 4.4A  
„ Max rDS(on) = 80mΩ at VGS = 6.0V, ID = 3.8A  
„ Low Miller Charge  
®
„ Low QRR Body Diode  
Applications  
„ Optimized efficiency at high frequencies  
„ UIS Capability (Single Pulse and Repetitive Pulse)  
„ RoHS Compliant  
„ Distributed Power Architectures and VRMs.  
„ Primary Switch for 24V and 48V Systems  
„ High Voltage Synchronous Rectifier  
„ Formerly developmental type 82744  
Bottom  
Top  
S
Pin 1  
D
G
S
S
S
S
G
D
D
D
S
D
D
D
D
MLP 3.3x3.3  
MOSFET Maximum Ratings TA = 25°C unless otherwise noted  
Symbol  
VDS  
VGS  
Parameter  
Ratings  
Units  
Drain to Source Voltage  
Gate to Source Voltage  
100  
±20  
V
V
Drain Current  
-Continuous  
-Pulsed  
(Note 1a)  
4.4  
ID  
A
20  
EAS  
Single Pulse Avalanche Energy  
Power Dissipation  
(Note 3)  
(Note 1a)  
(Note 1b)  
54  
mJ  
W
2.1  
PD  
Power Dissipation  
0.9  
TJ, TSTG  
Operating and Storage Junction Temperature Range  
-55 to +150  
°C  
Thermal Characteristics  
RθJC  
RθJA  
Thermal Resistance, Junction to Case  
Thermal Resistance, Junction to Ambient  
(Note 1)  
3.0  
60  
°C/W  
(Note 1a)  
Package Marking and Ordering Information  
Device Marking  
Device  
Package  
Reel Size  
13’’  
Tape Width  
12 mm  
Quantity  
FDM3622  
FDM3622  
MLP 3.3x3.3  
3000 units  
1
©2014 Fairchild Semiconductor Corporation  
FDM3622 Rev.C6  
www.fairchildsemi.com  
Electrical Characteristics TJ = 25°C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Units  
Off Characteristics  
BVDSS  
Drain to Source Breakdown Voltage  
Zero Gate Voltage Drain Current  
Gate to Source Leakage Current  
ID = 250μA, VGS = 0V  
100  
V
V
DS = 80V, VGS = 0V  
TJ = 100°C  
1
IDSS  
μA  
nA  
250  
±100  
IGSS  
VGS = ±20V, VDS = 0V  
On Characteristics  
VGS(th)  
Gate to Source Threshold Voltage  
VGS = VDS, ID = 250μA  
2
4
V
V
GS = 10V, ID = 4.4A  
44  
56  
92  
60  
rDS(on)  
Static Drain to Source On Resistance  
VGS = 6.0V, ID = 3.8A  
80  
mΩ  
VGS = 10V, ID = 4.4A , TJ = 150°C  
120  
Dynamic Characteristics  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
820  
125  
35  
1090  
170  
55  
pF  
pF  
pF  
Ω
VDS = 25V, VGS = 0V,  
f = 1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate Resistance  
VDS = 15mV, f = 1MHz  
0.1  
3.1  
6.2  
Switching Characteristics  
td(on)  
tr  
td(off)  
tf  
Turn-On Delay Time  
Rise Time  
11  
25  
35  
26  
13  
3.6  
20  
40  
56  
42  
17  
ns  
ns  
ns  
ns  
nC  
nC  
VDD = 50V, ID = 4.4A  
V
GS = 10V, RGEN = 24Ω  
Turn-Off Delay Time  
Fall Time  
Qg  
Total Gate Charge  
Gate to Source Gate Charge  
VGS = 10V  
VDD = 50V  
ID = 4.4A  
Qgs  
Qgd  
Gate to Drain “Miller” Charge  
3.4  
nC  
Drain-Source Diode Characteristics  
V
GS = 0V, IS = 4.4A  
1.25  
1.0  
56  
V
V
VSD  
Source to Drain Diode Forward Voltage  
VGS = 0V, IS = 2.2A  
trr  
Reverse Recovery Time  
ns  
nC  
IF = 4.4A, di/dt = 100A/μs  
Qrr  
Reverse Recovery Charge  
108  
Notes:  
2
1: R  
is determined with the device mounted on a 1 in oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R  
is guaranteed by design while R is determined by the  
θJA  
θJA  
θJC  
user's board design.  
2
(a)R  
(b)R  
= 60°C/W when mounted on a 1 in pad of 2 oz copper, 1.5’x1.5’x0.062’ thick PCB.  
= 135°C/W when mounted on a minimum pad of 2 oz copper.  
θJA  
θJA  
a. 60°C/W when mounted on  
a1in pad of 2 oz copper  
b. 135°C/W when mounted on a  
minimum pad of 2 oz copper  
2
2: Pulse Test: Pulse Width < 300μs, Duty cycle < 2.0%.  
3: E of 54 mJ is based on starting T = 25 C; N-ch: L = 3 mH, I = 6 A, V = 100 V, V = 10 V.  
AS  
J
AS  
DD  
GS  
www.fairchildsemi.com  
2
FDM3622 Rev.C6  
Typical Characteristics TJ = 25°C unless otherwise noted  
10  
2.5  
2.0  
1.5  
1.0  
PULSE DURATION = 80μs  
PULSE DURATION = 80μs  
DUTY CYCLE = 0.5% MAX  
DUTY CYCLE = 0.5% MAX  
o
V
= 10V  
GS  
T
= 25 C  
A
8
6
4
V
= 5V  
GS  
V
= 4.7V  
= 4.5V  
GS  
V
GS  
2
0
0.5  
0
V
= 10V, I = 4.4A  
D
GS  
0
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
10  
15  
-80  
-40  
0
40  
80  
120  
o
160  
V
, DRAIN TO SOURCE VOLTAGE (V)  
T , JUNCTION TEMPERATURE ( C)  
J
DS  
Figure 1. On-Region Characteristics  
Figure2. N o r m a l i z e d O n - R e s i s ta n c e  
vs Junction Temperature  
80  
10  
8
PULSE DURATION = 80μs  
DUTY CYCLE = 0.5% MAX  
PULSE DURATION = 80μs  
DUTY CYCLE = 0.5% MAX  
V
= 15V  
DD  
70  
60  
I
= 4.4A  
D
6
o
T
= 150 C  
J
4
o
I
= 0.2A  
D
T
= -55 C  
J
o
T
= 25 C  
J
50  
40  
2
0
4
6
8
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
6.0  
V
, GATE TO SOURCE VOLTAGE (V)  
V
GS  
, GATE TO SOURCE VOLTAGE (V)  
GS  
Figure 3. On-Resistance vs Gate to  
Source Voltage  
Figure4. TransferCharacteristics  
10  
8
1200  
1000  
V
= 50V  
DD  
C
= C + C  
GS GD  
ISS  
C
C + C  
GD  
OSS  
DS  
6
100  
C
= C  
RSS  
GD  
4
WAVEFORMS IN  
DESCENDING ORDER:  
2
I
I
= 4.4A  
= 1A  
D
D
V
= 0V, f = 1MHz  
1
GS  
10  
0
0
3
6
9
12  
0.1  
10  
100  
Q , GATE CHARGE (nC)  
V
, DRAIN TO SOURCE VOLTAGE (V)  
DS  
g
Figure 5. Gate Charge Characteristics  
F i g u r e 6 . C a p a c i t a n c e v s D r a i n  
to Source Voltage  
www.fairchildsemi.com  
3
FDM3622 Rev.C6  
Typical Characteristics TJ = 25°C unless otherwise noted  
20  
10  
50  
If R = 0  
= (L)(I )/(1.3*RATED BV  
t
AV  
- V  
DD  
)
10  
AS  
DSS  
If R 0  
t
AV  
= (L/R)ln[(I *R)/(1.3*RATED BV  
- V ) +1]  
DD  
AS  
DSS  
100us  
1
1 ms  
o
STARTING T = 25 C  
J
10 ms  
100 ms  
1 s  
THIS AREA IS  
LIMITED BY rDS(on)  
0.1  
0.01  
SINGLE PULSE  
TJ = MAX RATED  
θJA = 135 oC/W  
10 s  
DC  
R
o
STARTING T = 150 C  
J
T
A = 25 oC  
0.001  
1
0.1  
1
10  
100  
400  
0.001  
0.01  
0.1  
1
10  
100  
VDS, DRAIN to SOURCE VOLTAGE (V)  
t
, TIME IN AVALANCHE (ms)  
AV  
Figure7. Forward Bias Safe  
Operating Area  
Figure8. Uncalamped Inductive  
Switching Capability  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
6
4
V
= 10V  
GS  
2
0
0
0
25  
50  
75  
100  
125  
150  
25  
50  
75  
100  
125  
150  
o
o
T
, AMBIENT TEMPERATURE ( C)  
T , AMBIENT TEMPERATURE ( C)  
A
A
Figure 9. Normalized Power dissipation  
vs Ambient Temperature  
Fi g ure 1 0. Maxi mu m C on ti n uo us Dr ai n Cu rren t  
vs Ambient Temperature  
1.2  
1.2  
V
= V , I = 250μA  
DS D  
GS  
I
= 250μA  
D
1.0  
0.8  
0.6  
1.1  
1.0  
0.9  
-80  
-40  
0
40  
80  
120  
160  
-80  
-40  
0
40  
80  
120  
160  
o
o
T , JUNCTION TEMPERATURE ( C)  
T , JUNCTION TEMPERATURE ( C)  
J
J
Figure11. Normalized Gate Threshold voltage  
vs Junction Temperature  
Figure 12. Normalized Drain to Source Breakdown  
Voltage vs Junction Temperature  
www.fairchildsemi.com  
4
FDM3622 Rev.C6  
Typical Characteristics TJ = 25°C unless otherwise noted  
500  
VGS = 10V  
o
T
= 25 C  
A
100  
FOR TEMPERATURES  
o
ABOVE 25 C DERATE PEAK  
SINGLE PULSE  
CURRENT AS FOLLOWS:  
R
θJA = 135oC/W  
150 T  
A
-----------------------  
I = I  
25  
125  
10  
1
10-4  
10-3  
10-2  
10-1  
100  
101  
102  
103  
t, PULSE WIDTH (s)  
Figure 13. Peak Current Capability  
1
0.1  
DUTY CYCLE-DESCENDING ORDER  
D = 0.5  
0.2  
0.1  
0.05  
0.02  
0.01  
P
DM  
t
1
t
2
0.01  
NOTES:  
DUTY FACTOR: D = t /t  
SINGLE PULSE  
1
2
R
θJA = 135oC/W  
PEAK T = P  
J
x Z  
x R  
+ T  
θJA A  
DM  
θJA  
1E-3  
10-4  
10-3  
10-2  
10-1  
100  
101  
102  
103  
t, RECTANGULAR PULSE DURATION(s)  
Figure 14. Transient Thermal Response Curve  
www.fairchildsemi.com  
5
FDM3622 Rev.C6  
(3.40)  
2.37  
0.05 C  
B
3.30  
A
8
5
2X  
0.45(4X)  
(0.40)  
2.15  
(1.70)  
3.30  
KEEP OUT  
AREA  
(0.65)  
0.70(4X)  
0.05 C  
PIN#1 IDENT  
1
4
TOP VIEW  
SIDE VIEW  
0.65  
0.42(8X)  
2X  
1.95  
ꢀꢁꢅꢃ“ꢀꢁꢀꢃ  
RECOMMENDED LAND PATTERN  
0.10 C  
0.08 C  
ꢀꢁꢂꢃ“ꢀꢁꢀꢃ  
ꢀꢁꢀꢄꢃ“ꢀꢁꢀꢄꢃ  
NOTES:  
C
SEATING  
A. DOES NOT CONFORM TO JEDEC  
REGISTRATION MO-229  
PLANE  
B. DIMENSIONS ARE IN MILLIMETERS.  
ꢆꢁꢆꢀ“ꢀꢁꢀꢃ  
C. DIMENSIONS AND TOLERANCES PER  
ASME Y14.5M, 2009.  
2.27+0.05  
(0.50)4X  
PIN #1 IDENT  
(0.79)  
D. LAND PATTERN RECOMMENDATION IS  
EXISTING INDUSTRY LAND PATTERN.  
1
4
ꢀꢁꢃꢀ“ꢀꢁꢀꢃꢇꢊ;ꢉ  
E. DRAWING FILENAME: MKT-MLP08Srev3.  
(0.35)  
(1.15)  
ꢆꢁꢆꢀ“ꢀꢁꢀꢃ  
R0.15  
ꢄꢁꢀꢀ“ꢀꢁꢀꢃ  
ꢀꢁꢆꢀ“ꢀꢁꢀꢃꢇꢆ;ꢉ  
8
5
ꢀꢁꢆꢃ“ꢀꢁꢀꢃꢇꢈ;ꢉ  
0.65  
0.10  
C A B  
1.95  
0.05  
C
BOTTOM VIEW  
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent  
coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.  
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,  
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not  
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification  
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized  
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and  
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such  
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