FDMS3660AS [ONSEMI]
不对称双 N 沟道,PowerTrench® 功率级 MOSFET,30V;型号: | FDMS3660AS |
厂家: | ONSEMI |
描述: | 不对称双 N 沟道,PowerTrench® 功率级 MOSFET,30V 开关 光电二极管 晶体管 |
文件: | 总14页 (文件大小:488K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Is Now Part of
To learn more about ON Semiconductor, please visit our website at
www.onsemi.com
Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers
will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor
product management systems do not have the ability to manage part nomenclature that utilizes an underscore
(_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain
device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated
device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please
email any questions regarding the system integration to Fairchild_questions@onsemi.com.
ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number
of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right
to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON
Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON
Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA
Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended
or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out
of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor
is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
July 2013
FDMS3660AS
PowerTrench® Power Stage
Asymmetric Dual N-Channel MOSFET
Features
General Description
Q1: N-Channel
This device includes two specialized N-Channel MOSFETs in a
dual PQFN package. The switch node has been internally
connected to enable easy placement and routing of synchronous
buck converters. The control MOSFET (Q1) and synchronous
SyncFETTM (Q2) have been designed to provide optimal power
efficiency.
Max rDS(on) = 8 mΩ at VGS = 10 V, ID = 13 A
Max rDS(on) = 11 mΩ at VGS = 4.5 V, ID = 11 A
Q2: N-Channel
Max rDS(on) = 1.8 mΩ at VGS = 10 V, ID = 30 A
Max rDS(on) = 2.2 mΩ at VGS = 4.5 V, ID = 27 A
Applications
Low inductance packaging shortens rise/fall times, resulting in
Computing
lower switching losses
Communications
MOSFET integration enables optimum layout for lower circuit
inductance and reduced switch node ringing
General Purpose Point of Load
Notebook VCORE
RoHS Compliant
G1
Pin 1
D1
Pin 1
D1
D1
Q2
D1
S2
5
6
7
8
4
3
2
1
D1
PHASE
(S1/D2)
PHASE
D1
D1
S2
S2
G2
G2
S2
G1
S2
Q1
S2
Bottom
Top
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
Parameter
Q1
Q2
30
Units
Drain to Source Voltage
Gate to Source Voltage
30
±20
56
V
V
(Note 3)
TC = 25 °C
TA = 25 °C
(Note 4)
±12
Drain Current
-Continuous
130
ID
-Continuous
-Pulsed
131a
301b
140
A
70
EAS
Single Pulse Avalanche Energy
735
2.21a
1.01c
1506
2.51b
1.01d
mJ
W
Power Dissipation for Single Operation
TA = 25 °C
TA = 25 °C
PD
Power Dissipation for Single Operation
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
RθJA
RθJA
RθJC
Thermal Resistance, Junction to Ambient
571a
1251c
3.5
501b
1201d
2.2
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Case
°C/W
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
13 ”
Tape Width
Quantity
27CF
32CD
FDMS3660AS
Power 56
12 mm
3000 units
1
©2013 Fairchild Semiconductor Corporation
FDMS3660AS Rev.C
www.fairchildsemi.com
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max
Units
Off Characteristics
I
I
D = 250 μA, VGS = 0 V
D = 1 mA, VGS = 0 V
Q1
Q2
30
30
BVDSS
Drain to Source Breakdown Voltage
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
D = 10 mA, referenced to 25 °C
Q1
Q2
16
29
mV/°C
I
Q1
Q2
1
500
μA
μA
IDSS
IGSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
VDS = 24 V, VGS = 0 V
V
V
GS = 20 V, VDS= 0 V
GS = 12 V, VDS= 0 V
Q1
Q2
100
100
nA
nA
On Characteristics
V
V
GS = VDS, ID = 250 μA
GS = VDS, ID = 1 mA
Q1
Q2
1.1
1.2
2.0
1.5
2.7
2.5
VGS(th)
Gate to Source Threshold Voltage
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
D = 10 mA, referenced to 25 °C
VGS = 10 V, ID = 13 A
Q1
Q2
-6
-3
mV/°C
I
5.9
8.5
7.9
8
11
11
V
V
GS = 4.5 V, ID = 11 A
GS = 10 V, ID = 13 A , TJ = 125 °C
Q1
Q2
rDS(on)
Drain to Source On Resistance
mΩ
V
V
V
GS = 10 V, ID = 30 A
GS = 4.5 V, ID = 27 A
GS = 10 V, ID = 30 A , TJ = 125 °C
1.2
1.5
1.8
1.8
2.2
2.7
V
V
DS = 5 V, ID = 13 A
DS = 5 V, ID = 30 A
Q1
Q2
173
240
gFS
Forward Transconductance
S
Dynamic Characteristics
Q1
Q2
1485
4150
2230
6225
Q1:
Ciss
Coss
Crss
Rg
Input Capacitance
pF
pF
pF
Ω
VDS = 15 V, VGS = 0 V, f = 1 MHZ
Q1
Q2
397
1195
595
1795
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Q2:
VDS = 15 V, VGS = 0 V, f = 1 MHZ
Q1
Q2
37
117
70
245
Q1
Q2
0.1
0.1
1.6
1.0
3.2
2.0
Switching Characteristics
Q1
Q2
9
12
17
22
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
ns
ns
Q1:
Q1
Q2
3
5
10
10
VDD = 15 V, ID = 13 A, RGEN = 6 Ω
Q1
Q2
21
38
33
60
Q2:
Turn-Off Delay Time
Fall Time
ns
VDD = 15 V, ID = 30 A, RGEN = 6 Ω
Q1
Q2
3
5
10
10
ns
Q1
Q2
21
64
30
90
Qg
Total Gate Charge
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
VGS = 0 V to 10 V
Q1:
nC
nC
nC
nC
VDD = 15 V,
Q1
Q2
10
30
13
43
Qg
VGS = 0 V to 4.5 V
I
D = 13 A
Q1
Q2
4.5
9
Q2:
VDD = 15 V,
Qgs
Qgd
Q1
Q2
2.0
9
I
D = 30 A
©2013 Fairchild Semiconductor Corporation
FDMS3660AS Rev.C
www.fairchildsemi.com
2
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max
Units
Drain-Source Diode Characteristics
VGS = 0 V, IS = 13 A
(Note 2) Q1
(Note 2) Q1
(Note 2) Q2
(Note 2) Q2
0.84
0.74
0.77
0.48
1.2
1.2
1.2
1.2
V
V
V
GS = 0 V, IS = 2 A
GS = 0 V, IS = 30 A
GS = 0 V, IS = 2 A
VSD
Source to Drain Diode Forward Voltage
V
Q1
Q2
25
33
40
53
Q1:
trr
Reverse Recovery Time
ns
IF = 13 A, di/dt = 100 A/μs
Q2:
IF = 30 A, di/dt = 300 A/μs
Q1
Q2
9
41
18
66
Qrr
Reverse Recovery Charge
nC
Notes:
2
1.R
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is guaranteed by design while R is determined by
θCA
θJA
θJC
the user's board design.
b. 50 °C/W when mounted on
a 1 in pad of 2 oz copper
a. 57 °C/W when mounted on
a 1 in pad of 2 oz copper
2
2
d. 120 °C/W when mounted on a
minimum pad of 2 oz copper
c. 125 °C/W when mounted on a
minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied with the negative Vgs rating.
4. Pulsed Id limited by junction temperature, td<=100 μS, please refer to SOA curve for more details.
o
5. E of 73 mJ is based on starting T = 25 C; N-ch: L = 3 mH, I = 7 A, V = 30 V, V = 10 V. 100% test at L= 0.1 mH, I = 23 A.
AS
J
AS
DD
GS
AS
o
6. E of 150 mJ is based on starting T = 25 C; N-ch: L = 3 mH, I = 10 A, V = 30 V, V = 10 V. 100% test at L= 0.1 mH, I = 31 A.
AS
J
AS
DD
GS
AS
©2013 Fairchild Semiconductor Corporation
FDMS3660AS Rev.C
www.fairchildsemi.com
3
Typical Characteristics (Q1 N-Channel) TJ = 25 °C unless otherwise noted
70
56
42
28
14
0
6.0
4.5
3.0
1.5
0.0
VGS = 10 V
VGS = 6 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 4.5 V
VGS = 4 V
VGS = 3.5 V
VGS = 4 V
VGS = 4.5 V
VGS = 10 V
VGS = 3.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 6 V
0.0
0.5
1.0
1.5
2.0
2.5
3.0
0
14
28
42
56
70
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics
F i g u r e 2 . No rma li zed O n-Re si stan ce
vs Drain Current and Gate Voltage
30
1.5
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
ID = 13 A
1.4
1.3
1.2
1.1
1.0
0.9
0.8
VGS = 10 V
24
ID = 13 A
18
12
TJ = 125 o
C
6
TJ = 25 o
C
0
2
4
6
8
10
-75 -50 -25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs Junction Temperature
Figure4. On-Resistance vs Gate to
Source Voltage
70
70
10
VGS = 0 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
56
42
28
14
0
VDS = 5 V
TJ = 150 o
C
1
0.1
TJ = 150 o
C
TJ = 25 oC
TJ = 25 o
C
TJ = -55 o
C
0.01
TJ = -55 o
C
0.001
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1
2
3
4
5
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure6. Source to Drain Diode
Forward Voltage vs Source Current
©2013 Fairchild Semiconductor Corporation
FDMS3660AS Rev.C
www.fairchildsemi.com
4
Typical Characteristics (Q1 N-Channel) TJ = 25 °C unless otherwise noted
10
8
5000
ID = 13 A
Ciss
1000
VDD = 15 V
VDD = 10 V
Coss
6
VDD = 20 V
4
100
10
Crss
2
f = 1 MHz
= 0 V
V
GS
0
0
6
12
Q , GATE CHARGE (nC)
18
24
0.1
1
10
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
g
Figure 7. Gate Charge Characteristics
Figure8. C a p a c i t a n c e v s D r a i n
to Source Voltage
60
48
36
24
12
0
50
10
VGS = 10 V
TJ = 100 o
C
VGS = 4.5 V
TJ = 25 o
C
TJ = 125 o
C
RθJC = 3.5 oC/W
1
25
50
75
100
125
150
0.001
0.01
0.1
1
10
100
TC, CASE TEMPERATURE (oC)
tAV, TIME IN AVALANCHE (ms)
Figure9. U n c l a m p e d I n d u c t i v e
Switching Capability
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
100
10
1000
SINGLE PULSE
RθJA = 125 oC/W
A = 25 oC
100 μs
T
100
10
1
1 ms
1
THIS AREA IS
LIMITED BY r
10 ms
100 ms
1 s
DS(on)
SINGLE PULSE
TJ = MAX RATED
RθJA = 125 oC/W
0.1
10 s
DC
CURVE BENT TO
T
A = 25 oC
MEASURED DATA
10
VDS, DRAIN to SOURCE VOLTAGE (V)
0.01
0.1
10-4
10-3
10-2
t, PULSE WIDTH (sec)
10-1
100
101
0.01
0.1
1
100200
100 1000
Figure 11. Forward Bias Safe
Operating Area
Figure 12. Single Pulse Maximum
Power Dissipation
©2013 Fairchild Semiconductor Corporation
FDMS3660AS Rev.C
www.fairchildsemi.com
5
Typical Characteristics (Q1 N-Channel) TJ = 25 °C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.1
0.01
0.05
0.02
0.01
P
DM
t
1
t
2
SINGLE PULSE
θJA = 125 oC/W
NOTES:
DUTY FACTOR: D = t /t
R
1
2
PEAK T = P
J
x Z
x R
+ T
DM
θJA
θJA A
0.001
10-4
10-3
10-2
10-1
t, RECTANGULAR PULSE DURATION (sec)
100
101
100
1000
Figure 13. Junction-to-Ambient Transient Thermal Response Curve
©2013 Fairchild Semiconductor Corporation
FDMS3660AS Rev.C
www.fairchildsemi.com
6
Typical Characteristics (Q2 N-Channel) TJ = 25 oC unlenss otherwise noted
140
105
70
35
0
6.0
4.5
3.0
1.5
0.0
VGS = 10 V
VGS = 4.5 V
VGS = 3.5 V
VGS = 3 V
VGS = 2.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 3 V
VGS = 2.5 V
VGS = 3.5 V
VGS = 10 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 4.5 V
0.0
0.2
0.4
0.6
0.8
1.0
0
20
40
60
80
100
120
140
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 14. On-Region Characteristics
Figure 15. Normalized on-Resistance vs Drain
Current and Gate Voltage
8
1.6
ID = 30 A
GS = 10 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
V
6
ID = 30 A
4
TJ = 125 o
C
2
0
TJ = 25 o
C
2
4
6
8
10
-75 -50 -25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 17. On-Resistance vs Gate to
Source Voltage
Figure 16. Normalized On-Resistance
vs Junction Temperature
200
100
140
VGS = 0 V
VDS = 5 V
10
1
105
70
35
0
TJ = 125 o
C
TJ = 125 o
C
TJ = 25 o
C
TJ = 25 oC
0.1
TJ = -55 o
C
TJ = -55 o
C
0.01
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0.001
1
2
3
4
0.0
0.2
0.4
0.6
0.8
1.0
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 18. Transfer Characteristics
Figure 19. Source to Drain Diode
Forward Voltage vs Source Current
©2013 Fairchild Semiconductor Corporation
FDMS3660AS Rev.C
www.fairchildsemi.com
7
Typical Characteristics (Q2 N-Channel) TJ = 25 oC unless otherwise noted
10
8
10000
1000
100
Ciss
ID = 30 A
Coss
VDD = 15 V
VDD = 10 V
6
Crss
VDD = 20 V
4
2
f = 1 MHz
= 0 V
V
GS
10
0.1
0
1
10
30
0
14
28
42
56
70
VDS, DRAIN TO SOURCE VOLTAGE (V)
Q , GATE CHARGE (nC)
g
Figure 21. Capacitance vs Drain
to Source Voltage
Figure 20. Gate Charge Characteristics
160
128
96
64
32
0
50
10
VGS = 10 V
TJ = 100 o
C
VGS = 4.5 V
TJ = 25 o
C
TJ = 125 o
C
RθJC = 2.2 oC/W
1
25
50
75
100
125
150
0.001
0.01
0.1
1
10
100
TC, CASE TEMPERATURE (oC)
tAV, TIME IN AVALANCHE (ms)
Figure 22. Unclamped Inductive
Switching Capability
Figure 23. Maximun Continuous Drain
Current vs Case Temperature
10000
1000
100
10
200
100
SINGLE PULSE
RθJA = 120 oC/W
TA = 25 oC
100 μs
10
1
1 ms
10 ms
100 ms
1 s
THIS AREA IS
LIMITED BY r
DS(on)
SINGLE PULSE
TJ = MAX RATED
RθJA = 120 oC/W
TA = 25 oC
0.1
10 s
1
CURVE BENT TO
MEASURED DATA
DC
0.1
0.01
10-4
10-3
10-2
t, PULSE WIDTH (sec)
10-1
100
101
100 1000
0.01
0.1
1
10
100200
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 25. Single Pulse Maximum
Power Dissipation
Figure 24. Forward Bias Safe
Operating Area
©2013 Fairchild Semiconductor Corporation
FDMS3660AS Rev.C
www.fairchildsemi.com
8
Typical Characteristics (Q2 N-Channel) TJ = 25 oC unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.1
0.2
0.1
P
0.05
0.02
0.01
DM
0.01
0.001
t
1
SINGLE PULSE
RθJA = 120 oC/W
t
2
NOTES:
DUTY FACTOR: D = t /t
1
2
PEAK T = P
J
x Z
x R
+ T
DM
θJA
θJA A
0.0001
10-4
10-3
10-2
10-1
t, RECTANGULAR PULSE DURATION (sec)
100
101
100
1000
Figure 26. Junction-to-Ambient Transient Thermal Response Curve
©2013 Fairchild Semiconductor Corporation
FDMS3660AS Rev.C
www.fairchildsemi.com
9
Typical Characteristics (continued)
TM
SyncFET Schottky body diode
Characteristics
Fairchild’s SyncFETTM process embeds a Schottky diode in
parallel with PowerTrench MOSFET. This diode exhibits similar
characteristics to a discrete external Schottky diode in parallel
Schottky barrier diodes exhibit significant leakage at high tem-
perature and high reverse voltage. This will increase the power
in the device.
with
a MOSFET. Figure 27 shows the reverse recovery
characteristic of the FDMS3660AS.
10-2
35
30
25
20
15
10
5
TJ = 125 o
C
10-3
10-4
10-5
10-6
TJ = 100 o
C
TJ = 25 o
C
0
-5
0
5
10
15
20
25
30
100 150 200 250 300 350 400 450 500
VDS, REVERSE VOLTAGE (V)
TIME (ns)
Figure 28. SyncFETTM Body Diode Reverse
Leakage Versus Drain-Source Voltage
Figure 27. FDMS3660AS SyncFETTM Body
Diode Reverse Recovery Characteristic
©2013 Fairchild Semiconductor Corporation
FDMS3660AS Rev.C
www.fairchildsemi.com
10
4.00
C
L
5.10
4.90
0.10 C
A
1.27 TYP
0.65 TYP
(2X)
PKG
B
C
L
8
5
8
6
7
5
0.63
2.15
2.52
1.60
KEEP OUT AREA
6.25
5.90
C
PKG
C
L
0.00
L
4.16
1.21
2.13
2.31
3.15
1
4
0.10 C
(2X)
2
4
1
3
PIN # 1
INDICATOR
0.63
0.59
TOP VIEW
3.18
5.10
SEE
DETAIL A
RECOMMENDED LAND PATTERN
FOR SAWN / PUNCHED TYPE
SIDE VIEW
0.10
0.05
C A B
C
0.10 C
3.16
2.80
0.65
0.38
0.70
0.36
8X
0.45
0.25
(6X)
0.08 C
1.34
1.12
C
0.05
0.00
1
2
3
0.35
0.15
4
1.10
0.90
SEATING
PLANE
0.66±.05
(SCALE: 2X)
2.25
2.05
4.08
3.70
1.02
0.82
0.65
0.38
8
7
6
5
0.44
0.24
0.61
0.31 (8X)
1.27
3.81
BOTTOM VIEW
5.10
4.90
0.10 C
(2X)
SEE
0.35
0.15
PKG
DETAIL B
C
L
5
8
0.28
0.08
10°
6.25
5.90
5.90
5.70
PKG
C
L
(SCALE: 2X)
0.10 C
1
4
(2X)
0.41
0.21
(8X)
TOP VIEW
5.00
4.80
SEE
0.10 C
0.08 C
DETAIL C
0.35
0.15
8X
C
SIDE VIEW
SEATING
PLANE
1.10
0.90
(SCALE: 2X)
0.10
0.05
C A B
3.16
2.80
0.70
0.36
0.65
0.38
C
0.45
0.25
(6X)
1
2
3
1.34
1.12
4
NOTES: UNLESS OTHERWISE SPECIFIED
A) PACKAGE STANDARD REFERENCE:
0.66±.05
JEDEC REGISTRATION, MO-240, VARIATION AA.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE BURRS OR
MOLD FLASH. MOLD FLASH OR BURRS DOES
NOT EXCEED 0.10MM.
2.25
2.05
4.08
3.70
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M-1994.
E) IT IS RECOMMENDED TO HAVE NO TRACES
OR VIAS WITHIN THE KEEP OUT AREA.
F) DRAWING FILE NAME: PQFN08EREV6.
G) FAIRCHILD SEMICONDUCTOR
1.02
0.82
0.65
0.38
6
8
7
5
0.61
0.44
0.24
(8X)
0.31
1.27
3.81
BOTTOM VIEW
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
Literature Distribution Center for ON Semiconductor
19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
© Semiconductor Components Industries, LLC
www.onsemi.com
相关型号:
FDMS3669S
Small Signal Field-Effect Transistor, 13A I(D), 30V, 2-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, MO-240AA, ROHS COMPLIANT, PLASTIC, POWER 56, QFN-8
FAIRCHILD
©2020 ICPDF网 联系我们和版权申明