FDP038AN06A0 [ONSEMI]

N 沟道,Power Trench® MOSFET,60V,80A,3.8mΩ;
FDP038AN06A0
型号: FDP038AN06A0
厂家: ONSEMI    ONSEMI
描述:

N 沟道,Power Trench® MOSFET,60V,80A,3.8mΩ

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www.onsemi.com  
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FDP038AN06A0 / FDI038AN06A0  
®
N-Channel PowerTrench MOSFET  
60 V, 80 A, 3.8 mΩ  
Features  
Applications  
RDS(on) = 3.5 m( Typ.) @ VGS = 10 V, ID = 80 A  
Synchronous Rectification for ATX / Server / Telecom PSU  
Battery Protection Circuit  
QG(tot) = 96 nC ( Typ.) @ VGS = 10 V  
• Low Miller Charge  
Low Qrr Body Diode  
Motor drives and Uninterruptible Power Supplies  
• UIS Capability (Single Pulse and Repetitive Pulse)  
Formerly developmental type 82584  
D
G
I2-PAK  
G
D
D
S
S
G
TO-220  
S
MOSFET Maximum Ratings T = 25°C unless otherwise noted  
C
FDP038AN06A0  
FDI038AN06A0  
Symbol  
Parameter  
Unit  
V
V
Drain to Source Voltage  
Gate to Source Voltage  
60  
V
V
DSS  
±20  
GS  
Drain Current  
o
80  
17  
A
A
Continuous (T < 151 C, V = 10V)  
C
GS  
I
D
o
o
Continuous (T  
= 25 C, V = 10V, with R  
= 62 C/W)  
θJA  
amb  
GS  
Pulsed  
Figure 4  
625  
A
E
P
Single Pulse Avalanche Energy (Note 1)  
Power dissipation  
mJ  
W
AS  
310  
D
o
o
Derate above 25 C  
2.07  
W/ C  
o
T , T  
Operating and Storage Temperature  
-55 to 175  
C
J
STG  
Thermal Characteristics  
oC/W  
oC/W  
0.48  
RθJC  
RθJA  
Thermal Resistance, Junction to Case, Max.  
Thermal Resistance, Junction to Ambient, Max. (Note 2)  
62  
©2002 Semiconductor Components Industries, LLC.  
September-2017,Rev. 3  
Publication Order Number:  
FDP038AN06A0/D  
Package Marking and Ordering Information  
Device Marking  
FDP038AN06A0  
FDI038AN06A0  
Device  
Package  
TO-220  
I2-PAK  
Reel Size  
Tube  
Tape Width  
N/A  
Quantity  
50 units  
50 units  
FDP038AN06A0  
FDI038AN06A0  
Tube  
N/A  
Electrical Characteristics T = 25°C unless otherwise noted  
C
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Unit  
Off Characteristics  
B
Drain to Source Breakdown Voltage  
Zero Gate Voltage Drain Current  
Gate to Source Leakage Current  
I
= 250µA, V = 0V  
60  
-
-
-
-
-
-
V
VDSS  
D
GS  
V
V
V
= 50V  
= 0V  
1
DS  
GS  
GS  
I
I
µA  
nA  
DSS  
o
T
= 150 C  
-
250  
±100  
C
= ±20V  
-
GSS  
On Characteristics  
V
Gate to Source Threshold Voltage  
V
= V , I = 250µA  
2
-
-
4
V
GS(TH)  
GS  
DS  
D
I
I
I
= 80A, V = 10V  
0.0035 0.0038  
0.0049 0.0074  
D
D
D
GS  
= 40A, V = 6V  
-
GS  
r
Drain to Source On Resistance  
DS(ON)  
= 80A, V = 10V,  
GS  
-
0.0071 0.0078  
o
T = 175 C  
J
Dynamic Characteristics  
C
C
C
Input Capacitance  
-
-
-
6400  
1123  
367  
96  
-
pF  
pF  
pF  
nC  
nC  
nC  
nC  
nC  
ISS  
V
= 25V, V = 0V,  
GS  
DS  
Output Capacitance  
-
OSS  
RSS  
f = 1MHz  
Reverse Transfer Capacitance  
Total Gate Charge at 10V  
Threshold Gate Charge  
-
124  
15  
-
Q
Q
Q
Q
Q
V
V
= 0V to 10V  
= 0V to 2V  
g(TOT)  
g(TH)  
gs  
GS  
-
-
-
-
12  
GS  
V
= 30V  
DD  
Gate to Source Gate Charge  
Gate Charge Threshold to Plateau  
Gate to Drain “Miller” Charge  
I
= 80A  
26  
D
I = 1.0mA  
g
15  
-
gs2  
27  
-
gd  
Switching Characteristics (V = 10V)  
GS  
t
t
t
t
t
t
Turn-On Time  
Turn-On Delay Time  
Rise Time  
-
-
-
-
-
-
-
17  
144  
34  
60  
-
175  
ns  
ns  
ns  
ns  
ns  
ns  
ON  
-
d(ON)  
-
V
V
= 30V, I = 80A  
r
DD  
GS  
D
= 10V, R = 2.4Ω  
Turn-Off Delay Time  
Fall Time  
-
-
GS  
d(OFF)  
f
Turn-Off Time  
115  
OFF  
Drain-Source Diode Characteristics  
I
I
I
I
= 80A  
= 40A  
-
-
-
-
-
-
-
-
1.25  
1.0  
38  
V
V
SD  
SD  
SD  
SD  
V
Source to Drain Diode Voltage  
SD  
t
Reverse Recovery Time  
= 75A, dI /dt = 100A/µs  
ns  
nC  
rr  
SD  
Q
Reverse Recovered Charge  
= 75A, dI /dt = 100A/µs  
39  
RR  
SD  
Notes:  
1: Starting T = 25°C, L = 0.255mH, I = 70A.  
J
AS  
2: Pulse Width = 100s  
www.onsemi.com  
2
Typical Characteristics T = 25°C unless otherwise noted  
C
1.2  
250  
CURRENT LIMITED  
BY PACKAGE  
1.0  
200  
0.8  
150  
0.6  
100  
0.4  
50  
0.2  
0
0
25  
50  
75  
100  
125  
150  
175  
0
25  
50  
75  
100  
150  
175  
125  
o
o
T
, CASE TEMPERATURE ( C)  
C
T , CASE TEMPERATURE ( C)  
C
Figure 1. Normalized Power Dissipation vs  
Ambient Temperature  
Figure 2. Maximum Continuous Drain Current vs  
Case Temperature  
2
DUTY CYCLE - DESCENDING ORDER  
0.5  
0.2  
1
0.1  
0.05  
0.02  
0.01  
P
DM  
0.1  
t
1
t
2
NOTES:  
DUTY FACTOR: D = t /t  
1
2
SINGLE PULSE  
0.01  
PEAK T = P  
x Z  
x R  
+ T  
θJC C  
J
DM  
θJC  
-5  
-4  
-3  
-2  
-1  
0
1
10  
10  
10  
10  
t, RECTANGULAR PULSE DURATION (s)  
10  
10  
10  
Figure 3. Normalized Maximum Transient Thermal Impedance  
3000  
1000  
o
T
= 25 C  
C
TRANSCONDUCTANCE  
MAY LIMIT CURRENT  
IN THIS REGION  
FOR TEMPERATURES  
o
ABOVE 25 C DERATE PEAK  
CURRENT AS FOLLOWS:  
175 - T  
150  
C
I = I  
25  
V
= 10V  
GS  
100  
10  
-5  
-4  
-3  
-2  
-1  
0
1
10  
10  
10  
10  
t, PULSE WIDTH (s)  
10  
10  
10  
Figure 4. Peak Current Capability  
www.onsemi.com  
3
Typical Characteristics T = 25°C unless otherwise noted  
C
2000  
1000  
100  
10  
1
10µs  
100µs  
1ms  
o
STARTING T = 25 C  
J
100  
10  
o
STARTING T = 150 C  
J
OPERATION IN THIS  
AREA MAY BE  
LIMITED BY r  
DS(ON)  
10ms  
1
If R = 0  
DC  
t
= (L)(I )/(1.3*RATED BV  
AV  
- V  
)
SINGLE PULSE  
AS  
DSS  
DD  
If R 0  
AV  
T
T
= MAX RATED  
= 25 C  
J
t
= (L/R)ln[(I *R)/(1.3*RATED BV  
- V ) +1]  
DD  
o
AS  
DSS  
C
0.1  
0.01  
0.1  
1
10  
100  
1
10  
, DRAIN TO SOURCE VOLTAGE (V)  
100  
t
, TIME IN AVALANCHE (ms)  
AV  
V
DS  
NOTE: Refer to ON Semiconductor Application Notes AN7514 and  
AN7515  
Figure 5. Forward Bias Safe Operating Area  
Figure 6. Unclamped Inductive Switching  
Capability  
160  
160  
PULSE DURATION = 80µs  
V
= 20V  
GS  
V
= 10V  
GS  
DUTY CYCLE = 0.5% MAX  
V
= 15V  
DD  
120  
80  
40  
0
120  
80  
40  
0
V
= 6V  
GS  
V
= 5V  
GS  
o
T
= 175 C  
J
o
T
= 25 C  
J
o
T
= -55 C  
J
PULSE DURATION = 80µs  
DUTY CYCLE = 0.5% MAX  
o
T
= 25 C  
C
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
6
0
0.5  
1.0  
1.5  
V
, GATE TO SOURCE VOLTAGE (V)  
V
DS  
, DRAIN TO SOURCE VOLTAGE (V)  
GS  
Figure 7. Transfer Characteristics  
Figure 8. Saturation Characteristics  
2.5  
2.0  
1.5  
1.0  
0.5  
6
5
4
3
PULSE DURATION = 80µs  
DUTY CYCLE = 0.5% MAX  
PULSE DURATION = 80µs  
DUTY CYCLE = 0.5% MAX  
V
= 6V  
GS  
V
= 10V  
GS  
V
= 10V, I =80A  
D
GS  
0
20  
40  
I , DRAIN CURRENT (A)  
60  
80  
-80  
-40  
0
40  
80  
120  
160  
200  
o
T , JUNCTION TEMPERATURE ( C)  
J
D
Figure 9. Drain to Source On Resistance vs Drain  
Current  
Figure 10. Normalized Drain to Source On  
Resistance vs Junction Temperature  
www.onsemi.com  
4
Typical Characteristics T = 25°C unless otherwise noted  
C
1.4  
1.2  
V
= V , I = 250µA  
DS D  
I = 250µA  
D
GS  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
1.1  
1.0  
0.9  
-80  
-40  
0
40  
80  
120  
160  
200  
-80  
-40  
0
40  
80  
120  
160  
200  
o
o
T , JUNCTION TEMPERATURE ( C)  
T , JUNCTION TEMPERATURE ( C)  
J
J
Figure 11. Normalized Gate Threshold Voltage vs  
Junction Temperature  
Figure 12. Normalized Drain to Source  
Breakdown Voltage vs Junction Temperature  
10000  
10  
V
= 30V  
DD  
C
= C + C  
GD  
8
6
4
2
0
ISS  
GS  
C
C
+ C  
GD  
OSS  
DS  
GD  
1000  
C
= C  
RSS  
WAVEFORMS IN  
DESCENDING ORDER:  
I
I
= 80A  
= 40A  
D
D
V
= 0V, f = 1MHz  
1
GS  
100  
0.1  
10  
60  
0
25  
50  
Q , GATE CHARGE (nC)  
75  
100  
V
, DRAIN TO SOURCE VOLTAGE (V)  
DS  
g
Figure 13. Capacitance vs Drain to Source  
Voltage  
Figure 14. Gate Charge Waveforms for Constant  
Gate Current  
www.onsemi.com  
5
Test Circuits and Waveforms  
V
DS  
BV  
DSS  
t
P
L
V
DS  
I
VARY t TO OBTAIN  
P
AS  
+
-
V
DD  
R
REQUIRED PEAK I  
G
AS  
V
DD  
V
GS  
DUT  
t
P
I
0V  
AS  
0
0.01  
t
AV  
Figure 15. Unclamped Energy Test Circuit  
Figure 16. Unclamped Energy Waveforms  
V
DS  
V
Q
DD  
g(TOT)  
V
L
DS  
V
GS  
V
= 10V  
GS  
V
GS  
+
-
Q
gs2  
V
DD  
DUT  
V
= 2V  
GS  
I
g(REF)  
0
Q
g(TH)  
Q
Q
gs  
gd  
I
g(REF)  
0
Figure 17. Gate Charge Test Circuit  
Figure 18. Gate Charge Waveforms  
V
DS  
t
t
ON  
OFF  
t
d(OFF)  
t
d(ON)  
R
L
t
t
f
r
V
DS  
90%  
90%  
+
-
V
GS  
V
DD  
10%  
10%  
0
DUT  
90%  
50%  
R
GS  
V
GS  
50%  
PULSE WIDTH  
V
10%  
GS  
0
Figure 19. Switching Time Test Circuit  
Figure 20. Switching Time Waveforms  
www.onsemi.com  
6
PSPICE Electrical Model  
.SUBCKT FDP038AN06A0 2 1 3 ; rev July 04, 2002  
Ca 12 8 1.5e-9  
Cb 15 14 1.5e-9  
Cin 6 8 6.1e-9  
LDRAIN  
DPLCAP  
5
DRAIN  
2
10  
Dbody 7 5 DbodyMOD  
Dbreak 5 11 DbreakMOD  
Dplcap 10 5 DplcapMOD  
RLDRAIN  
RSLC1  
51  
DBREAK  
+
RSLC2  
5
ESLC  
11  
51  
Ebreak 11 7 17 18 69.3  
Eds 14 8 5 8 1  
Egs 13 8 6 8 1  
Esg 6 10 6 8 1  
Evthres 6 21 19 8 1  
-
+
50  
-
17  
DBODY  
RDRAIN  
6
8
EBREAK 18  
-
ESG  
EVTHRES  
+
16  
21  
+
-
19  
8
MWEAK  
Evtemp 20 6 18 22 1  
LGATE  
EVTEMP  
RGATE  
GATE  
1
6
+
-
18  
22  
MMED  
It 8 17 1  
9
20  
MSTRO  
8
RLGATE  
Lgate 1 9 4.81e-9  
Ldrain 2 5 1.0e-9  
Lsource 3 7 4.63e-9  
LSOURCE  
CIN  
SOURCE  
3
7
RSOURCE  
RLSOURCE  
RLgate 1 9 48.1  
RLdrain 2 5 10  
RLsource 3 7 46.3  
S1A  
S2A  
RBREAK  
12  
15  
13  
8
14  
13  
17  
18  
RVTEMP  
19  
S1B  
S2B  
Mmed 16 6 8 8 MmedMOD  
Mstro 16 6 8 8 MstroMOD  
Mweak 16 21 8 8 MweakMOD  
13  
CB  
CA  
IT  
14  
-
+
+
VBAT  
6
8
5
8
EGS  
EDS  
+
Rbreak 17 18 RbreakMOD 1  
Rdrain 50 16 RdrainMOD 1e-4  
Rgate 9 20 1.36  
-
-
8
22  
RVTHRES  
RSLC1 5 51 RSLCMOD 1e-6  
RSLC2 5 50 1e3  
Rsource 8 7 RsourceMOD 2.8e-3  
Rvthres 22 8 RvthresMOD 1  
Rvtemp 18 19 RvtempMOD 1  
S1a 6 12 13 8 S1AMOD  
S1b 13 12 13 8 S1BMOD  
S2a 6 15 14 13 S2AMOD  
S2b 13 15 14 13 S2BMOD  
Vbat 22 19 DC 1  
ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*250),10))}  
.MODEL DbodyMOD D (IS=2.4E-11 N=1.04 RS=1.65e-3 TRS1=2.7e-3 TRS2=2e-7  
+ CJO=4.35e-9 M=5.4e-1 TT=1e-9 XTI=3.9)  
.MODEL DbreakMOD D (RS=1.5e-1 TRS1=1e-3 TRS2=-8.9e-6)  
.MODEL DplcapMOD D (CJO=1.7e-9 IS=1e-30 N=10 M=0.47)  
.MODEL MmedMOD NMOS (VTO=3.3 KP=9 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=1.36 T_abs=25)  
.MODEL MstroMOD NMOS (VTO=4.00 KP=275 IS=1e-30 N=10 TOX=1 L=1u W=1u T_abs=25)  
.MODEL MweakMOD NMOS (VTO=2.72 KP=0.03 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=13.6 RS=0.1 T_abs=25)  
.MODEL RbreakMOD RES (TC1=9e-4 TC2=-9e-7)  
.MODEL RdrainMOD RES (TC1=4e-2 TC2=3e-4)  
.MODEL RSLCMOD RES (TC1=1e-3 TC2=1e-5)  
.MODEL RsourceMOD RES (TC1=5e-3 TC2=1e-6)  
.MODEL RvthresMOD RES (TC1=-6.7e-3 TC2=-1.5e-5)  
.MODEL RvtempMOD RES (TC1=-2.5e-3 TC2=1e-6)  
.MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-4 VOFF=-1.5)  
.MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-1.5 VOFF=-4)  
.MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-1 VOFF=0.5)  
.MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=0.5 VOFF=-1)  
.ENDS  
Note: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global  
Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank  
Wheatley.  
www.onsemi.com  
7
SABER Electrical Model  
rev July 4, 2002  
template FDP038AN06A0 n2,n1,n3 = m_temp  
electrical n2,n1,n3  
number m_temp=25  
{
var i iscl  
dp..model dbodymod = (isl=2.4e-11,nl=1.04,rs=1.65e-3,trs1=2.7e-3,trs2=2e-7,cjo=4.35e-9,m=5.4e-1,tt=1e-9,xti=3.9)  
dp..model dbreakmod = (rs=1.5e-1,trs1=1e-3,trs2=-8.9e-6)  
dp..model dplcapmod = (cjo=1.7e-9,isl=10e-30,nl=10,m=0.47)  
m..model mmedmod = (type=_n,vto=3.3,kp=9,is=1e-30, tox=1)  
m..model mstrongmod = (type=_n,vto=4.00,kp=275,is=1e-30, tox=1)  
LDRAIN  
m..model mweakmod = (type=_n,vto=2.72,kp=0.03,is=1e-30, tox=1,rs=0.1)  
DPLCAP  
DRAIN  
2
5
sw_vcsp..model s1amod = (ron=1e-5,roff=0.1,von=-4,voff=-1.5)  
sw_vcsp..model s1bmod = (ron=1e-5,roff=0.1,von=-1.5,voff=-4)  
sw_vcsp..model s2amod = (ron=1e-5,roff=0.1,von=-1,voff=0.5)  
sw_vcsp..model s2bmod = (ron=1e-5,roff=0.1,von=0.5,voff=-1)  
c.ca n12 n8 = 1.5e-9  
10  
RLDRAIN  
RSLC1  
51  
RSLC2  
ISCL  
c.cb n15 n14 = 1.5e-9  
c.cin n6 n8 = 6.1e-9  
DBREAK  
11  
50  
-
RDRAIN  
6
8
dp.dbody n7 n5 = model=dbodymod  
dp.dbreak n5 n11 = model=dbreakmod  
dp.dplcap n10 n5 = model=dplcapmod  
ESG  
DBODY  
EVTHRES  
+
16  
21  
+
-
19  
8
MWEAK  
LGATE  
EVTEMP  
RGATE  
GATE  
1
+
6
-
18  
22  
EBREAK  
+
spe.ebreak n11 n7 n17 n18 = 69.3  
spe.eds n14 n8 n5 n8 = 1  
spe.egs n13 n8 n6 n8 = 1  
spe.esg n6 n10 n6 n8 = 1  
spe.evthres n6 n21 n19 n8 = 1  
spe.evtemp n20 n6 n18 n22 = 1  
MMED  
9
20  
MSTRO  
8
17  
18  
-
RLGATE  
LSOURCE  
CIN  
SOURCE  
3
7
RSOURCE  
RLSOURCE  
S1A  
S2A  
i.it n8 n17 = 1  
RBREAK  
12  
15  
13  
8
14  
13  
17  
18  
l.lgate n1 n9 = 4.81e-9  
l.ldrain n2 n5 = 1.0e-9  
l.lsource n3 n7 = 4.63e-9  
RVTEMP  
19  
S1B  
S2B  
13  
CB  
CA  
IT  
14  
-
+
+
VBAT  
6
8
5
8
res.rlgate n1 n9 = 48.1  
res.rldrain n2 n5 = 10  
res.rlsource n3 n7 = 46.3  
EGS  
EDS  
+
-
-
8
22  
RVTHRES  
m.mmed n16 n6 n8 n8 = model=mmedmod, temp=m_temp, l=1u, w=1u  
m.mstrong n16 n6 n8 n8 = model=mstrongmod, temp=m_temp, l=1u, w=1u  
m.mweak n16 n21 n8 n8 = model=mweakmod, temp=m_temp, l=1u, w=1u  
res.rbreak n17 n18 = 1, tc1=9e-4,tc2=-9e-7  
res.rdrain n50 n16 = 1e-4, tc1=4e-2,tc2=3e-4  
res.rgate n9 n20 = 1.36  
res.rslc1 n5 n51 = 1e-6, tc1=1e-3,tc2=1e-5  
res.rslc2 n5 n50 = 1e3  
res.rsource n8 n7 = 2.8e-3, tc1=5e-3,tc2=1e-6  
res.rvthres n22 n8 = 1, tc1=-6.7e-3,tc2=-1.5e-5  
res.rvtemp n18 n19 = 1, tc1=-2.5e-3,tc2=1e-6  
sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod  
sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod  
sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod  
sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod  
v.vbat n22 n19 = dc=1  
equations {  
i (n51->n50) +=iscl  
iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/250))** 10))  
}
www.onsemi.com  
8
SPICE Thermal Model  
REV 23 July 4, 2002  
JUNCTION  
th  
FDP038AN06A0T  
CTHERM1 TH 6 6.45e-3  
CTHERM2 6 5 3e-2  
CTHERM3 5 4 1.4e-2  
CTHERM4 4 3 1.65e-2  
CTHERM5 3 2 4.85e-2  
CTHERM6 2 TL 1e-1  
RTHERM1  
RTHERM2  
RTHERM3  
RTHERM4  
RTHERM5  
RTHERM6  
CTHERM1  
6
RTHERM1 TH 6 3.24e-3  
RTHERM2 6 5 8.08e-3  
RTHERM3 5 4 2.28e-2  
RTHERM4 4 3 1e-1  
RTHERM5 3 2 1.1e-1  
RTHERM6 2 TL 1.4e-1  
CTHERM2  
CTHERM3  
CTHERM4  
CTHERM5  
CTHERM6  
5
SABER Thermal Model  
SABER thermal model FDP035AN06A0T  
template thermal_model th tl  
thermal_c th, tl  
{
4
3
2
ctherm.ctherm1 th 6 =6.45e-3  
ctherm.ctherm2 6 5 =3e-2  
ctherm.ctherm3 5 4 =1.4e-2  
ctherm.ctherm4 4 3 =1.65e-2  
ctherm.ctherm5 3 2 =4.85e-2  
ctherm.ctherm6 2 tl =1e-1  
rtherm.rtherm1 th 6 =3.24e-3  
rtherm.rtherm2 6 5 =8.08e-3  
rtherm.rtherm3 5 4 =2.28e-2  
rtherm.rtherm4 4 3 =1e-1  
rtherm.rtherm5 3 2 =1.1e-1  
rtherm.rtherm6 2 tl=1.4e-1  
}
tl  
CASE  
www.onsemi.com  
9
Mechanical Dimensions  
TO-220 3L  
Figure 21. TO-220, Molded, 3Lead, Jedec Variation AB  
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Dimension in Millimeters  
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10  
Mechanical Dimensions  
TO-262 3L (I2PAK)  
Figure 22. 3LD, TO262, Jedec Variation AA (I2PAK)  
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any manner without notice. Please note the revision and/or date on the drawing and contact a ON Semiconductor representative to  
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and conditions, specif-ically the warranty therein, which covers ON Semiconductor products.  
Dimension in Millimeters  
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11  
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