FDP8880 [ONSEMI]
N 沟道 PowerTrench® MOSFET 30V,54A,11.6mΩ;型号: | FDP8880 |
厂家: | ONSEMI |
描述: | N 沟道 PowerTrench® MOSFET 30V,54A,11.6mΩ 局域网 PC 开关 晶体管 |
文件: | 总13页 (文件大小:512K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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May 2008
tmM
FDP8880 / FDB8880
N-Channel PowerTrench MOSFET
®
30V, 54A, 11.6mΩ
General Description
Features
rDS(ON) = 14.5mΩ, VGS = 4.5V, ID = 40A
This N-Channel MOSFET has been designed specifically to
improve the overall efficiency of DC/DC converters using
either synchronous or conventional switching PWM
controllers. It has been optimized for low gate charge, low
rDS(ON) = 11.6mΩ, VGS = 10V, ID = 40A
r
DS(ON) and fast switching speed.
High performance trench technology for extremely low
rDS(ON)
Application
Low gate charge
DC / DC Converters
High power and current handling capability
RoHS Complicant
DRAIN
(FLANGE)
DRAIN
(FLANGE)
D
S
GATE
SOURCE
DRAIN
GATE
G
SOURCE
TO-220AB
FDP SERIES
TO-263AB
FDB SERIES
www.fairchildsemicom
©2008 Fairchild Semiconductor Corporation
FDP8880 / FDB8880 Rev. A1
1
MOSFET Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
VGS
Parameter
Ratings
30
Units
Drain to Source Voltage
Gate to Source Voltage
Drain Current
V
V
±20
Continuous (TC = 25oC, VGS = 10V)
Continuous (TC = 25oC, VGS = 4.5V)
Continuous (Tamb = 25oC, VGS = 10V, with RθJA = 43oC/W)
Pulsed
54
48
A
A
ID
11
A
Figure 4
31
A
EAS
Single Pulse Avalanche Energy (Note 1)
Power dissipation
Derate above 25oC
mJ
W
W/oC
oC
55
PD
0.37
TJ, TSTG
Operating and Storage Temperature
-55 to 175
Thermal Characteristics
RθJC
RθJA
RθJA
Thermal Resistance Junction to Case TO-220,TO-263
2.73
62
oC/W
oC/W
oC/W
Thermal Resistance Junction to Ambient TO-220,TO-262 ( Note 2)
Thermal Resistance Junction to Ambient TO-263, 1in2 copper pad area
43
Package Marking and Ordering Information
Device Marking
Device
FDP8880
FDB8880
Package
TO-220AB
TO-263AB
Reel Size
Tube
Tape Width
Quantity
FDP8880
N/A
50 units
FDB8880
330mm
24mm
800 units
Electrical Characteristics TC = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
ID = 250µA, VGS = 0V
30
-
-
-
-
-
-
V
V
DS = 24V
1
IDSS
µA
nA
VGS = 0V
TC = 150oC
-
250
±100
IGSS
VGS = ±20V
-
On Characteristics
VGS(TH)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250µA
D = 40A, VGS = 10V
ID = 40A, VGS = 4.5V
1.2
-
2.5
V
I
-
-
0.0095 0.0116
0.012 0.0145
rDS(ON)
Drain to Source On Resistance
Ω
I
D = 40A, VGS = 10V,
-
0.015 0.019
TJ = 175oC
©2008 Fairchild Semiconductor Corporation
FDP8880 / FDB8880 Rev. A1
www.fairchildsemicom
2
Dynamic Characteristics
CISS
COSS
CRSS
RG
Input Capacitance
-
-
-
-
-
-
-
-
-
-
1240
255
147
2.7
22
-
-
pF
pF
pF
Ω
VDS = 15V, VGS = 0V,
f = 1MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
-
VGS = 0.5V, f = 1MHz
VGS = 0V to 10V
VGS = 0V to 5V
-
Qg(TOT)
Qg(5)
Qg(TH)
Qgs
Total Gate Charge at 10V
Total Gate Charge at 5V
Threshold Gate Charge
Gate to Source Gate Charge
Gate Charge Threshold to Plateau
Gate to Drain “Miller” Charge
29
16
2.1
-
nC
nC
nC
nC
nC
nC
12
VDD = 15V
D = 40A
Ig = 1.0mA
VGS = 0V to 1V
1.6
3.2
2.0
4.8
I
Qgs2
Qgd
-
-
Switching Characteristics (VGS = 10V)
tON
td(ON)
tr
Turn-On Time
Turn-On Delay Time
Rise Time
-
-
-
-
-
-
-
8
171
ns
ns
ns
ns
ns
ns
-
107
47
51
-
-
VDD = 15V, ID = 40A
VGS = 10V, RGS = 13.6Ω
td(OFF)
tf
Turn-Off Delay Time
Fall Time
-
-
tOFF
Turn-Off Time
147
Drain-Source Diode Characteristics
I
I
SD = 40A
SD = 3.5A
-
-
-
-
-
-
-
-
1.25
1.0
27
V
V
VSD
Source to Drain Diode Voltage
trr
Reverse Recovery Time
ISD = 40A, dISD/dt = 100A/µs
ISD = 40A, dISD/dt = 100A/µs
ns
nC
QRR
Reverse Recovered Charge
18
Notes:
1: Starting T = 25°C, L = 34uH, I = 43A,Vdd = 27V, Vgs = 10V.
J
AS
2: Pulse width = 100s.
©2008 Fairchild Semiconductor Corporation
FDP8880 / FDB8880 Rev. A1
www.fairchildsemicom
3
Typical Characteristics TC = 25°C unless otherwise noted
1.2
60
1.0
0.8
40
0.6
0.4
20
0.2
0
0
150
0
25
50
75
100
175
125
o
25
50
75
100
125
150
175
o
T
, CASE TEMPERATURE ( C)
C
T
, CASE TEMPERATURE ( C)
C
Figure 1. Normalized Power Dissipation vs Case
Temperature
Figure 2. Maximum Continuous Drain Current vs
Case Temperature
2
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
1
0.1
0.05
0.02
0.01
P
DM
0.1
t
1
t
2
NOTES:
DUTY FACTOR: D = t /t
1
2
SINGLE PULSE
0.01
PEAK T = P x Z
x R
+ T
J
DM
θJC
θJC C
-5
-4
-3
-2
-1
0
1
10
10
10
10
t, RECTANGULAR PULSE DURATION (s)
10
10
10
Figure 3. Normalized Maximum Transient Thermal Impedance
600
o
T
= 25 C
C
FOR TEMPERATURES
o
ABOVE 25 C DERATE PEAK
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
CURRENT AS FOLLOWS:
175 - T
150
C
I = I
25
V
= 10V
GS
V
= 4.5V
GS
100
50
-5
-4
-3
-2
-1
0
1
10
10
10
10
t, PULSE WIDTH (s)
10
10
10
Figure 4. Peak Current Capability
©2008 Fairchild Semiconductor Corporation
FDP8880 / FDB8880 Rev. A1
www.fairchildsemicom
4
Typical Characteristics TC = 25°C unless otherwise noted
400
100
500
If R = 0
= (L)(I )/(1.3*RATED BV
t
AV
- V
DD
)
AS
DSS
10µs
If R ≠ 0
t
= (L/R)ln[(I *R)/(1.3*RATED BV
- V ) +1]
DSS DD
AV
AS
100
100µs
10
1
1ms
o
STARTING T = 25 C
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(ON)
J
10
10ms
SINGLE PULSE
o
STARTING T = 150 C
J
T
= MAX RATED
J
DC
o
T
= 25 C
C
0.1
1
0.001
0.01
0.1
t , TIME IN AVALANCHE (ms)
AV
1
10
100
1
10
, DRAIN TO SOURCE VOLTAGE (V)
40
V
DS
NOTE: Refer to Fairchild Application Notes AN7514 and AN7515
Figure 6. Unclamped Inductive Switching
Capability
Figure 5. Forward Bias Safe Operating Area
80
160
PULSE DURATION = 80µs
V
= 4.5V
GS
V
= 3.5V
DUTY CYCLE = 0.5% MAX
GS
V
= 15V
DD
120
80
40
0
60
40
20
0
V
= 10V
GS
V
= 3V
GS
o
T
= 175 C
J
o
T
= 25 C
C
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
o
o
T
= 25 C
J
T = -55 C
J
V
= 2.5V
0.75
GS
0
0.25
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
V
, GATE TO SOURCE VOLTAGE (V)
V
, DRAIN TO SOURCE VOLTAGE (V)
GS
DS
Figure 7. Transfer Characteristics
Figure 8. Saturation Characteristics
20
1.7
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
I
= 54A
D
1.53
1.36
1.19
1.02
16
12
8
I
= 5A
D
0.85
0.7
V
= 10V, I = 54A
D
GS
2
4
6
8
10
-80
-40
0
40
80
120
160
200
o
T , JUNCTION TEMPERATURE ( C)
V
, GATE TO SOURCE VOLTAGE (V)
J
GS
Figure 9. Drain to Source On Resistance vs Gate
Voltage and Drain Current
Figure 10. Normalized Drain to Source On
Resistance vs Junction Temperature
©2008 Fairchild Semiconductor Corporation
FDP8880 / FDB8880 Rev. A1
www.fairchildsemicom
5
Typical Characteristics TC = 25°C unless otherwise noted
1.1
1.5
I
= 250µA
D
V
= V , I = 250µA
DS D
GS
1.2
1.0
0.9
0.6
0.3
0.9
-80
-40
0
40
80
120
160
200
-80
-40
0
40
80
120
160
200
o
o
T , JUNCTION TEMPERATURE ( C)
T , JUNCTION TEMPERATURE ( C)
J
J
Figure 11. Normalized Gate Threshold Voltage vs
Junction Temperature
Figure 12. Normalized Drain to Source
Breakdown Voltage vs Junction Temperature
2000
10
V
= 15V
DD
8
6
4
2
0
C
= C + C
GS GD
ISS
1000
C
C
+ C
OSS
DS GD
C
= C
GD
RSS
WAVEFORMS IN
DESCENDING ORDER:
I
I
= 54A
= 5A
D
D
V
= 0V, f = 1MHz
GS
100
0.1
0
5
10
15
20
25
30
1
10
V
, DRAIN TO SOURCE VOLTAGE (V)
Q , GATE CHARGE (nC)
DS
g
Figure 13. Capacitance vs Drain to Source
Voltage
Figure 14. Gate Charge Waveforms for Constant
Gate Current
©2008 Fairchild Semiconductor Corporation
FDP8880 / FDB8880 Rev. A1
www.fairchildsemicom
6
Test Circuits and Waveforms
V
DS
BV
DSS
t
P
L
V
DS
I
VARY t TO OBTAIN
P
AS
+
-
V
DD
R
REQUIRED PEAK I
G
AS
V
DD
V
GS
DUT
t
P
I
0V
AS
0
0.01Ω
t
AV
Figure 15. Unclamped Energy Test Circuit
Figure 16. Unclamped Energy Waveforms
V
DS
V
Q
DD
g(TOT)
V
V
DS
GS
L
V
= 10V
GS
Q
V
g(5)
GS
+
Q
gs2
V
V
= 5V
DD
GS
-
DUT
V
= 1V
GS
I
g(REF)
0
Q
g(TH)
Q
Q
gs
gd
I
g(REF)
0
Figure 17. Gate Charge Test Circuit
Figure 18. Gate Charge Waveforms
V
DS
t
t
ON
OFF
t
d(OFF)
t
d(ON)
R
t
t
f
L
r
V
DS
90%
90%
+
-
V
GS
V
DD
10%
10%
0
DUT
90%
50%
R
GS
V
GS
50%
PULSE WIDTH
V
10%
GS
0
Figure 19. Switching Time Test Circuit
Figure 20. Switching Time Waveforms
©2008 Fairchild Semiconductor Corporation
FDP8880 / FDB8880 Rev. A1
www.fairchildsemicom
7
PSPICE Electrical Model
.SUBCKT FDP8880 2 1 3 ; rev October 2004
Ca 12 8 9.5e-10
Cb 15 14 9.5e-10
Cin 6 8 1.15e-9
LDRAIN
DPLCAP
DRAIN
2
5
10
Dbody 7 5 DbodyMOD
Dbreak 5 11 DbreakMOD
Dplcap 10 5 DplcapMOD
RLDRAIN
RSLC1
51
DBREAK
+
RSLC2
5
ESLC
11
51
Ebreak 11 7 17 18 32.88
Eds 14 8 5 8 1
Egs 13 8 6 8 1
Esg 6 10 6 8 1
Evthres 6 21 19 8 1
-
+
50
-
17
DBODY
RDRAIN
6
8
EBREAK 18
-
ESG
EVTHRES
+
16
21
+
-
19
8
MWEAK
Evtemp 20 6 18 22 1
LGATE
EVTEMP
RGATE
GATE
1
6
+
-
18
22
MMED
It 8 17 1
9
20
MSTRO
8
RLGATE
Lgate 1 9 5.3e-9
Ldrain 2 5 1.0e-9
Lsource 3 7 1.7e-9
LSOURCE
CIN
SOURCE
3
7
RSOURCE
RLSOURCE
RLgate 1 9 53
RLdrain 2 5 10
RLsource 3 7 17
S1A
S2A
RBREAK
12
15
13
14
13
17
18
8
RVTEMP
19
-
S1B
S2B
Mmed 16 6 8 8 MmedMOD
Mstro 16 6 8 8 MstroMOD
Mweak 16 21 8 8 MweakMOD
13
CB
CA
IT
14
+
+
VBAT
6
8
5
8
EGS
EDS
+
Rbreak 17 18 RbreakMOD 1
Rdrain 50 16 RdrainMOD 1.0e-3
Rgate 9 20 2.2
-
-
8
22
RVTHRES
RSLC1 5 51 RSLCMOD 1e-6
RSLC2 5 50 1e3
Rsource 8 7 RsourceMOD 6.8e-3
Rvthres 22 8 RvthresMOD 1
Rvtemp 18 19 RvtempMOD 1
S1a 6 12 13 8 S1AMOD
S1b 13 12 13 8 S1BMOD
S2a 6 15 14 13 S2AMOD
S2b 13 15 14 13 S2BMOD
Vbat 22 19 DC 1
ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*170),5))}
.MODEL DbodyMOD D (IS=3E-12 IKF=10 N=1.01 RS=5e-3 TRS1=8e-4 TRS2=2e-7
+ CJO=4.8e-10 M=0.55 TT=1e-11 XTI=2)
.MODEL DbreakMOD D (RS=0.2 TRS1=1e-3 TRS2=-8.8e-6)
.MODEL DplcapMOD D (CJO=5.5e-10 IS=1e-30 N=10 M=0.45)
.MODEL MstroMOD NMOS (VTO=2.10 KP=170 IS=1e-30 N=10 TOX=1 L=1u W=1u)
.MODEL MmedMOD NMOS (VTO=1.75 KP=10 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=2.2)
.MODEL MweakMOD NMOS (VTO=1.39 KP=0.05 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=22 RS=0.1)
.MODEL RbreakMOD RES (TC1=8.0e-4 TC2=-8e-7)
.MODEL RdrainMOD RES (TC1=-12e-3 TC2=.35e-4)
.MODEL RSLCMOD RES (TC1=9e-4 TC2=1e-6)
.MODEL RsourceMOD RES (TC1=5e-3 TC2=1e-6)
.MODEL RvtempMOD RES (TC1=-2.78e-3 TC2=1.5e-6)
.MODEL RvthresMOD RES (TC1=-1e-3 TC2=-8.2e-6)
MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-4 VOFF=-3.5)
.MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-3.5 VOFF=-4)
.MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-1.3 VOFF=-0.8)
.MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-0.8 VOFF=-1.3)
.ENDS
Note: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank
Wheatley.
©2008 Fairchild Semiconductor Corporation
FDP8880 / FDB8880 Rev. A1
www.fairchildsemicom
8
SABER Electrical Model
rev October 2004
template FDP8880 n2,n1,n3
electrical n2,n1,n3
{
var i iscl
dp..model dbodymod = (isl=3e-12,ikf=10,nl=1.01,rs=5e-3,trs1=8e-4,trs2=2e-7,cjo=4.8e-10,m=0.55,tt=1e-11,xti=2)
dp..model dbreakmod = (rs=0.2,trs1=1e-3,trs2=-8.8e-6)
dp..model dplcapmod = (cjo=5.5e-10,isl=10e-30,nl=10,m=0.45)
m..model mstrongmod = (type=_n,vto=2.10,kp=170,is=1e-30, tox=1)
m..model mmedmod = (type=_n,vto=1.75,kp=10,is=1e-30, tox=1)
m..model mweakmod = (type=_n,vto=1.39,kp=0.05,is=1e-30, tox=1,rs=0.1)
sw_vcsp..model s1amod = (ron=1e-5,roff=0.1,von=-4,voff=-3.5)
LDRAIN
sw_vcsp..model s1bmod = (ron=1e-5,roff=0.1,von=-3.5,voff=-4)
sw_vcsp..model s2amod = (ron=1e-5,roff=0.1,von=-1.3,voff=-0.8)
sw_vcsp..model s2bmod = (ron=1e-5,roff=0.1,von=-0.8,voff=-1.3)
c.ca n12 n8 = 9.5e-10
c.cb n15 n14 = 9.5e-10
c.cin n6 n8 = 1.15e-9
DPLCAP
DRAIN
2
5
10
RLDRAIN
RSLC1
51
RSLC2
ISCL
dp.dbody n7 n5 = model=dbodymod
dp.dbreak n5 n11 = model=dbreakmod
dp.dplcap n10 n5 = model=dplcapmod
DBREAK
11
50
-
RDRAIN
6
8
ESG
DBODY
EVTHRES
+
16
21
+
-
19
8
spe.ebreak n11 n7 n17 n18 = 32.88
spe.eds n14 n8 n5 n8 = 1
spe.egs n13 n8 n6 n8 = 1
MWEAK
LGATE
EVTEMP
RGATE
GATE
1
6
+
-
18
22
EBREAK
+
MMED
9
20
spe.esg n6 n10 n6 n8 = 1
spe.evthres n6 n21 n19 n8 = 1
spe.evtemp n20 n6 n18 n22 = 1
MSTRO
8
17
18
-
RLGATE
LSOURCE
CIN
SOURCE
3
7
RSOURCE
i.it n8 n17 = 1
RLSOURCE
S1A
S2A
l.lgate n1 n9 = 5.3e-9
l.ldrain n2 n5 = 1.0e-9
l.lsource n3 n7 = 1.7e-9
RBREAK
12
15
13
8
14
13
17
18
RVTEMP
19
S1B
S2B
13
CB
res.rlgate n1 n9 = 53
res.rldrain n2 n5 = 10
res.rlsource n3 n7 = 17
CA
IT
14
-
+
+
VBAT
6
8
5
8
EGS
EDS
+
-
-
8
m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u
22
m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u
m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u
RVTHRES
res.rbreak n17 n18 = 1, tc1=8.0e-4,tc2=-8e-7
res.rdrain n50 n16 = 1.0e-3, tc1=-12e-3,tc2=.35e-4
res.rgate n9 n20 = 2.2
res.rslc1 n5 n51 = 1e-6, tc1=9e-4,tc2=1e-6
res.rslc2 n5 n50 = 1e3
res.rsource n8 n7 = 6.8e-3, tc1=5e-3,tc2=1e-6
res.rvthres n22 n8 = 1, tc1=-1e-3,tc2=-8.2e-6
res.rvtemp n18 n19 = 1, tc1=-2.78e-3,tc2=1.5e-6
sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod
sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod
sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod
sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod
v.vbat n22 n19 = dc=1
equations {
i (n51->n50) +=iscl
iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/170))** 5))}
}
©2008 Fairchild Semiconductor Corporation
FDP8880 / FDB8880 Rev. A1
www.fairchildsemicom
9
PSPICE Thermal Model
JUNCTION
th
REV 23 December 2003
FDP8880T
CTHERM1 TH 6 8e-4
CTHERM2 6 5 1e-3
CTHERM3 5 4 2.5e-3
CTHERM4 4 3 2.6e-3
CTHERM5 3 2 8e-3
CTHERM6 2 TL 1.5e-2
RTHERM1
RTHERM2
RTHERM3
RTHERM4
RTHERM5
RTHERM6
CTHERM1
6
RTHERM1 TH 6 1.44e-1
RTHERM2 6 5 1.9e-1
RTHERM3 5 4 3.0e-1
RTHERM4 4 3 4.0e-1
RTHERM5 3 2 5.7e-1
RTHERM6 2 TL 5.8e-1
CTHERM2
CTHERM3
CTHERM4
CTHERM5
CTHERM6
5
SABER Thermal Model
SABER thermal model FDP8880T
template thermal_model th tl
thermal_c th, tl
{
ctherm.ctherm1 th 6 =8e-4
ctherm.ctherm2 6 5 =1e-3
ctherm.ctherm3 5 4 =2.5e-3
ctherm.ctherm4 4 3 =2.6e-3
ctherm.ctherm5 3 2 =8e-3
ctherm.ctherm6 2 tl =1.5e-2
4
3
2
rtherm.rtherm1 th 6 =1.44e-1
rtherm.rtherm2 6 5 =1.9e-1
rtherm.rtherm3 5 4 =3.0e-1
rtherm.rtherm4 4 3 =4.0e-1
rtherm.rtherm5 3 2 =5.7e-1
rtherm.rtherm6 2 tl =5.8e-1
}
tl
CASE
©2008 Fairchild Semiconductor Corporation
FDP8880 / FDB8880 Rev. A1
www.fairchildsemicom
10
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