FIN1017MX [ONSEMI]
3.3V LVDS 1 位高速差分驱动器;
| 型号： | FIN1017MX |
| 厂家： | 
ONSEMI |
| 描述： | 3.3V LVDS 1 位高速差分驱动器 驱动 光电二极管 接口集成电路 驱动器 |
| 文件： | 总13页 (文件大小：846K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON
Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA
Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended
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is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
May 2010
FIN1017
3.3V LVDS, 1-Bit, High-Speed Differential Driver
Features
Description
This single driver is designed for high-speed
interconnects utilizing Low Voltage Differential Signaling
(LVDS) technology. The driver translates LVTTL signal
levels to LVDS levels with a typical differential output
swing of 350mV, which provides low EMI at ultra-low
power dissipation even at high frequencies. This device
is ideal for high-speed transfer of clock or data.
Greater than 600Mbs Data Rate
3.3V Power Supply Operation
0.5ns Maximum Differential Pulse Skew
1.5ns Maximum Propagation Delay
Low Power Dissipation
The FIN1017 can be paired with its companion receiver,
the FIN1018, or with any other LVDS receiver.
Power-Off Protection
Meets or Exceeds the TIA/EIA-644 LVDS Standard
Flow-Through Pinout Simplifies PCB Layout
8-Lead SOIC and US8 Packages Save Space
Ordering Information
Operating
Temperature Range
Packing
Part Number
Package
Method
8-Lead Small Outline Integrated Circuit (SOIC),
JEDEC MS-012, 0.150inch Narrow
FIN1017MX
FIN1017K8X
-40 to +85°C
Tape and Reel
Tape and Reel
8-Lead US8, JEDEC MO-187, Variation CA
3.1mm Wide
-40 to +85°C
© 2001 Fairchild Semiconductor Corporation
FIN1017 • Rev. 1.0.3
www.fairchildsemi.com
Pin Configuration
Figure 1. SOIC
Figure 2. US-8 (Top View)(1)
Note:
1. Ground pins 4 and 5 for optimum performance.
Pin Definitions
Pin# US-8
Pin# SOIC
Name
DIN
Description
7
2
2
LVTTL Data Input
7
DOUT+
DOUT-
Non-inverting Driver Output
Inverting Driver Output
Power Supply
1
8
8
1
4
VCC
4, 5
3, 6
GND / GNDS
NC
Ground
3, 5, 6
No Connect
Function Table
Input
Outputs
DIN
DOUT+
LOW
HIGH
LOW
DOUT-
HIGH
LOW
HIGH
LOW
HIGH
OPEN
© 2001 Fairchild Semiconductor Corporation
FIN1017 • Rev. 1.0.3
www.fairchildsemi.com
2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only.
Symbol
VCC
Parameter
Min.
-0.5
-0.5
-0.5
Max.
+4.6
+6.0
+4.7
10
Unit
V
Supply Voltage
DIN
DC Input Voltage
V
DOUT
IOSD
TSTG
TJ
DC Output Voltage
V
Driver Short-Circuit Current, Continuous
Storage Temperature Range
mA
°C
°C
°C
-65
+150
+150
+260
6500
10500
350
Max Junction Temperature
TL
Lead Temperature (Soldering, 10 Seconds)
Human Body Model, JESD22-A114
Bus Pins DOUT+/DOUT- to GND
Machine Model, JESD22-A115
ESD
V
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
VCC
Parameter
Min.
3.0
0
Max.
3.6
Unit
V
Supply Voltage
Input Voltage
VIN
VCC
V
TA
Operating Temperature
-40
+85
°C
© 2001 Fairchild Semiconductor Corporation
FIN1017 • Rev. 1.0.3
www.fairchildsemi.com
3
DC Electrical Characteristics
Over-supply voltage and operating temperature ranges, unless otherwise specified. All typical values are at TA =
25°C and with VCC = 3.3V.
Symbol
Parameter
Conditions
Min. Typ. Max. Units
VOD
Output Differential Voltage
250
350
450
mV
mV
V
VOD Magnitude Change from
Differential LOW-to-HIGH
25
ΔVOD
VOS
RL = 100 Ω, See Figure 3
Offset Voltage
1.125 1.250 1.375
25
Offset Magnitude Change from
Differential LOW-to-HIGH
mV
ΔVOS
IOFF
Power-Off Output Current
VCC = 0V, VOUT = 0V or 3.6V
VOUT = 0V
±20
-8
mA
mA
IOS
Short-Circuit Output Current
VOD = 0V
±8
VIH
VIL
Input HIGH Voltage
Input LOW Voltage
Input Current
2
VCC
0.8
V
GND
V
IIN
VIN = 0V or VCC
±20
±20
mA
mA
V
II(OFF)
VIK
Power-Off Input Current
Input Clamp Voltage
VCC = 0V, VIN = 0V or 3.6V
IIK = -18mA
-1.5
No Load, VIN = 0V or VCC
RL = 100Ω, VIN = 0V or VCC
8
mA
mA
pF
pF
ICC
Power Supply Current
10
CIN
Input Capacitance
Output Capacitance
4
6
COUT
AC Electrical Characteristics
Over-supply voltage and operating temperature ranges, unless otherwise specified. All typical values are at TA =
25°C and with VCC = 3.3V.
Symbol
tPLHD
Parameter
Test Conditions
Min. Max. Units
Differential Propagation Delay, LOW-to-HIGH
Differential Propagation Delay, HIGH-to-LOW
Differential Output Rise Time (20% to 80%)
Differential Output Fall Time (80% to 20%)
0.5
0.5
0.4
0.4
1.5
1.5
1.0
1.0
0.5
1.0
ns
ns
ns
ns
ns
ns
tPHLD
tTLHD
RL = 100Ω, CL = 10pF,
see Figure 4 and Figure 5
tTHLD
tSK(P)
Pulse Skew |tPLH - tPHL
Part-to-Part Skew(2)
|
tSK(PP)
Note:
2.
tSK(PP) is the magnitude of the difference in propagation delay times between any specified terminals of two
devices switching in the same direction (either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with
the same supply voltage, same temperature, and have identical test circuits.
© 2001 Fairchild Semiconductor Corporation
FIN1017 • Rev. 1.0.3
www.fairchildsemi.com
4
Test Diagrams
Figure 3. Differential Driver DC Test Circuit
Figure 4. Differential Driver Propagation Delay and Transition Time Test Circuit
Notes:
Note A: All input pulses have frequency = 10MHz, tR or tF = 2ns.
Note B: CL includes all probe and fixture capacitances.
Figure 5. AC Waveforms
© 2001 Fairchild Semiconductor Corporation
FIN1017 • Rev. 1.0.3
www.fairchildsemi.com
5
Typical Performance Characteristics
Figure 6. Output High Voltage
vs. Power Supply Voltage
Figure 7. Output Low Voltage
vs. Power Supply Voltage
Figure 8. Output Short Circuit Current
vs. Power Supply Voltage
Figure 9. Differential Output Voltage
vs. Power Supply Voltage
Figure 10. Differential Output Voltage
vs. Load Resistor
Figure 11. Offset Voltage vs. Power Supply Voltage
© 2001 Fairchild Semiconductor Corporation
FIN1017 • Rev. 1.0.3
www.fairchildsemi.com
6
Typical Performance Characteristics
Figure 12. Power Supply Current vs. Frequency
Figure 13. Power Supply Current
vs. Power Supply Voltage
Figure 14. Power Supply Current
vs. Ambient Temperature
Figure 15. Differential Propagation Delay
vs. Power Supply
Figure 16. Differential Propagation Delay
vs. Ambient Temperature
Figure 17. Differential Pulse Skew (tPLH - tPHL
vs. Power Supply Voltage
)
© 2001 Fairchild Semiconductor Corporation
FIN1017 • Rev. 1.0.3
www.fairchildsemi.com
7
Typical Performance Characteristics
Figure 18. Differential Pulse Skew (tPLH - tPHL
vs. Ambient Temperature
)
Figure 19. Transition Time
vs. Power Supply Voltage
Figure 20. Transition Time vs. Ambient Temperature
© 2001 Fairchild Semiconductor Corporation
FIN1017 • Rev. 1.0.3
www.fairchildsemi.com
8
Physical Dimensions
5.00
4.80
A
0.65
3.81
8
5
B
1.75
6.20
5.80
4.00
3.80
5.60
1
4
PIN ONE
INDICATOR
1.27
1.27
(0.33)
M
0.25
C B A
LAND PATTERN RECOMMENDATION
SEE DETAIL A
0.25
0.10
0.25
0.19
C
1.75 MAX
0.10
C
0.51
0.33
OPTION A - BEVEL EDGE
0.50
0.25
x 45°
R0.10
R0.10
GAGE PLANE
OPTION B - NO BEVEL EDGE
0.36
NOTES: UNLESS OTHERWISE SPECIFIED
8°
0°
0.90
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AA, ISSUE C,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
SEATING PLANE
(1.04)
0.406
D) LANDPATTERN STANDARD: SOIC127P600X175-8M.
E) DRAWING FILENAME: M08AREV13
DETAIL A
SCALE: 2:1
Figure 21. 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150inch Narrow
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2001 Fairchild Semiconductor Corporation
FIN1017 • Rev. 1.0.3
www.fairchildsemi.com
9
Physical Dimensions
1.80
0.15
8
5
-B-
0.70
2.3±0.1
3.1±.1
1.55
1.00
0.30 TYP
1
4
0.2 C B
ALL LEAD TIPS
A
0.5 TYP
PIN #1 IDENT.
ALL LEAD TIPS
0.1 C
DETAIL A
0.70±0.10
0.90 MAX
-C-
0.10-0.18
0.10
0.00
0.17-0.27
0.13
A B
C
0.50TYP
0.4 TYP
GAGE PLANE
0.12
0°-8°
A. CONFORMS TO JEDEC REGISTRATION MO-187
B. DIMENSIONS ARE IN MILLIMETERS.
SEATING PLANE
C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH,
AND TIE BAR EXTRUSIONS.
D. DIMENSIONS AND TOLERANCES PER ANSI Y14.5M, 1982.
DETAIL A
MAB08AREVC
Figure 22. 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify
or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically
the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2001 Fairchild Semiconductor Corporation
FIN1017 • Rev. 1.0.3
www.fairchildsemi.com
10
© 2001 Fairchild Semiconductor Corporation
FIN1017 • Rev. 1.0.3
www.fairchildsemi.com
11
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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