FIN1019MTCX [ONSEMI]
3.3V LVDS 高速差分驱动器/接收器;
| 型号： | FIN1019MTCX |
| 厂家： | 
ONSEMI |
| 描述： | 3.3V LVDS 高速差分驱动器/接收器 驱动 光电二极管 接口集成电路 驱动器 |
| 文件： | 总15页 (文件大小：2040K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
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3.3 V LVDS High Speed
Differential Driver/Receiver
14
1
TSSOP−14 WB
CASE 948G
FIN1019
General Description
This driver and receiver pair are designed for high speed
interconnects utilizing Low Voltage Differential Signaling (LVDS)
technology. The driver translates LVTTL signals to LVDS levels with
a typical differential output swing of 350 mV and the receiver
translates LVDS signals, with a typical differential input threshold of
100 mV, into LVTTL levels. LVDS technology provides low EMI at
ultra low power dissipation even at high frequencies. This device is
ideal for high speed clock or data transfer.
MARKING DIAGRAM
14
$Y&Z&2&K
FIN
1019
1
Features
$Y
&Z
&2
&K
= Logo
= Assembly Plant Code
= 2−Digit Date Code
= 2−Digits Lot Run Traceability Code
• Greater than 400 Mbs Data Rate
• 3.3 V Power Supply Operation
• 0.5 ns Maximum Differential Pulse Skew
• 2.5 ns Maximum Propagation Delay
• Low Power Dissipation
FIN1019 = Specific Device Code
CONNECTION DIAGRAM
• Power−Off Protection
• 100 mV Receiver Input Sensitivity
DE 1
14 V
CC
• Fail Safe Protection Open−circuit, Shorted and Terminated
D
2
13 NC
IN
Conditions
NC 3
12 D
11 D
10 R
OUT+
OUT−
IN+
• Meets or Exceeds the TIA/EIA−644 LVDS Standard
• Flow−through Pinout Simplifies PCB Layout
R
4
OUT
NC 5
NC 6
• 14−Lead TSSOP Package Save Space
9
8
R
IN−
• This Device is Pb−Free, Halide Free and is RoHS Compliant
GND 7
RE
FUNCTION TABLE
R
R
RE
L
R
OUT
IN+
IN−
ORDERING INFORMATION
L
H
L
†
H
X
L
X
L
H
Z
Order Number
FIN1019MTCX TSSOP−14 WB 2500 / Tape &
(Pb−Free) Reel
Package
Shipping
H
L
Fail Safe Condition
H
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
D
DE
H
D
D
OUT−
IN
OUT+
L
L
H
H
X
H
H
Z
L
L
Z
H
L
Open−Circuit or Z
H
H = HIGH Logic Level
Z = High Impedance
L = LOW Logic Level
Fail Safe = Open, Shorted, Terminated
X = Don’t Care
© Semiconductor Components Industries, LLC, 2001
1
Publication Order Number:
November, 2022 − Rev. 1
FIN1019/D
FIN1019
PIN DESCRIPTIONS
Pin Name
Description
D
IN
LVTTL Data Input
D
D
Non−inverting LVDS Output
Inverting LVDS Output
Driver Enable (LVTTL, Active HIGH)
Non−Inverting LVDS Input
Inverting LVDS Input
LVTTL Receiver Output
Receiver Enable (LVTTL, Active LOW)
Power Supply
OUT+
−
OUT
DE
R
IN+
IN−
R
R
OUT
RE
V
CC
GND
NC
Ground
No Connect
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Rating
−0.5 V to +4.6 V
−0.5 V to +6 V
−0.5 V to 4.7 V
−0.5 V to +6 V
−0.5 V to 4.7 V
Continuous
16 mA
V
CC
Supply Voltage
D
, DE, RE
LVTTL DC Input Voltage
LVDS DC Input Voltage
LVTTL DC Output Voltage
LVDS DC Output Voltage
IN
R
, R
IN+
IN−
R
OUT
D
OUT+
, D
OUT−
I
LVDS Driver Short Circuit Current
LVTTL DC Output Current
OSD
I
O
T
Storage Temperature Range
Max Junction Temperature
−65°C to +150°C
150°C
STG
T
J
T
L
Lead Temperature (Soldering, 10 Seconds)
ESD (Human Body Model)
260°C
≥6500 V
ESD (Machine Model)
≥300 V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
V
CC
Supply Voltage
3.0 V to 3.6 V
V
Input Voltage
0 to V
CC
IN
ID
IC
|V
V
|
Magnitude of Differential Voltage
Common−Mode Input Voltage
Operating Temperature
100 mV to V
CC
0.05 V to 2.35 V
T
−40°C to +85°C
A
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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2
FIN1019
DC ELECTRICAL CHARACTERISTICS (Over supply voltage and operating temperature ranges, unless otherwise specified)
Typ
(Note 1)
Symbol
Parameter
Test Conditions
Min
Max
Unit
LVDS DIFFERENTIAL DRIVER CHARACTERISTICS
V
Output Differential Voltage
V Magnitude Change from
OD
R = 100 W, See Figure 1
L
250
−
350
−
450
25
mV
mV
OD
DV
OD
Differential LOW−to−HIGH
V
Offset Voltage
1.125
−
1.25
−
1.375
25
V
OS
DV
Offset Magnitude Change from
Differential LOW−to−HIGH
mV
OS
I
Disabled Output Leakage Current
Power Off Output Current
V
V
V
V
= V or GND, DE = 0 V
−
−
−
−
−
−
−
−
20
20
−8
8
mA
mA
OZD
OUT
CC
I
= 0 V, V
= 0 V or 3.6 V
OFF
CC
OUT
I
Short Circuit Output Current
mA
= 0 V, DE = V
OS
OUT
CC
= 0 V, DE = V
OD
CC
LVTTL DRIVER CHARACTERISTICS
V
Output HIGH Voltage
V
CC
− 0.2
−
−
−
−
V
V
I
= −100 mA, RE = 0 V, See Figure 6 and Table 1
OH
OH
I
= −8 mA, RE = 0 V, V = 400 mV
2.4
OH
ID
V
= 400 mV, V = 1.2 V, see Figure 6
ID
IC
V
Output LOW Voltage
−
−
−
−
−
−
0.2
0.5
20
I
OL
= 100 mA, RE = 0 V, V = −400 mV
OL
ID
See Figure 6 and Table 1
I
OL
= −8 mA, RE = 0 V, V = −400 mV
ID
V
= −400 mV, V = 1.2 V, see Figure 6
ID
IC
I
Disabled Output Leakage Current
V
= V or GND, RE = V
CC
mA
OZ
OUT
CC
LVDS RECEIVER CHARACTERISTICS
V
Differential Input Threshold HIGH
Differential Input Threshold LOW
Input Current
See Figure 6 and Table 1
See Figure 6 and Table 1
−
−100
−
−
−
−
−
100
−
mV
mV
mA
TH
V
TL
IN
I
V
V
= 0 V or V
20
20
IN
CC
I
Power−OFF Input Current
= 0 V, V = 0 V or 3.6 V
−
mA
I(OFF)
CC
IN
LVTTL DRIVER AND CONTROL SIGNALS CHARACTERISTICS
V
Input HIGH Voltage
Input LOW Voltage
Input Current
2.0
GND
−
−
−
−
−
−
V
V
V
IH
CC
V
0.8
20
20
−
IL
I
IN
V
V
= 0 V or V
CC
mA
mA
V
IN
I
Power−OFF Input Current
Input Clamp Voltage
= 0 V, V = 0 V or 3.6 V
−
I(OFF)
CC
IN
V
I
IK
= −18 mA
−1.5
IK
DEVICE CHARACTERISTICS
I
Power Supply Current
−
−
−
−
12.5
12.5
mA
mA
Driver Enabled, Driver Load: R = 100 W
Receiver Disabled, No Receiver Load
CC
L
Driver Enabled, Driver Load: R = 100 W,
L
Receiver Enabled, (R = 1 V and R = 1.4 V)
IN+
IN−
or (R = 1.4 V and R
= 1 V)
IN+
OUT−
Driver Disabled, Receiver Enabled, (R = 1 V and
−
−
IN+
R
= 1.4 V) or (R = 1.4 V and R = 1 V)
IN−
IN+ IN−
7.0
7.0
−
mA
mA
pF
Driver Disabled, Receiver Disabled
Any LVTTL or LVDS Input
−
−
−
−
4
6
C
Input Capacitance
Output Capacitance
IN
C
OUT
Any LVTTL or LVDS Output
−
pF
1. All typical values are at T = 25°C and with V = 3.3 V.
A
CC
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3
FIN1019
AC ELECTRICAL CHARACTERISTICS (Over supply voltage and operating temperature ranges, unless otherwise specified)
Typ
(Note 2)
Symbol
Parameter
Test Conditions
Min
Max
Unit
DRIVER TIMING CHARACTERISTICS
t
t
Differential Propagation Delay
LOW−to−HIGH
R = 100 W, C = 10 pF,
See Figure 2 and Figure 3
0.5
0.5
−
−
1.5
1.5
ns
ns
PLHD
L
L
Differential Propagation Delay
HIGH−to−LOW
PHLD
t
t
Differential Output Rise Time (20% to 80%)
Differential Output Fall Time (80% to 20%)
0.4
0.4
−
−
−
−
−
−
−
−
−
1.0
1.0
0.5
1.0
5.0
5.0
5.0
5.0
ns
ns
ns
ns
ns
ns
ns
ns
TLHD
THLD
SK(P)
t
Pulse Skew |t
− t
PHL
|
PLH
t
Part−to−Part Skew (Note 3)
R = 100 W, C = 10 pF,
See Figure 4 and Figure 5
−
SK(PP)
L
L
t
Differential Output Enable Time from Z to HIGH
Differential Output Enable Time from Z to LOW
Differential Output Disable Time from HIGH to Z
Differential Output Disable Time from LOW to Z
−
ZHD
t
−
ZLD
HZD
t
−
t
−
LZD
RECEIVER TIMING CHARACTERISTICS
t
t
Propagation Delay LOW−to−HIGH
Propagation Delay HIGH−to−LOW
Output Rise Time (20% to 80%)
Output Fall Time (80% to 20%)
|V | = 400 mV, C = 10 pF,
See Figure 6 and Figure 7
0.9
0.9
−
−
−
2.5
2.5
−
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
PLH
PHL
ID
L
t
t
0.5
0.5
−
TLH
−
−
THL
t
Pulse Skew |t
− t |
PHL
−
0.5
1.0
5.0
5.0
5.0
5.0
SK(P)
PLH
t
Part−to−Part Skew (Note 3)
−
−
SK(PP)
t
LVTTL Output Enable Time from Z to HIGH
LVTTL Output Enable Time from Z to LOW
LVTTL Output Disable Time from HIGH to Z
LVTTL Output Disable Time from LOW to Z
R = 500 W, C = 10 pF, See Figure 8
−
−
ZH
L
L
t
ZL
−
−
t
−
−
HZ
t
LZ
−
−
2. All typical values are at T = 25°C and with V = 5 V.
A
CC
3. t
is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same
SK(PP)
direction (either LOW−to−HIGH or HIGH−to−LOW) when both devices operate with the same supply voltage, same temperature, and have
identical test circuits.
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4
FIN1019
NOTE A: Input pulses have frequency = 10 MHz, t or t = 2 ns
R
F
NOTE B: C includes all probe and fixture capacitances
L
Figure 1. Differential Driver DC Test Circuit
Figure 2. Differential Driver Propagation Delay and
Transition Time Test Circuit
NOTE B: Input pulses have the frequency = 10 MHz, t or t = 2 ns
R
F
NOTE A: C includes all probe and fixture capacitances
L
Figure 3. AC Waveforms for Differential Driver
Figure 4. Differential Driver Enable and Disable
Test Circuit
Figure 5. Enable and Disable AC Waveforms
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5
FIN1019
NOTE A: Input pulses have frequency = 10 MHz, tR or tF = 1 ns
NOTE B: CL includes all probe and fixture capacitance
Figure 6. Differential Receiver Voltage Definitions and Propagation Delay and Transition Time Test Circuit
Table 1. RECEIVER MINIMUM AND MAXIMUM INPUT THRESHOLD TEST VOLTAGES
Resulting Differential
Input Voltage (mV)
Resulting Common Mode
Input Voltage (V)
Applied Voltages (V)
V
IA
V
IB
V
ID
V
IC
1.25
1.15
2.4
2.3
0.1
0
1.15
1.25
2.3
2.4
0
100
−100
100
1.2
1.2
2.35
2.35
0.05
0.05
1.2
−100
100
0.1
0.9
1.5
1.8
2.4
0
−100
600
1.5
0.9
2.4
1.8
0.6
0
−600
600
1.2
2.1
−600
600
2.1
0.3
0.6
−600
0.3
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6
FIN1019
Figure 7. LVDS Input to LVTTL Output AC Waveforms
Test Circuit for LVTTL Outputs
Voltage Waveforms Enable and Disable Times
Figure 8. LVTTL Outputs Test Circuit and AC Waveforms
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7
FIN1019
DC / AC TYPICAL PERFORMANCE CURVES
Drivers
Figure 9. Output High Voltage vs.
Figure 10. Output Low Voltage vs.
Power Supply Voltage
Power Supply Voltage
Figure 11. Output Short Circuit Current vs.
Power Supply Voltage
Figure 12. Differential Output Voltage vs.
Power Supply Voltage
Figure 13. Differential Output Voltage vs.
Load Resistor
Figure 14. Offset Voltage vs. Power
Supply Voltage
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8
FIN1019
DC / AC TYPICAL PERFORMANCE CURVES (continued)
Figure 15. Power Supply Current vs. Frequency
Figure 16. Power Supply Current vs.
Power Supply Voltage
Figure 17. Power Supply Current vs.
Ambient Temperature
Figure 18. Differential Propagation Delay vs.
Power Supply
Figure 19. Differential Propagation Delay vs.
Ambient Temperature
Figure 20. Differential Skew (tPLH − tPHL) vs.
Power Supply Voltage
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9
FIN1019
DC / AC TYPICAL PERFORMANCE CURVES (continued)
Figure 21. Differential Pulse Skew (tPLH − tPHL
vs. Ambient Temperature
)
Figure 22. Transition Time vs. Power Supply
Voltage
Figure 23. Transition Times vs. Ambient Temperature
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10
FIN1019
DC / AC TYPICAL PERFORMANCE CURVES
Receiver
Figure 24. Output High Voltage vs.
Power Supply Voltage
Figure 25. Output Low Voltage vs.
Power Supply Voltage
Figure 26. Output Short Circuit Current vs.
Power Supply Voltage
Figure 27. Power Supply Current vs. Frequency
Figure 28. Power Supply Current vs.
Power Supply Voltage
Figure 29. Power Supply Current vs.
Ambient Temperature
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11
FIN1019
DC / AC TYPICAL PERFORMANCE CURVES (continued)
Figure 30. Differential Propagation Delay vs.
Figure 31. Differential Propagation Delay vs.
Ambient Temperature
Power Supply Voltage
Figure 32. Differential Skew (tPHL − tPHL) vs.
Power Supply Voltage
Figure 33. Differential Skew (tPLH − tPHL) vs.
Ambient Temperature
Figure 34. Differential Propagation Delay vs.
Differential Input Voltage
Figure 35. Differential Propagation Delay vs.
Common−Mode Voltage
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12
FIN1019
DC / AC TYPICAL PERFORMANCE CURVES (continued)
Figure 36. Transition Time vs.
Figure 37. Transition Time vs. Ambient Temperature
Power Supply Voltage
Figure 38. Differential Propagation Delay vs. Load
Figure 39. Transition Time vs. Load
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13
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSSOP−14 WB
CASE 948G
ISSUE C
14
DATE 17 FEB 2016
1
SCALE 2:1
NOTES:
14X K REF
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
M
S
S
V
0.10 (0.004)
T U
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL
IN EXCESS OF THE K DIMENSION AT
MAXIMUM MATERIAL CONDITION.
S
0.15 (0.006) T U
N
0.25 (0.010)
14
8
2X L/2
M
B
L
N
−U−
PIN 1
IDENT.
F
7
1
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
DETAIL E
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
S
K
0.15 (0.006) T U
A
−V−
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
K1
A
B
C
D
F
G
H
J
4.90
4.30
−−−
0.05
0.50
5.10 0.193 0.200
4.50 0.169 0.177
J J1
1.20
−−− 0.047
0.15 0.002 0.006
0.75 0.020 0.030
SECTION N−N
0.65 BSC
0.026 BSC
0.60 0.020 0.024
0.20 0.004 0.008
0.16 0.004 0.006
0.30 0.007 0.012
0.25 0.007 0.010
0.50
0.09
0.09
0.19
J1
K
−W−
C
K1 0.19
L
M
6.40 BSC
0.252 BSC
0.10 (0.004)
0
8
0
8
_
_
_
_
SEATING
PLANE
−T−
H
G
DETAIL E
D
GENERIC
MARKING DIAGRAM*
14
SOLDERING FOOTPRINT
XXXX
XXXX
ALYWG
G
7.06
1
1
A
L
= Assembly Location
= Wafer Lot
Y
W
G
= Year
= Work Week
= Pb−Free Package
0.65
PITCH
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
01.34X6
14X
1.26
DIMENSIONS: MILLIMETERS
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASH70246A
TSSOP−14 WB
PAGE 1 OF 1
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相关型号：
FIN1019MTCX_NL
Line Transceiver, 1 Func, 1 Driver, 1 Rcvr, PDSO14, 4.40 MM, MO-153, TSSOP-14
FAIRCHILD
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