FL5150 [ONSEMI]
IGBT and MOSFET AC Phase Cut Dimmer Controller;
| 型号： | FL5150 |
| 厂家： | 
ONSEMI |
| 描述： | IGBT and MOSFET AC Phase Cut Dimmer Controller 双极性晶体管 |
| 文件： | 总23页 (文件大小：630K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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May 2016
FL5150/60
IGBT and MOSFET AC Phase Cut Dimmer Controller
Features
Description
.
Selectable Earth Ground or Line-Hot Zero Cross
Detection: Complies with UL1472 2015 2nd Edition
for Addition of Ground Leakage Current for Flicker
Reduction (North America)
The FL5150 and FL5160 are controllers for varying the
pulse width for AC loads. The FL5150 is for 50 Hz and
the FL5160 is for 60 Hz applications. The FL5150/60 is
powered from the AC line and generates a programmable
gate drive for controlling the pulse width for external IGBT
or MOSFET transistors. The pulse width can be user
programmable with either an external resistor or 0 to 10 V
DC signal or controlled by a µP with a logic signal. The
pulse width can be controlled from 0 to 100% duty cycle
to provide a wide AC symmetric dimming control function
when biased with a 3-wire application. For 2-wire Line-
Hot and Load-Hot applications, the pulse width can
typically be varied from 0 to a maximum gate pulse so
that the load voltage is >95% of the AC line voltage. The
FL5150/60 will automatically override the pulse width
control setting to allow maximum gate pulse width without
flicker.
.
User Programmable Leading or Trailing Edge
Dimming Control
.
.
.
.
.
Dynamic Over-Current and Temperature Protection
Powered from the AC Line
Symmetric AC Current Control
IGBT or MOSFET Gate Driver
Gate Pulse Width Programmable from 0 to 100%
tON
.
.
8 Bit ADC Input for Dimming Control with an
Adjustable Resistor or 0 to 10 V DC Voltage
The FL5150/60 takes advantage of the UL1472 2015 2nd
edition code revision that allows for up to 0.5 mA of
ground leakage current when a neutral wire is not
available in the switch box. This improves the flicker
performance for non-resistive loads. If the application
does not allow ground leakage current then the Line Hot
signal can be used as the ZC signal.
226 Dimming Pulse Widths with 25 s Resolution
and Built-in Ramp Up/Down Control for Smooth
Dimming
.
Automatically Maximum Gate Pulse Width Control
(Auto Max.)
.
.
.
Minimum External Components
The FL5150/60 has user programmable over-current
and temperature protection. With external sense
resistors, the maximum voltage drop across Q1 and Q2
can be set to limit the maximum current and transistor
power dissipation.
600 A Quiescent Current
Precision Temperature Compensated 2% Internal
Timer
.
.
.
Low Power Electronic Off State Mode
Space Savings SOIC 10-pin Package
50 Hz and 60 Hz Options
The FL5150/60 can be programmed for trailing edge
dimming when the DIM Mode pin is low at startup (pulse
width starts at the zero-crossing) or leading edge
dimming when the DIM Mode pin is connected to the
VDD pin at startup (pulse width ends at the zero
crossing). When an OFF state is selected (DIM Control
pin is 0 V) the FL5150/60 will go into a low power
electronic OFF state that reduces the power consumption
to less than 100 mW if an external NPN transistor is used.
Applications
.
.
Dimmer Switches
AC Controls
The FL5150/60 has an internal 8 bit ADC that allows for
typically 226 selectable dimming pulse widths with a
resolution of 25 µs per step. The FL5150/60 controls the
dim pulse width rate of change so that the minimum to
maximum dim ramp time is approximately 1 second.
This feature allows for a smooth dim transition.
Internally, the FL5150/60 contains a 17 V shunt regulator,
5 V linear regulator, 8Bit ADC, detection comparators,
control logic and an IGBT or MOSFET gate driver.
The 10-pin SOIC package provides for a low-cost,
compact design and layout.
© 2016 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FL5150/60 • 1.0
Ordering Information
Operating
Temperature Range
Part Number
Package
Packing Method
FL5150MX
FL5160MX
-40°C to +85°C
10 Lead SOIC, JEDEC MS-012, 150” Narrow Body
Tape and Reel
Typical Applications
Line Hot
D2
RZC Monitor
RSENSE1
OC Sense1
ZC Monitor
Q1
Q2
RGATE
DRV Gate
OC Sense2
Low power
VS
DIM Control
CGATE
RSENSE2
Radj
VDD
C1
C2
C3
Roffset
DIM Mode
GND
R1
D1
Load Hot
Figure 1. Typical 120 VAC 60 Hz Application with Air Gap Switch (TE Mode Selected)
Line Hot
D2
RZC Monitor
RSENSE1
Q1
Q2
OC Sense1
DRV Gate
ZC Monitor
DIM Control
VDD
RGATE
CGATE
RSENSE2
OC Sense2
Low power
VS
Radj
C3
C1
R2
R1
DIM Mode
Roffset
GND
Q3
C2
D1
Load Hot
Figure 2. Typical 120 VAC 60 Hz Low Power Application (LE Mode Selected)
Table 1.
Typical Values
R1: 10 k
R2: 150 k
RADJ: 0 to 250 k
C1: 100 nF
ROFFSET: 0 to 50 k
C2: 2.5 F
RZC Monitor: 1 M
RGATE: 1 k
C3: 100 nF
RSENSE1: 1 M
CGATE: 22 nF
RSENSE2: 1 M
Q1: FDPF33N25
Q2: FDPF33N25
Q3: KSP44
© 2016 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FL5150/60 • 1.0
2
Line Hot
D2
RZC Monitor
RSENSE1
Q1
Q2
OC Sense1
DRV Gate
OC Sense2
Low power
ZC Monitor
DIM Control
VDD
RGATE
CGATE
RSENSE2
Radj
C3
C1
Z1
R1
R2
DIM Mode
Roffset
VS
GND
Q3
C2
D1
Load Hot
Figure 3. 120 VAC 60 Hz Application with Current Mirror for R1 Lower Power Dissipation (LE Mode Selected)
Table 2.
Typical Values
R1: 2 k
R2: 150 k
RADJ: 0 to 250 k
C1: 100 nF
ROFFSET: 0 to 50 k
C2: 2.5 F
RZC Monitor: 1 M
RGATE: 1 k
C3: 100 nF
CGATE: 22 nF
RSENSE1: 1 M
RSENSE2: 1 M
Z1: 7.5 V
Q1: FDPF33N25
Q2: FDPF33N25
Q3: KSP44
Line Hot
RZC Monitor
RSENSE1
Q1
Q2
OC Sense1
DRV Gate
ZC Monitor
RGATE
DIM Control
VDD
CGATE
RSENSE2
Radj
C3
OC Sense2
Low power
VS
C1
R2
R1
DIM Mode
Roffset
GND
Q3
C2
D1
Load Hot
Neutral
Figure 4. Typical 120 VAC 60 Hz Low Power 3-Wire Application
Table 3. Typical Values
R1: 30 k
RADJ: 0 to 250 k
C1: 100 nF
R2: 150 k
C2: 4.7 F
Q3: KSP44
RZC Monitor: 1 M
RGATE: 1 k
RSENSE1: 1 M
CGATE: 22 nF
C3: 100 nF
RSENSE2: 1 M
Q1: FDPF33N25 Q2: FDPF33N25
© 2016 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FL5150/60 • 1.0
3
Line Hot
D2
RZC Monitor
RSENSE1
OC Sense1
DRV Gate
ZC Monitor
DIM Control
VDD
Q1
Q2
RGATE
CGATE
RSENSE2
OC Sense2
Low power
VS
Radj
C3
C1
R2
R1
DIM Mode
Roffset
GND
Q3
C2
D1
Load Hot
Figure 5. Typical 230 VAC 50 Hz 2-Wire Application (LE Mode Shown)
Table 4.
Typical Values
R1: 35 k
RADJ: 0 to 250 k
C1: 100 nF
R2: 350 k
C2: 3 F
RZC Monitor: 2 M
RGATE: 1 k
RSENSE1: 2 M
CGATE: 22nF
C3: 100 nF
RSENSE2: 2 M
Q1:NGTB10N60FG Q2: NGTB10N60FG
Q3: KSP44
Block Diagram
OC Sense1
OC Sense2
8 Bit
ADC
DIM
Control
VS
Digital &
Analog
Circuitry
DRV Gate
ZC Monitor
VDD
Low Power
VS
Linear
Regulator
DIM Mode
VDD
GND
Figure 6. Block Diagram
© 2016 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FL5150/60 • 1.0
4
Pin Configuration
10
9
1
2
3
4
5
ZC Monitor
PIN 1
OC Sense1
DRV Gate
OC Sense2
Low Power
DIM Control
VDD
8
DIM Mode
7
6
GND
VS
Figure 7. Pin Assignments
Pin Definitions
Pin#
Name
Description
1
ZC Monitor
ZC Monitor This signal is used for the zero crossing threshold.
DIM Control The voltage at this pin is the input for an 8 Bit ADC with a 2.5 V
reference. Table 5 shows the pulse width selection per DIM Control pin
voltage. This pin sources 10 A of current so that with an external adjustable
resistor, the dim pulse width can be selected. With a 4 to 1 resistor divided, a 0
to 10 V DC (Ground reference to pin 5) signal can be used to control the dim
pulse width.
2
3
4
DIM Control
VDD
VDD The internal 5 V supply for the digital logic
DIM Mode This pin selects either trailing edge or leading edge pulse width
dimming. When a Power-On-Reset (POR) occurs, this pin will be monitored for
its logic level. If it is connected to GND then trailing edge dimming will be
selected. If it is connected to VDD then leading edge dimming will be selected.
The DIM Mode state is latched at startup (60 ms) and will remain in its selected
DIM Mode until a POR signal occurs.
DIM Mode
5
6
GND
VS
GND Supply input for the FL5150/60 circuitry
VS Supply input for the FL5150/60 circuitry. An internal shunt regulator will
clamp this pin at 17 V.
Low Power When an off state is selected (DIM Control pin at 0 V) an internal
PMOS transistor will be enabled which shorts this pin to VS. If an external NPN
transistor is used per Figure 2, the FL5150/60 power consumption will be
reduced to typically 100 mW.
7
Low Power
OC Sense2 An external resistor connected to the collector/drain of Q2 sets the
maximum voltage difference across Q1 and Q2 for both positive and negative
half cycles.
8
9
OC Sense2
DRV Gate
DRV Gate Gate drive signal for external IGBT or MOSFET transistors.
OC Sense1 An external resistor connected to the collector/drain of Q1 sets the
maximum voltage difference across Q1 and Q2 for both positive and negative
half cycles.
10
OC Sense1
© 2016 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FL5150/60 • 1.0
5
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
IS
Parameter
Condition
Continuous Current, VS to GND
Continuous Voltage, VS to GND
Min. Max. Unit
Supply Current
25
mA
V
VS
Supply Voltage
-0.8
-0.8
20.0
DRVG
LP
DRV Gate and Low Power
Continuous Voltage to GND
20.0
5.0
V
OCSen1
OCSen2
Sense1, Sense2
Continuous Voltage to GND
Continuous Voltage to GND
-0.8
V
All other pins
-0.8
-65
6.0
+150
2
TSTG
ESD
Storage Temperature Range
°C
kV
Human Body Model, JESD22-A114
Charged device Model, JESD22-C101
Electrostatic Discharge
Capability
2
© 2016 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FL5150/60 • 1.0
6
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the data sheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings. Unless otherwise specified, refer to Figure 1 to
Figure 5. TA=25°C, ISHUNT=5 mA, and phase=60 Hz.
Symbol
Parameter
Conditions
Min.
Typ. Max. Unit
FL5150/60 Electrical Parameters (TA=25°C, Ishunt=5 mA, unless otherwise specified)
Power Supply Shunt Regulator
Voltage
V
V
VS
VS to GND
16
17
18
VS to GND, Rising Enable
FL5160/50
9.2
9.5
9.8
VS to GND, Falling
Hysteresis Terminate DRV
Gate Pulse
Under-Voltage Lockout
(Power-on-Reset)
0.5
2.2
UVLO
VS to GND, Falling
Hysteresis Disable
FL5150/60
IQ
Quiescent Current
VS to GND = 12 V
VPW Control = 0
600
5.0
800
5.5
µA
V
VDD
VDD Supply Voltage
4.5
OCSen1VH
OCSen2VH
Sense1&2 Clamp High
Sense1&2 Clamp Low
IH = 350 µA
IL = -350 µA
4.0
V
V
OCSen1VL
OCSen2VL
-0.7
ZCMonVH
ZCMonVL
ZC Monitor Clamp High
ZC Monitor Clamp Low
IH = 350 µA
IH = -350 µA
4.0
V
V
-0.7
194
FL5160
FL5150
200
206
OSC
Internal Timer
VDIM Control = 0
kHz
161.7
9.4
166.7 171.7
10.0 10.6
DIMCNISOURCE DIM Control Source Current
DIMCNVFORCE DIM Control 100% Duty Cycle
VDIM Control = 0
VDIM Control
VADC (8-Bit)
A
V
VDD – 0.5
VREFADC
DRVGVH
DRVGVL
ADC Reference Voltage
DRV Gate High
2.56
17.0
V
RADJ Open (VS=17 V)
16.0
V
DRV Gate Low
RADJ Connected to GND
100 mV
DRVGTLH
DRVGTHL
DRV Gate L to H
DRV Gate H to L
CLoad = 3 nF, 10 to 90%
CLoad = 3 nF, 10 to 90%
150
50
250
100
ns
ns
DIM Mode Logic Low
(Select Trailing Edge)
DMVL
VL
1.0
V
DIM Mode Logic High
(Select Leading Edge)
DMVH
VH
VDD - 1.0
7
V
DMISOURCE
DIM Mode Source Current
IDIM Mode
FL5160
10
60
13
A
DIM Mode Selection Time after
Under-Voltage lock Out Enable
Threshold
DMTSEL
LPMTEN
ms
FL5150
72
FL5160, VDIM Control = 0
FL5150, VDIM Control = 0
0 to 43°
100
120
3.5
LP Mode Enable Time
ms
Over-Current Threshold,
Trailing Edge
RSENSE1,2 =1 M
43° to 65°
Half Cycle
Phase Angle
65° to 86°
2.9
2.4
2.0
OCVTH
V
I Q1DRAIN – Q2DRAIN I
86° to 180°
© 2016 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FL5150/60 • 1.0
7
Table 5.
DIM Control Voltage Pulse Width Selection(1)
DIM Mode=0
Trailing Edge
DIM Mode=0
Trailing Edge
DIM Mode=1
DIM Mode=1
Leading Edge
Leading Edge
DIM_Control
Voltage (mV)
VOUTRMS(V)(2)
tON (Rising) s tON (Falling)s tOFF (Rising) s tOFF (Falling) s
0
0
0
0
0
>8333
>8333
>8333
>8333
>8333
>8333
>8333
>8333
>8333
>8333
7800
7750
7700
7650
7600
7550
7500
7450
7400
7350
7300
7250
7200
7150
7100
7050
7025
7000
6975
6950
6925
6900
6875
6850
6825
6800
>8333
>8333
>8333
>8333
>8333
7800
7800
7800
7800
7800
7800
7750
7700
7650
7600
7550
7500
7450
7400
7350
7300
7250
7200
7150
7100
7050
7025
7000
6975
6950
6925
6900
6875
6850
6825
6800
0
0
0
0
0
0
0
0
0
0
0
40
0
0
0
50
0
0
500
500
500
500
500
500
550
600
650
700
750
800
850
900
950
1000
1050
1100
1150
1200
1250
1275
1300
1325
1350
1375
1400
1425
1450
1475
1500
60
0
0
70
0
0
80
0
0
90
0
0
100
110
120
130
140
150
160
170
180
190
200
210
220
230
240
250
260
270
280
290
300
310
320
330
340
350
4.5
5.3
6.1
6.9
7.7
8.5
9.4
10.3
11.2
12.1
13
14
15
16
17
18
18.5
19
19.5
20
20.5
21
21.5
22
22.5
23
500
550
600
650
700
750
800
850
900
950
1000
1050
1100
1150
1200
1250
1275
1300
1325
1350
1375
1400
1425
1450
1475
1500
Continued on the following page…
© 2016 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FL5150/60 • 1.0
8
Table 5. DIM Control Voltage Pulse Width Selection(1) (Continued)
DIM Mode=0
Trailing Edge
DIM Mode=0
Trailing Edge
DIM Mode=1
DIM Mode=1
Leading Edge
Leading Edge
DIM_Control
Voltage (mV)
VOUTRMS(V)(2)
tON (Rising) s tON (Falling)s tOFF (Rising) s tOFF (Falling) s
360
370
380
390
400
410
420
430
440
450
460
470
480
490
500
510
520
530
540
550
560
570
580
590
600
610
620
630
640
650
660
670
680
690
700
710
23.6
24.2
24.8
25.4
26
1525
1550
1575
1600
1625
1650
1675
1700
1725
1750
1775
1800
1825
1850
1875
1900
1925
1950
1975
2000
2025
2050
2075
2100
2125
2150
2175
2200
2225
2250
2275
2300
2325
2350
2375
2400
1525
1550
1575
1600
1625
1650
1675
1700
1725
1750
1775
1800
1825
1850
1875
1900
1925
1950
1975
2000
2025
2050
2075
2100
2125
2150
2175
2200
2225
2250
2275
2300
2325
2350
2375
2400
6775
6750
6725
6700
6675
6650
6625
6600
6575
6550
6525
6500
6475
6450
6425
6400
6375
6350
6325
6300
6275
6250
6225
6200
6175
6150
6125
6100
6075
6050
6025
6000
5975
5950
5925
5900
6775
6750
6725
6700
6675
6650
6625
6600
6575
6550
6525
6500
6475
6450
6425
6400
6375
6350
6325
6300
6275
6250
6225
6200
6175
6150
6125
6100
6075
6050
6025
6000
5975
5950
5925
5900
26.6
27.2
27.8
28.4
29
29.6
30.2
30.8
31.4
32
32.6
33.2
33.8
34.4
35
35.6
36.2
36.8
37.4
38
38.6
39.2
39.8
40.4
41
41.6
42.2
42.8
43.4
44
44.6
Continued on the following page…
© 2016 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FL5150/60 • 1.0
9
Table 5. DIM Control Voltage Pulse Width Selection(1) (Continued)
DIM Mode=0
Trailing Edge
DIM Mode=0
Trailing Edge
DIM Mode=1
DIM Mode=1
Leading Edge
Leading Edge
DIM_Control
Voltage (mV)
VOUTRMS(V)(2)
tON (Rising) s tON (Falling)s tOFF (Rising) s tOFF (Falling) s
720
730
740
750
760
770
780
790
800
810
820
830
840
850
860
870
880
890
900
910
920
930
940
950
960
970
980
990
1000
1010
1020
1030
1040
1050
1060
1070
45.2
45.8
46.4
47
2425
2450
2475
2500
2525
2550
2575
2600
2625
2650
2675
2700
2725
2750
2775
2800
2825
2850
2875
2900
2925
2950
2975
3000
3025
3050
3075
3100
3125
3150
3175
3200
3225
3250
3275
3300
2425
2450
2475
2500
2525
2550
2575
2600
2625
2650
2675
2700
2725
2750
2775
2800
2825
2850
2875
2900
2925
2950
2975
3000
3025
3050
3075
3100
3125
3150
3175
3200
3225
3250
3275
3300
5875
5850
5825
5800
5775
5750
5725
5700
5675
5650
5625
5600
5575
5550
5525
5500
5475
5450
5425
5400
5375
5350
5325
5300
5275
5250
5225
5200
5175
5150
5125
5100
5075
5050
5025
5000
5875
5850
5825
5800
5775
5750
5725
5700
5675
5650
5625
5600
5575
5550
5525
5500
5475
5450
5425
5400
5375
5350
5325
5300
5275
5250
5225
5200
5175
5150
5125
5100
5075
5050
5025
5000
47.6
48.2
48.8
49.4
50
50.6
51.2
51.8
52.4
53
53.6
54.2
54.8
55.4
56
56.6
57.2
57.8
58.4
59
59.6
60.2
60.8
61.4
62
62.6
63.2
63.8
64.4
65
65.6
66.2
Continued on the following page…
© 2016 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FL5150/60 • 1.0
10
Table 5. DIM Control Voltage Pulse Width Selection(1) (Continued)
DIM Mode=0
Trailing Edge
DIM Mode=0
Trailing Edge
DIM Mode=1
DIM Mode=1
Leading Edge
Leading Edge
DIM_Control
Voltage (mV)
VOUTRMS(V)(2)
tON (Rising) s tON (Falling)s tOFF (Rising) s tOFF (Falling) s
1080
1090
1100
1110
1120
1130
1140
1150
1160
1170
1180
1190
1200
1210
1220
1230
1240
1250
1260
1270
1280
1290
1300
1310
1320
1330
1340
1350
1360
1370
1380
1390
1400
1410
1420
1430
66.8
67.4
68
3325
3350
3375
3400
3425
3450
3475
3500
3525
3550
3575
3600
3625
3650
3675
3700
3725
3750
3775
3800
3825
3850
3875
3900
3925
3950
3975
4000
4025
4050
4075
4100
4125
4150
4175
4200
3325
3350
3375
3400
3425
3450
3475
3500
3525
3550
3575
3600
3625
3650
3675
3700
3725
3750
3775
3800
3825
3850
3875
3900
3925
3950
3975
4000
4025
4050
4075
4100
4125
4150
4175
4200
4975
4950
4925
4900
4875
4850
4825
4800
4775
4750
4725
4700
4675
4650
4625
4600
4575
4550
4525
4500
4475
4450
4425
4400
4375
4350
4325
4300
4275
4250
4225
4200
4175
4150
4125
4100
4975
4950
4925
4900
4875
4850
4825
4800
4775
4750
4725
4700
4675
4650
4625
4600
4575
4550
4525
4500
4475
4450
4425
4400
4375
4350
4325
4300
4275
4250
4225
4200
4175
4150
4125
4100
68.6
69.2
69.8
70.4
71
71.6
72.2
72.8
73.4
74
74.6
75.2
75.8
76.4
77
77.5
78
78.5
79
79.5
80
80.5
81
81.5
82
82.5
83
83.5
84
84.5
85
85.5
86
Continued on the following page…
© 2016 Fairchild Semiconductor Corporation
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FL5150/60 • 1.0
11
Table 5. DIM Control Voltage Pulse Width Selection(1) (Continued)
DIM Mode=0
Trailing Edge
DIM Mode=0
Trailing Edge
DIM Mode=1
DIM Mode=1
Leading Edge
Leading Edge
DIM_Control
Voltage (mV)
VOUTRMS(V)(2)
tON (Rising) s tON (Falling)s tOFF (Rising) s tOFF (Falling) s
1440
1450
1460
1470
1480
1490
1500
1510
1520
1530
1540
1550
1560
1570
1580
1590
1600
1610
1620
1630
1640
1650
1660
1670
1680
1690
1700
1710
1720
1730
1740
1750
1760
1770
1780
1790
86.5
87
4225
4250
4275
4300
4325
4350
4375
4400
4425
4450
4475
4500
4525
4550
4575
4600
4625
4650
4675
4700
4725
4750
4775
4800
4825
4850
4875
4900
4925
4950
4975
5000
5025
5050
5075
5100
4225
4250
4275
4300
4325
4350
4375
4400
4425
4450
4475
4500
4525
4550
4575
4600
4625
4650
4675
4700
4725
4750
4775
4800
4825
4850
4875
4900
4925
4950
4975
5000
5025
5050
5075
5100
4075
4050
4025
4000
3975
3950
3925
3900
3875
3850
3825
3800
3775
3750
3725
3700
3675
3650
3625
3600
3575
3550
3525
3500
3475
3450
3425
3400
3375
3350
3325
3300
3275
3250
3225
3200
4075
4050
4025
4000
3975
3950
3925
3900
3875
3850
3825
3800
3775
3750
3725
3700
3675
3650
3625
3600
3575
3550
3525
3500
3475
3450
3425
3400
3375
3350
3325
3300
3275
3250
3225
3200
87.5
88
88.5
89
89.5
90
90.5
91
91.5
92
92.4
92.8
93.2
93.6
94
94.4
94.8
95.2
95.6
96
96.4
96.8
97.2
97.6
98
98.4
98.8
99.2
99.6
100
100.4
100.8
101.2
101.6
Continued on the following page…
© 2016 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FL5150/60 • 1.0
12
Table 5. DIM Control Voltage Pulse Width Selection(1) (Continued)
DIM Mode=0
Trailing Edge
DIM Mode=0
Trailing Edge
DIM Mode=1
DIM Mode=1
Leading Edge
Leading Edge
DIM_Control
Voltage (mV)
VOUTRMS(V)(2)
tON (Rising) s tON (Falling)s tOFF (Rising) s tOFF (Falling) s
1800
1810
1820
1830
1840
1850
1860
1870
1880
1890
1900
1910
1920
1930
1940
1950
1960
1970
1980
1990
2000
2010
2020
2030
2040
2050
2060
2070
2080
2090
2100
2110
2120
2130
2140
2150
102
5125
5150
5175
5200
5225
5250
5275
5300
5325
5350
5375
5400
5425
5450
5475
5500
5525
5550
5575
5600
5625
5650
5675
5700
5725
5750
5775
5800
5825
5850
5875
5900
5925
5950
5975
6000
5125
5150
5175
5200
5225
5250
5275
5300
5325
5350
5375
5400
5425
5450
5475
5500
5525
5550
5575
5600
5625
5650
5675
5700
5725
5750
5775
5800
5825
5850
5875
5900
5925
5950
5975
6000
3175
3150
3125
3100
3075
3050
3025
3000
2975
2950
2925
2900
2875
2850
2825
2800
2775
2750
2725
2700
2675
2650
2625
2600
2575
2550
2525
2500
2475
2450
2425
2400
2375
2350
2325
2300
3175
3150
3125
3100
3075
3050
3025
3000
2975
2950
2925
2900
2875
2850
2825
2800
2775
2750
2725
2700
2675
2650
2625
2600
2575
2550
2525
2500
2475
2450
2425
2400
2375
2350
2325
2300
102.4
102.8
103.2
103.6
104
104.4
104.8
105.2
105.6
106
106.4
106.8
107.2
107.6
108
108.3
108.6
108.9
109.2
109.5
109.8
110.1
110.4
110.7
111
111.3
111.6
111.9
112.2
112.5
112.8
113.1
113.4
113.7
113
Continued on the following page…
© 2016 Fairchild Semiconductor Corporation
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FL5150/60 • 1.0
13
Table 5. DIM Control Voltage Pulse Width Selection(1) (Continued)
DIM Mode=0
Trailing Edge
DIM Mode=0
Trailing Edge
DIM Mode=1
DIM Mode=1
Leading Edge
Leading Edge
DIM_Control
Voltage (mV)
VOUTRMS(V)(2)
tON (Rising) s tON (Falling)s tOFF (Rising) s tOFF (Falling) s
2160
2170
113.2
113.4
113.6
113.8
114
6025
6050
6075
6100
6125
6150
6175
6200
6225
6250
6275
6300
6325
6350
6375
6400
6425
6450
6475
6500
6525
8.333
6025
6050
6075
6100
6125
6150
6175
6200
6225
6250
6275
6300
6325
6350
6375
6400
6425
6450
6475
6500
6525
8.333
2275
2250
2225
2200
2175
2150
2125
2100
2075
2050
2025
2000
1975
1950
1925
1900
1875
1850
1825
1800
1775
0
2275
2250
2225
2200
2175
2150
2125
2100
2075
2050
2025
2000
1975
1950
1925
1900
1875
1850
1825
1800
1775
0
2180
2190
2200
2210
114.2
114.4
114.6
114.8
115
2220
2230
2240
2250
2260
115.2
115.4
115.6
115.8
116
2270
2280
2290
2300
2310
116.2
116.4
116.6
116.8
117
2320
2330
2340
2350
2360
>4000(3)
117.2
119
Notes:
1. The pulse width times shown in Table 5 are reference to the ZC threshold. For trailing edge DIM mode, the pulse
width time is the gate tON time. For leading edge DIM mode, the pulse width time is the gate tOFF time. The shown
pulse width time is typical for the FL5160. For the FL5150, the values will be scaled by +20%.
2. VOUTRMS typical value with a 60 W incandescent Load and 120 VRMS input.
3. If the DIM Control voltage is >4 V a 100% duty cycle is selected and the DRV Gate will be on 100%. However, a
100% duty cycle can only occur for a 3-wire application. If a 2-wire application is used and the DIM Control pin
voltage is >4 V a POR will occur
© 2016 Fairchild Semiconductor Corporation
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FL5150/60 • 1.0
14
Description
(Refer to Figure 1 to Figure 5)
occur. A 100% duty cycle can only be selected for a 3-
wire application (Neutral wire present).
Present AC controls or dimmer switches typically use
TRIAC circuits to generate the AC symmetric chopped
or phase cut current function. The TRIAC is basically
two back to back SCR transistors that allow for
symmetric AC operation in both the positive and
negative half cycles. The TRIAC dimmer circuit controls
the AC voltage pulse width to the load by turning off the
TRIAC when its holding current is below the minimum
threshold level. This occurs near the AC zero-crossing.
The TRIAC is turned on at a selected phase angle
during the half cycle. The TRIAC minimum holding
current can become an issue for newer low wattage
lighting products. In addition, newer lighting products
typically have capacitive load impedance so the current
and voltage phases are shifted. This can cause
problems for the detection of the AC zero-cross signal
and lead to unwanted flickering.
When the voltage on the DIM Control pin is changed,
the FL5160 will increase or decrease the dim steps by
one step every 4.17 ms (or two steps per half cycle).
This provides for a smooth dim pulse width transition.
From minimum to maximum pulse width, the FL5160 will
control the dim ramp rate to about 1 second.
The FL5160 has an internal difference amplifier which
measures the voltage difference across Q1 and Q2.
With the external OC Sense 1&2 resistors, this diff amp
will measure the voltage difference across the collectors
or drains of Q1 and Q2 when the DRV Gate signal is
high. If the maximum voltage threshold is exceeded for
longer than 50s the gate pulse will be disabled until the
next AC zero-crossing. This feature will limit the
maximum load current and also limit the power
dissipation for Q1 and Q2. If 16 consecutive over
current pulses occur (see Figure 12) the FL5160 will
disable the DRV gate and require a POR to reset the
disable state. The OC (over-current) trip threshold is
dynamic: it is a function of the VAC phase angle. The OC
threshold is higher at startup to allow for higher transient
currents during startup typical of incandescent bulbs.
The FL5150/60 controller addresses these issues by
controlling back to back MOSFET or IGBT transistors
which can be turned on or off at any time during the AC
half cycle. In addition, the FL5160 can use the earth
ground leakage current to better determine the zero-
cross threshold for non-resistive loads. Up to 500 µA of
ground leakage current is now allowed per the UL1472
2nd edition specification for 2-wire applications.
The desired steady state (phase angle> 90°) over-
current threshold can be programmed with the following
equation:
The FL5160 product is for North America 120 VAC
60 Hz applications and the FL5150 product is for
230 VAC 50 Hz applications. The internal timing
,
| Q1VD – Q2VD | = 2 x RSENSE
IOC x RDSON + VF = 2 x RSENSE
,
(1)
oscillator is selected for 50 Hz for the FL5150 and 60 Hz
for the FL5160. For the below description, the timing
information is in reference to the FL5160 60 Hz option.
For the FL5150 option, the tON pulse width is scaled by
+20%.
Where:
RDSON
=
MOSFET drain to source resistance
VF = MOSFET body diode
So,
The FL5160 has a selectable DIM Mode pin that allows
for either Trailing Edge or Leading Edge dimming
modulation. At startup when an under-voltage lockout
enable signal is detected (POR) the DIM Mode pin is
monitored for its logic state and after 60ms this state will
be latched and program the FL5160 for either trailing
edge dimming if this pin is low or leading edge dimming
if this pin is high. The DIM Mode pin enables a 10 µA
pull up current source after Power-on-Reset (POR).
Once the dimming mode is latched, this pin will be
disabled until a POR enable signal occurs. For trailing
edge dimming, the gate pulse is enabled at the ZC
signal and disabled after the tON pulse width per Table 5.
For leading edge dimming, the gate pulse is disabled at
the ZC signal and enabled after the tOFF pulse width per
Table 5.
IOC = (2 x RSENSE – VF) / RDSON
note: RSENSE in M
(2)
For the FDPF33N25 transistor,
RDSON= 94 m and VF = 0.7 V @25°C
RDSON= 170 m and VF = 0.6 V @100°C
(3)
(4)
So,
IOC = 13.8 A @25°C with RSENSE = 1 M
IOC = 8.2 A @100°C with RSENSE = 1 M
The FL5160 has a low power electronic off state feature.
If an external NPN transistor is connected per Figure 2,
the power consumption for the OFF state can be
significantly reduced. When an OFF state is selected
(DIM Control pin at 0 V) an internal 100 ms timer starts.
After the timer expires, the FAN5160 will enable an
internal PMOS transistor which shorts the Low power
and VS pins. This will turn off Q3 which de-biases R1.
The FL5160 is now biased by R2. This reduces the
electronic off state power consumption from 1 W to
100 mW for a 120 VAC input.
The gate pulse width is determined by the value of the
voltage at the DIM Control pin. The DIM Control pin
sources a 10 µA current. The voltage at this pin is
connected to an 8 Bit ADC with an internal full scale
reference of 2.56 V so the ADC step size is ~10 mV.
Table 5 shows the gate pulse width versus the DIM
Control pin voltage for a 60 Hz FL5160 application. If
the DIM Control pin is connected to VDD a force 100%
duty cycle will be selected. However, if the VS voltage
drops to the POR voltage threshold a logic reset will
© 2016 Fairchild Semiconductor Corporation
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FL5150/60 • 1.0
15
Figure 4 shows a typical 3 wire application. For a three
wire application, the neutral wire is available in addition
to the Line Hot and Load Hot connections. External
components D1, R1 and C2 provide for the DC bias of
the FL5160. During the AC half cycle when Line Neutral
is positive, the C2 capacitor will charge positive and be
clamped to 17 V by the FL5160’s shunt regulator
connected to VS. The gate driver circuit is supplied from
the VS pin. During the AC half cycle when Line Neutral
is negative, the FL5160 is biased by the capacitor C2.
Figure 8 shows the VS, DRV Gate and load current
waveforms for a LED load. The pulse width can be
controlled from 0 to 100% duty cycle with a 3-wire
application. The RZC Monitor resistor detects the AC
zero crossing. The typical value for this resistor is 1 M
for 120 VAC applications.
current, an output voltage typically >95% of the AC Line
voltage is possible. Figure 9 shows the VS, DRV Gate
and load current waveforms for a LED load. For the R1
and C2 values shown, a maximum gate pulse of 6.5 ms
is possible. However, some LED loads will not allow a
6.5 ms maximum gate pulse. The FL5160 has a DIM
Control override feature for LED loads that do not
support a maximum gate pulse of 6.5 ms (Auto Max.).
The FL5160 detects when the maximum gate pulse
width occurs and overrides the DIM Control voltage to
provide the maximum Load voltage without flicker. This
feature automatically adjusts per the Load impedance.
The power dissipation for R1 (Figure 1) is highest when
an off state is selected. To reduce the power dissipation
for R1, an emitter follower current mirror circuit can be
used as shown per Figure 3. Zener Z1 (7.5 V) will bias
R1 so ~3.5 mA flows through R1, independent of the
VAC voltage. The power dissipation for R1 will be
~25 mW. The power dissipation for Q3 will be
~425 mW.
Figure 1 shows a typical 120 VAC 2-wire application.
This 2-wire application does not have the neutral wire
available, which is typical for most switch box
applications in North America: only the Line Hot, Load
Hot and earth ground wires are available. The FL5160 is
powered from the AC line by D1, D2, R1 and C2.
The above description refers predominantly to the
FL5160 functionality. The FL5150 controller is the same
as the FL5160 except the internal timer is trimmed for a
50 Hz AC frequency.
Capacitor C2 charges when the Q1 & Q2 transistors are
off. When Q1 and Q2 are on, C2 provides the bias for
the FAN5160. Since C2 can only charge when both Q1
and Q2 are off, a 100% duty cycle is not possible. The
maximum duty cycle is determined by the load;
however, because the FL5160 has a low quiescent
Whereas the above applications refer to VAC input
voltages of 120 and 230, other AC voltages can be used
as long as the discrete components are correctly scaled.
© 2016 Fairchild Semiconductor Corporation
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FL5150/60 • 1.0
16
Typical Performance Characteristics
Unless otherwise specified, TA=25°C and according to Figure 1 to Figure 5.
Ch1: DRV Gate (Pin 9) 5 V/Div
Ch2: Load Current 100 mA/Div
Ch3: VS (Pin 6) 5 V/Div
VS discharges during the positive half cycle.
Figure 8. Typical 120 VAC 60 Hz 3-Wire Waveforms with an 8 W LED Load (TE Mode)
Ch1: DRV Gate (Pin 9) 5 V/Div
Ch2: VS (Pin 6) 5 V/Div
Ch4: Load Current 100 mA/Div
VS discharges when Q1 & Q2 are on.
Figure 9. Typical 120 VAC 60 Hz 2-Wire Waveforms with an 8 W LED Load (TE Mode)
© 2016 Fairchild Semiconductor Corporation
FL5150/60 • 1.0
www.fairchildsemi.com
17
Typical Performance Characteristics (Continued)
Unless otherwise specified, TA=25°C and according to Figure 1 to Figure 5.
Ch1: DRV Gate (Pin 9) 5 V/Div
Ch4: Load Current 200 mA/Div
Ch2: VS (Pin6) 5 V/Div
Figure 10. Typical 120 VAC 60 Hz 2-Wire Waveforms with an 11 W LED Load (LE Mode)
Ch1: DRV Gate (Pin 9) 5 V/Div
Ch4: Load Current 500 mA/Div
Ch2: VS (Pin 6) 5 V/Div
Figure 11. Typical 230 VAC 50 Hz 2-Wire Waveforms with a 60 W Incandescent Load (LE Mode)
© 2016 Fairchild Semiconductor Corporation
FL5150/60 • 1.0
www.fairchildsemi.com
18
Typical Performance Characteristics (Continued)
Unless otherwise specified, TA=25°C and according to Figure 1 to Figure 5.
Ch1: VLOAD HOT 50 V/Div
Ch4: ILOAD 10 A/Div
Shown is a steady state 600 W incandescent
Load
An additional 300 W incandescent Load is added
to the 600 W Load. The peak current is limited to
~30 A for 50 µs and after 16-consecutive over-
current pulses the DRV Gate signal is disabled
C1[VLOAD HOT]C4[ILOAD
]
Figure 12. Over-Current Protection
© 2016 Fairchild Semiconductor Corporation
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FL5150/60 • 1.0
19
Typical Temperature Characteristics
3.00%
2.00%
1.00%
0.00%
-1.00%
-2.00%
-3.00%
0.40%
0.20%
0.00%
-0.20%
-0.40%
-40 -20
0
20 40 60 80 100
-40 -20 0 20 40 60 80 100
Temperature °C
Temperature °C
Figure 13. Shunt Regulator Voltage vs. Temperature
Figure 14. Quiescent Current vs. Temperature
0.40%
0.20%
0.00%
-0.20%
0.50%
0.25%
0.00%
-0.25%
-0.50%
-0.40%
-40 -20
0
20 40 60 80 100
-40 -20 0 20 40 60 80 100
Temperature °C
Temperature °C
Figure 15. Under-Voltage Lockout Rising vs.
Temperature
Figure 16. VDD vs. Temperature
1.00%
0.50%
0.00%
-0.50%
-1.00%
0.20%
0.00%
-0.20%
-0.40%
-0.60%
-40 -20 0 20 40 60 80 100
-40 -20
0
20 40 60 80 100
Temperature °C
Temperature °C
Figure 17. Oscillator Frequency vs. Temperature
Figure 18. DIM Control Source Current vs.
Temperature
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FL5150/60 • 1.0
20
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相关型号：
FL5252050R
Small Signal Field-Effect Transistor, 2.1A I(D), 20V, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, MO-178AA, HALOGEN FREE AND ROHS COMPLIANT, MINI5-G3-B, MO-178, SC-74A, 5 PIN
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