FOD8163R2 [ONSEMI]
3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin;
| 型号： | FOD8163R2 |
| 厂家： | 
ONSEMI |
| 描述： | 3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in Stretched Body SOP 6-Pin 栅 |
| 文件： | 总15页 (文件大小：408K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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March 2016
FOD8163, FOD8163T
3.3 V / 5 V, 10 Mbit/sec, Logic Gate Optocoupler in
Stretched Body SOP 6-Pin
Features
Description
•
8 mm Creepage and Clearance Distance, and
0.4 mm Insulation Distance to Achieve Reliable and
High Voltage Insulation
The FOD8163 series is a 3.3 V / 5 V high-speed logic
gate optocoupler with open-collector output, which
supports isolated communications allowing digital
signals to communicate between systems without
conducting ground loops or hazardous voltages.
•
High Noise Immunity Characterized by Common
Mode Transient Immunity (CMTI)
– 20 kV/s Minimum CMTI
The FOD8163 series utilizes stretched body package to
achieve 8 mm creepage and clearance distances
(FOD8163T), and optimized IC design to achieve reliably
high-insulation voltage and high-noise immunity.
•
Specifications Guaranteed Over 3 V to 5.5 V Supply
Voltage and -40°C to 100°C Extended Industrial
Temperature Range
•
•
High-Speed, 10 Mbit/s Data Rate (NRZ)
Safety and Regulatory Approvals
The FOD8163 series consists of an aluminium gallium
arsenide (AlGaAs) light emitting diode and an integrated
high-speed photodetector. The output of the detector IC
is an open collector schottky-clamped transistor. The
electrical and switching characteristics are guaranteed
over the extended industrial temperature range of -40°C to
100°C and a VCC range of 3 V to 5.5 V.
– UL1577, 5,000 VACRMS for 1 Minute
– DIN-EN/IEC60747-5-5, 1,140 V Peak Working
Immunity Insulation Voltage
Applications
•
•
Isolating Intelligent Power Module
Isolating Industrial Communication Interface
Functional Schematic
Related Resources
•
•
•
•
www.fairchildsemi.com/products/optoelectronics/
www.fairchildsemi.com/pf/FO/FOD8160.html
www.fairchildsemi.com/pf/FO/FODM8061.html
www.fairchildsemi.com/pf/FO/FODM611.html
V
V
1
2
3
6
5
4
ANODE
NC
CC
O
CATHODE
GND
Figure 1. Functional Schematic
Figure 2. Package Outline
©2015 Fairchild Semiconductor Corporation
FOD8163, FOD8163T Rev. 1.1
www.fairchildsemi.com
Truth Table
V
LED
O
Off
On
HIGH
LOW
Pin Definitions
Pin #
Name
Description
1
2
3
4
5
6
ANODE
NC
Anode
Not Connected
Cathode
CATHODE
GND
Output Ground
Output Voltage
Output Supply Voltage
VO
VCC
Pin Configuration
1
6
V
ANODE
CC
O
5
2
3
V
4
NC
CATHODE
GND
Figure 3. Pin Configuration
©2015 Fairchild Semiconductor Corporation
FOD8163, FOD8163T Rev. 1.1
www.fairchildsemi.com
2
Safety and Insulation Ratings
As per DIN EN/IEC60747-5-5, this optocoupler is suitable for “safe electrical insulation” only within the safety limit data.
Compliance with the safety ratings shall be ensured by means of protective circuits.
Characteristics
Parameter
FOD8163
I–IV
FOD8163T
< 150 VRMS
< 300 VRMS
< 450 VRMS
< 600 VRMS
I–IV
I–IV
I–IV
Installation Classifications per DIN VDE 0110/1.89 Table 1,
For Rated Mains Voltage
I–III
I–IV
I–III
I–III
Climatic Classification
40/100/21
2
40/100/21
2
Pollution Degree (DIN VDE 0110/1.89)
Comparative Tracking Index
175
175
Value
Symbol
Parameter
Unit
Vpeak
Vpeak
FOD8163
FOD8163T
Input-to-Output Test Voltage, Method B, VIORM x 1.875 = VPR
100% Production Test with tm = 1 s, Partial Discharge < 5 pC
,
1,671
2,137
VPR
Input-to-Output Test Voltage, Method A, VIORM x 1.6 = VPR
,
1,426
1,824
Type and Sample Test with tm = 10 s, Partial Discharge < 5 pC
Maximum Working Insulation Voltage
Highest Allowable Over-Voltage
VIORM
VIOTM
891
6,000
8.0
7.0
≥ 0.4
1,140
8,000
8.0
8.0
≥ 0.4
Vpeak
Vpeak
mm
External Creepage
External Clearance
mm
DTI
Distance Through Insulation (Insulation Thickness)
mm
Safety Limit Values – Maximum Values Allowed in the
Event of a Failure,
TS
IS,INPUT
PS,OUTPUT
RIO
Case Temperature
Input Current
150
200
600
109
150
200
600
109
°C
mA
mW
Output Power
Insulation Resistance at TS, VIO = 500 V
©2015 Fairchild Semiconductor Corporation
FOD8163, FOD8163T Rev. 1.1
www.fairchildsemi.com
3
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only. TA = 25°C unless otherwise specified.
Symbol
TSTG
TOPR
TJ
Parameter
Value
Unit
°C
Storage Temperature
-40 to +125
-40 to +100
-40 to +125
Operating Temperature
Junction Temperature
°C
°C
Lead Solder Temperature
(Refer to Reflow Temperature Profile)
TSOL
260 for 10 sec
°C
Input Characteristics
IF
Average Forward Input Current
25
5.0
45
mA
V
VR
PDI
Reverse Input Voltage
Input Power Dissipation(1)
mW
Output Characteristics
VCC
VO
Supply Voltage
0 to 7.0
V
V
Output Voltage
-0.5 to VCC + 0.5
IO
Average Output Current
Output Power Dissipation(1)
50
85
mA
mW
PDO
Note:
1. No derating required up to 100°C.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
TA
Parameter
Ambient Operating Temperature
Supply Voltages(2)
Min.
-40
3.0
0
Max.
+100
5.5
Unit
ºC
VCC
VFL
IFL
V
Logic Low Input Voltage
Logic Low Input Current
Logic High Input Current
Fan Out (at RL = 1 k)
0.8
V
A
250
15
IFH
6.0
mA
N
5
TTL loads
RL
Output Pull-up Resistor
330
4000
Note:
2. 0.1 F bypass capacitor must be connected between pins 4 and 6.
©2015 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FOD8163, FOD8163T Rev. 1.1
4
Isolation Characteristics
Apply over all recommended conditions, typical value is measured at TA = 25°C.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
Input-Output Isolation TA = 25°C, R.H. < 50%, t = 1.0 min,
Voltage
VISO
5,000
VACRMS
II-O 20 A(3)(4)
RISO
CISO
Isolation Resistance
Isolation Capacitance VI-O = 0 V, frequency = 1.0 MHz(3)
VI-O = 500 V(3)
1011
1.0
pF
Notes:
3. Device is considered a two-terminal device: pins 1, 2 and 3 are shorted together and pins 4, 5, and 6 are shorted
together.
4. 5,000 VACRMS for 1-minute duration is equivalent to 6,000 VACRMS for 1-second duration.
Electrical Characteristics
Apply over all recommended conditions; TA = -40°C to +100°C, 3.0 V VCC 5.5 V; unless otherwise specified.
Typical value is measured at TA = 25°C and VCC = 3.3 V or VCC = 5 V.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
Figure
Input Characteristics
VF
Forward Voltage
1.05
1.45
-1.8
1.80
V
4
IF = 10 mA
Temperature Coefficient
of Forward Voltage
(VF / TA)
mV/°C
Input Reverse
Breakdown Voltage
BVR
IFHL
IR = 10 A
5.0
V
VO = 0.6 V,
IOL(sink) = 13 mA
Threshold Input Current
2.0
0.4
6.0
0.6
mA
5
6
Output Characteristics
Logic Low Output
IF = rated IFHL
IOL(sink) = 13 mA
,
VOL
V
Voltage
IF = 250 A, VO = 3.3 V
IF = 250 A, VO = 5.0 V
IF = 10 mA, VCC = 3.3 V
IF = 10 mA, VCC = 5.0 V
IF = 0 mA, VCC = 3.3 V
IF = 0 mA, VCC = 5.0 V
8.0
3.0
5.3
7.1
3.5
5.3
50.0
40.0
8.5
A
A
7
Logic High Output
Current
IOH
7
mA
mA
mA
mA
8, 10
8, 10
9, 10
9, 10
Logic Low Output
Supply Current
ICCL
10.0
7.0
Logic High Output
Supply Current
ICCH
9.0
©2015 Fairchild Semiconductor Corporation
FOD8163, FOD8163T Rev. 1.1
www.fairchildsemi.com
5
Switching Characteristics
Apply over all recommended conditions; TA = -40°C to +100°C, 3.3 V VCC 5 V, IF = 6.0 mA; unless otherwise spec-
ified. Typical value is measured at TA = 25°C and VCC = 3.3 V.
Symbol
Parameter
Conditions
RL = 350
Min.
Typ.
Max.
Unit
Figure
Data Rate
10
Mbit/sec
Propagation Delay to
Logic Low Output
11, 13,
16
tPHL
tPLH
RL = 350 , CL = 15 pF
RL = 350 , CL = 15 pF
RL = 350 , CL = 15 pF
42
53
11
80
90
ns
ns
Propagation Delay to
Logic High Output
11, 13,
16
Pulse Width Distortion,
12, 14,
16
PWD
tPSK
tR
35
40
ns
ns
ns
| tPHL – tPLH
|
Propagation Delay Skew RL = 350 , CL = 15 pF (5)
Output Rise Time
RL = 350 , CL = 15 pF
(10% to 90%)
20
10
15, 16
15, 16
Output Fall Time
RL = 350 , CL = 15 pF
(90% to 10%)
tF
ns
Common-Mode
IF = 0 mA, VO > 2 V,
Transient Immunity at
VCM = 1500 V(6)
Output High
| CMH |
20
20
40
40
kV/s
17
17
Common-Mode
Transient Immunity at
IF = 6.0 mA, VO < 0.8 V,
| CML |
kV/s
V
CM = 1500 V(6)
Output Low
Notes:
5. tPSK is equal to the magnitude of the worst-case difference in tPHL and/or tPLH between any two units from the same
manufacturing date code that are operated at same case temperature (±5°C), at same operating conditions, with
equal loads (RL = 350 , CL = 15 pF), and with an input rise time less than 5 ns.
6. Common-mode transient immunity at output HIGH is the maximum tolerable positive dVcm/dt on the leading edge
of the common-mode impulse signal, VCM, to assure that the output remains HIGH. Common-mode transient
immunity at output LOW is the maximum tolerable negative dVcm/dt on the trailing edge of the common pulse signal,
VCM, to assure that the output remains LOW.
©2015 Fairchild Semiconductor Corporation
FOD8163, FOD8163T Rev. 1.1
www.fairchildsemi.com
6
Typical Performance Characteristics
2.5
2.0
1.5
1.0
0.5
I
OL = 13 mA
10
1
VCC = 3.3 V
VCC = 5.0 V
0.1
TA = 100oC
-40oC
25oC
0.01
1E-3
0.6
0.8
1.0
1.2
1.4
1.6
1.8
100
100
-40
-20
0
20
40
60
80
100
100
100
TA - AMBIENT TEMPERATURE (oC)
VF - FORWARD VOLTAGE (V)
Figure 4. Input LED Current vs.
Forward Voltage
Figure 5. Threshold Input Current vs.
Ambient Temperature
0.50
0.45
0.40
0.35
0.30
0.25
0.20
30
25
20
15
10
5
I
OL = 13 mA
IF = 250 A
IF = 6 mA
VO = 3.3 V / 5.0 V
V
CC = 3.3 V
VCC = 3.3 V
VCC = 5.0 V
VCC = 5.0 V
0
-40
-40
-20
0
20
40
60
80
-20
0
20
40
60
80
TA - AMBIENT TEMPERATURE (oC)
TA - AMBIENT TEMPERATURE (oC)
Figure 6. Logic Low Output Voltage vs.
Ambient Temperature
Figure 7. Logic High Output Current vs.
Ambient Temperature
10
8
10
8
I
F = 10 mA
IF = 0 A
VCC = 5.0 V
6
6
VCC = 5.0 V
VCC = 3.3 V
4
4
VCC = 3.3 V
2
2
0
-40
0
-40
-20
0
20
40
60
80
-20
0
20
40
60
80
TA - AMBIENT TEMPERATURE (oC)
TA - AMBIENT TEMPERATURE (oC)
Figure 8. Logic Low Output Supply Current vs.
Ambient Temperature
Figure 9. Logic High Output Supply Current vs.
Ambient Temperature
©2015 Fairchild Semiconductor Corporation
FOD8163, FOD8163T Rev. 1.1
www.fairchildsemi.com
7
Typical Performance Characteristics (Continued)
10
80
70
60
50
40
30
20
IF = 0 A (for ICCH
)
f = 5 MHz, 50% Duty Cycle
IF = 10 mA (for ICCL
TA = 25oC
)
IF = 6 mA, RL = 350
8
6
4
2
0
ICCL
t
PLH @ VCC = 3.3V
tPLH @ VCC = 5.0V
ICCH
tPHL @ VCC = 3.3V
tPHL @ VCC = 5.0V
3.0
3.5
4.0
4.5
5.0
5.5
-40
-20
0
20
40
60
80
100
TA - AMBIENT TEMPERATURE (oC)
VCC - OUTPUT SUPPLY VOLTAGE (V)
Figure 10. Output Supply Current vs.
Output Supply Voltage
Figure 11. Propagation Delay vs.
Ambient Temperature
30
25
20
15
10
5
80
70
60
50
40
30
20
f = 5 MHz, 50% Duty Cycle
f = 5 MHz, 50% Duty Cycle
IF = 6 mA, RL = 350
IF = 6 mA, RL = 350
t
PLH @ VCC = 3.3V
V
CC = 3.3V
tPLH @ VCC = 5.0V
tPHL @ VCC = 3.3V
tPHL @ VCC = 5.0V
VCC = 5.0V
0
-40
-20
0
20
40
60
80
100
5
6
7
8
9
10
TA - AMBIENT TEMPERATURE (oC)
IF - INPUT LED CURRENT (mA)
Figure 12. Pulse Width Distortion vs.
Ambient Temperature
Figure 13. Propagation Delay vs.
Input LED Current
30
25
20
15
10
5
40
30
20
10
0
f = 5 MHz, 50% Duty Cycle
f = 5 MHz, 50% Duty Cycle
TA = 25oC, RL = 350
IF = 6 mA, RL = 350
tR @ VCC = 5.0V
V
CC = 3.3V
t
R @ VCC = 3.3V
VCC = 5.0V
tF @ VCC = 3.3V
tF @ VCC = 5.0V
0
5
6
7
8
9
10
-40
-20
0
20
40
60
80
100
TA - AMBIENT TEMPERATURE (oC)
IF - INPUT LED CURRENT (mA)
Figure 14. Pulse Width Distortion vs.
Input LED Current
Figure 15. Rise Time and Fall Time vs.
Ambient Temperature
©2015 Fairchild Semiconductor Corporation
FOD8163, FOD8163T Rev. 1.1
www.fairchildsemi.com
8
Test Circuit
I
F
Pulse Gen.
5 MHz
t = tr = 5 ns
f
DC = 50%
0.1 μF
Bypass
350 Ω
2
V
Monitoring
O
Node
C
L
Input
Monitoring
Mode
R
M
(I = 6 mA)
F
Input
50%
t
f
t
r
90%
1.5 V
10%
Output
V
OL
t
t
PLH
PHL
Figure 16. Test Circuit for Propagation Delay, Rise Time, and Fall Time
I
F
V
V
CC
0.1 μF
Bypass
350 Ω
2
Monitoring
O
Node
SW
C
L
R
M
V
CM
Pulse Gen
1 kV
0 V
V
CM
90%
10%
t
r
t
f
V
OH
V
V
(I = 0 mA)
F
O
2 V
0.8 V
(I = 6 mA)
F
O
V
OL
Figure 17. Test Circuit for Instantaneous Common-Mode Rejection Voltage
©2015 Fairchild Semiconductor Corporation
FOD8163, FOD8163T Rev. 1.1
www.fairchildsemi.com
9
Reflow Profile
Maximum Ramp-up Rate = 3°C/s
Maximum Ramp-down Rate = 6°C/s
T
P
260
240
220
200
180
160
140
120
100
80
t
P
T
L
T
smax
t
L
Preheat Area
T
smin
t
s
60
40
20
0
120
Time 25°C to Peak
240
360
Time (seconds)
Profile Freature
Temperature Minimum (Tsmin
Temperature Maximum (Tsmax
Pb-Free Assembly Profile
150°C
)
)
200°C
Time (tS) from (Tsmin to Tsmax
)
60 s to 120 s
Ramp-up Rate (tL to tP)
3°C/second maximum
217°C
Liquidous Temperature (TL)
Time (tL) Maintained Above (TL)
Peak Body Package Temperature
Time (tP) within 5°C of 260°C
Ramp-Down Rate (TP to TL)
60 s to 150 s
260°C +0°C / –5°C
30 s
6°C/s maximum
8 minutes maximum
Time 25°C to Peak Temperature
Figure 18. Reflow Profile
©2015 Fairchild Semiconductor Corporation
FOD8163, FOD8163T Rev. 1.1
www.fairchildsemi.com
10
Ordering Information
Part Number
Package
Stretched Body SOP 6-Pin
Stretched Body SOP 6-Pin
Packing Method
Tube (100 units per tube)
FOD8163
FOD8163R2
FOD8163V
FOD8163R2V
FOD8163T
FOD8163TR2
Tape and Reel (1,000 units per reel)
Stretched Body SOP 6-Pin, DIN EN/IEC60747-5-5 Option Tube (100 units per tube)
Stretched Body SOP 6-Pin, DIN EN/IEC60747-5-5 Option Tape and Reel (1,000 units per reel)
Stretched Body SOP 6-Pin, Wide Lead
Stretched Body SOP 6-Pin, Wide Lead
Tube (100 units per tube)
Tape and Reel (1,000 units per reel)
Stretched Body SOP 6-Pin, Wide Lead,
DIN EN/IEC60747-5-5 Option
FOD8163TV
Tube (100 units per tube)
Stretched Body SOP 6-Pin, Wide Lead,
DIN EN/IEC60747-5-5 Option
FOD8163TR2V
Tape and Reel (1,000 units per reel)
All packages are lead free per JEDEC: J-STD-020B standard.
Marking Information
1
2
8163
6
P
V XX YY
5
3
4
Definitions
1
2
Fairchild Logo
Device Number, e.g. 8163
DIN EN/IEC60747-5-5 Option (only appears on component
ordered with this option)
3
4
5
6
One Digit Year Code, e.g. ‘5’
Two Digit Work Week Ranging from ‘01’ to ‘53’
Assembly Package Code
©2015 Fairchild Semiconductor Corporation
FOD8163, FOD8163T Rev. 1.1
www.fairchildsemi.com
11
1.27
(0.78)
1.27
1
3
3
2
1
A
PIN 1
INDICATOR
7.45
6.81±0.30
10.45
0.80
1.50
4
5
6
4
6
B
4.50±0.30
RECOMMENDED LAND PATTERN
10°
3.18±0.30
0.20±0.10
(1.59)
C
0.40±0.10
6X
6X
0.20
C A B
0.10 C
NOTES: UNLESS OTHERWISE SPECIFIED
A) NO STANDARD APPLIES TO THIS PACKAGE
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE BURRS
OR MOLD FLASH, AND TIE BAR EXTRUSION.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M-2009.
E) DRAWING FILE NAME: MKT-M06BREV1
(2.54)
1.27
1.27
(0.78)
3
1
3
2
1
A
PIN 1
INDICATOR
9.25
6.81±0.30
12.25
0.80
1.50
4
5
6
4
6
4.50±0.30
B
RECOMMENDED LAND PATTERN
10°
R0.15
R0.15
0.204~0.304
3.18±0.30
0.20±0.10
(1.59)
0.75±0.30
C
0°~8°
0.40±0.10
11.50±0.30
6X
6X
0.20
C A B
0.10 C
NOTES: UNLESS OTHERWISE SPECIFIED
A) NO STANDARD APPLIES TO THIS PACKAGE
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE BURRS
OR MOLD FLASH, AND TIE BAR EXTRUSION.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M-2009.
E) DRAWING FILE NAME: MKT-M06CREV1
ON Semiconductor and
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