FPF3380UCX [ONSEMI]
低 Rdson 过电压保护负载开关;型号: | FPF3380UCX |
厂家: | ONSEMI |
描述: | 低 Rdson 过电压保护负载开关 开关 |
文件: | 总7页 (文件大小:256K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
28 V / 5 A Rated OVP with
Low On-resistance and
Integrated TVS
FPF3380UCX
Description
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FPF3380UCX is an OVP with integrated ultra−low on−resistance
single channel switch. The device contains an N−MOSFET that can
operate over an input voltage range of 2.8 V to 23 V and can support a
maximum continuous current of 5 A.
When the input voltage exceeds the over−voltage threshold, the
internal FET is turned off immediately to prevent damage to the
protected downstream components.
The device has integrated 110 V surge protection TVS base on
IEC61000−4−5 standards.
WLCSP−12
CASE 567WP
FPF3380 is available in a small 12−bumps WLCSP package and
operate over the free−air temperature range of −40°C to +85°C.
MARKING DIAGRAM
Features
• Over−voltage Protection Up to +28 V
• Integrated TVS: 110 V for IEC61000−4−5
• Internal Low RDS(on) NMOS Transistors: Typical 15 mW
• Programmable Over−voltage Lockout (OVLO)
♦ Externally Adjustable via OVLO Pin
• Active−low Enable Pin (OVLO) for Device
• Super−fast OVLO Response Time: Typical 40 ns
• Over Temperature Protection (Thermal Shutdown)
• Robust ESD Performance
3LZZ
YWA
3L
ZZ
Y
W
A
= Specific Device Code
= Assembly Lot Code
= Year
= Work Week
= Assembly Location
♦
♦
4 kV Human Body Model (HBM)
2 kV Charged Device Model (CDM)
PIN ASSIGNMENT
• System Level ESD (IEC61000−4−2)
♦
♦
10 kV Contact Discharge
15 kV Air Gap Discharge
ENB
OUT
OUT
IN
OUT
IN
GND
GND
GND
Typical Applications
• Mobile Phones
• PDAs
ACOKB
OVLO
• GPS
IN
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
September, 2020 − Rev. 2
FPF3380UCX/D
FPF3380UCX
VBUS
HV Battery
Charger
Travel
Adapter
OUT
IN
1uF
1uF
FPF3380
R1
R2
Legacy USB /
USB Type C connector
OVLO
GND
Figure 1. Application Schematic – Adjustable Option
IN
OUT
Discharge
Driver
Gate Drive
1.2V
Control
ACOKB
OVLO
0.3V
GND
ENB
Figure 2. Simplified Block Diagram
PIN FUNCTION DESCRIPTION
Pin #
B3, C2, C3
A2, A3, B2
A1
Name
IN
Description
Power Input: Switch Input and Device Supply
Power Output: Switch Output to Load
OUT
ENB
Enable Input: Active Low. 0: Switch enabled. 1: Switch disabled. 1MW Pull−down resistor integrated.
Power Good Acknowledge Output: Open−drain output to indicate Power Good condition
OVLO Input: Over Voltage Lockout Adjustment Input
B1
ACOKB
OVLO
GND
C1
A4, B4, C4
Ground
ORDERING INFORMATION
Device
†
Marking
Package
Shipping
FPF3380UCX
3L
WLCSP−12L
4000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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2
FPF3380UCX
Table 1. MAXIMUM RATINGS
Rating
Symbol
Value
Unit
V
Input Voltage Range (Note 1)
V
in
−0.3 to +28
Output Voltage Range
V
out
−0.3 to (V + 0.3)
V
in
Adjustable Input Range
V
OVLO
−0.3 to +24
V
Internal FET continuous current
I
0 to 6.25
A
OUT
Internal FET peak current (pulse width no longer than 100 ms)
Maximum Junction Temperature
I
7
A
PEAK
J(max)
T
150
°C
°C
kV
Storage Temperature Range
T
−65 to 150
STG
ESD Capability, Human Body Model (Note 2)
ESD Capability, Charged Device Model (Note 2)
IEC 61000−4−2 SYSTEM Level ESD
ESD
4
2
HBM
CDM
ESD
Contact
Air Gap
10
15
260
Lead Temperature Soldering
T
°C
SLD
Reflow (SMD Styles Only), Pb−Free Versions (Note 3)
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe
Operating parameters.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Charged Device Model tested per AEC−Q100−011 (EIA/JESD22−C101)
Latch−up Current Maximum Rating: ≤150 mA per JEDEC standard: JESD78
3. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
Table 2. THERMAL CHARACTERISTICS
Rating
Symbol
Value
Unit
Thermal Characteristics, WLCSP−12 (Note 4)
Thermal Resistance, Junction−to−Air (Note 5)
R
84.1
°C/W
θJA
4. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe
Operating parameters.
5. Values based on 2S2P JEDEC std. PCB.
Table 3. RECOMMENDED OPERATING RANGES
Rating
Symbol
Min
2.8
0
Max
23
Unit
V
Supply Voltage on VIN
I/O pins
V
in
V
OVLO
5.5
5
V
Output Current (Note 6)
IN Capacitor
I
0
A
out
C
0.1
0.1
−40
mF
mF
°C
in
OUT Capacitor
C
out
Ambient Temperature
T
A
85
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
6. Life time, under maximum current, > 5 years base on Temperature < 85°C and no longer than 12 hours per day.
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3
FPF3380UCX
Table 4. ELECTRICAL CHARACTERISTICS V = 2.8 to 23 V, C = 0.1 mF, C
= 0.1 mF, T = −40 to 85°C; For typical values
A
IN
IN
OUT
V
= 5.0 V, I v 3 A, C = 0.1 mF, T = 25°C, for min/max values T = −40°C to 85°C; unless otherwise noted.
IN
IN
IN
A
A
Parameter
Test Conditions
Symbol
Min
Typ
Max
Unit
LEAKAGE AND QUIESCENT CURRENTS
Input Quiescent Current on IN
V
V
V
V
= 5V, V
= 0.6V, V
= 0V
I
Q
90
mA
IN
OVLO
ENB
= 23V, V
= 0.6V, V
= 0V
ENB
150
150
IN
OVLO
OVLO
Supply Current during Over Voltage
OVLO Input Leakage Current
= 23V, V
= 1.8V, V
= V
= 0V
I
IN_Q
mA
IN
OUT
ENB
= V
I
OVLO
−100
100
2.7
nA
OVLO
OVLO_TH
OVER VOLTAGE AND UNDER VOLTAGE LOCKOUT, I/O
Input Clamping Voltage
I
= 10mA
V
32
V
IN
IN
IN_CLAMP
I
= 30A (Note 7)
37
Under−Voltage Rising Trip Level for VIN
Under−Voltage Falling Trip Level for VIN
Default Over−Voltage Trip Level
OVLO set threshold
V
V
V
V
rising, T = −40 to 85°C
V
IN_UV_R
2.4
2.55
2.45
6.15
1.20
V
V
V
V
IN
A
falling, T = −40 to 85°C
V
IN
A
IN_UV_F
IN_OVLO
OVLO_TH
rising, V
= GND
V
5.95
6.35
IN
OVLO
= 1.1V to 1.3V, the voltage of OVLO pin
V
1.165
1.235
OVLO
to trigger Over Voltage condition
OVLO threshold hysteresis
V
3
%
V
HYS_OVLO
OVLO Input Threshold Voltage
Voltage Increasing, Logic High High
Voltage Decreasing, Logic Low Low
V
V
0.3
0.9
IH_OVLO
IL_OVLO
0.15
ENB Input Threshold Voltage
V
Voltage Increasing, Logic High High
Voltage Decreasing, Logic Low Low
V
IH_ENB
V
0.3
0.4
0.5
IL_ENB
Output Low Voltage of ACOKB
ACOKB Leakage Current
RESISTANCE
I
= 1mA, Logic Low Asserted
V
V
ACOKB
OL
ACOKB
V
= 3.3V, ACOKB De−asserted, V
= 0V
I
−0.5
uA
I/O
ENB
On−resistance of Power FET
V
V
= 5V, I
= 200mA, T = 25°C
r
ON
15
20
25
mW
IN
OUT
A
= 5V to 23V, I
= 0.1A to 5A (Note 10)
IN
OUT
Pull−down resistor on ENB
Discharge on IN
TIMING
1
MW
V
IN
= 5V, V
= 1.8V
800
W
ENB
De−bounce Time of Power FET turned on Time from 2.5V < V < V
to
t
SW_DEB
15
30
2
ms
ms
ms
ns
IN
IN_OVLO
V
= 0.1 × V
OUT
IN
Soft−Start Time of Power FET turned on
Switch Turn−On rising Time (Note 10)
Switch Turn−Off Time (Note 10)
Time from 2.5V < V < V
to V
PU
=
t
SS
IN
IN_OVLO
AOCKB
0.2 × V with V = 1.8V and R = 10kW
I/O
I/O
V
= 5V, R = 100 W, C = 22 mF, V
from
t
R
IN
L
L
OUT
0.1 × V to 0.9 × V
IN
IN
R = 10 W, C = 0 mF, time from V > V
to
t
OVP
40
L
OUT
L
IN
OVLO
V
= 0.9 × V (Note 11)
IN
time from V
> V
to V
= 0.9 × V
t
OFF
2
ms
ENB
IH_ENB
OUT
IN
THERMAL SHUTDOWN
Thermal Shutdown Temperature (Note 10)
Thermal Shutdown Hysteresis (Note 10)
T
−
−
130
20
−
−
°C
°C
SD
T
SH
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
7. The spec is only for surge event. Guaranteed by design and characterization.
8. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TJ = TA = 25 C. Low
duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
9. Refer to the APPLICATION INFORMATION section.
10.Values based on design and/or characterization.
11. Depends on the capacitance on OVLO pin.
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4
FPF3380UCX
FUNCTION DESCRIPTION
General
Over Voltage Lockout
FPF3380 is an OVP power switch to protect next stage
The power FET will be turned off whenever IN voltage
higher than V . The value of V can be set by
system which is optimized to lower voltage working
condition. The device includes ultra−low on−resistance
power FET (15 mW) and internal TVS for surge event
protection base on IEC61000−4−5. The super−fast OVP
response time is only 40 ns for default OVP condition.
IN_OVLO
IN_OVLO
external resistor ladder or just be default value V
.
IN_OVLO
When V
is smaller than V
, V
will be
OVLO
IL_OVLO
OVLO
decided by default value. When V
is larger than
OVLO
V
, the power switch will be turned off once V
IH_OVLO
OVLO
> V
. The external resistor ladder can be decided
OVLO_TH
Power MOSFET
according to the following equation:
The FPF3380 integrates an N−type MOSFET with 15 mW
resistance. The power FET can work under 2.8V ~ 23 V and
up to 5 A DC current capability.
ǒ
Ǔ
VIN_OVLO + VOVLO_TH 1 ) R1ńR2
(eq. 1)
where R1 and R2 are the resistors in Figure 1.
Power Supply
The FPF3380 is supplied by IN.
IN will be firstly supplied by OUT when the device is
working under USB On−The−Go (OTG) condition.
Power OK indicator
FPF3380 has an Open−Drain output ACOKB. By
implement connection to external supply through a resistor,
ACOKB can indicate the status on IN (or VBUS). When
VIN is between V
and V
more than 30 ms,
IN_UV_R
IN_OVLO
Enable Control
ACOKB will be pulled down to ground. If the input voltage
is out of this range, ACOKB will present as a floating node
and the voltage will be pulled high by external power supply.
FPF3380 has an active low enable pin ENB. When ENB
pin is connected to a high level, the internal FET will be
turned off. When ENB pin is connected to low level, the FET
will be turned on as long as V is not higher than
Over−Voltage threshold.
IN
Thermal Shutdown
When the device is in the switch mode, to protect the
device from over temperature, the power switch will be
turned off when the junction temperature exceeds T . The
switch will be turned on again when temperature drop below
Under Voltage Lockout
FPF3380 power switch will be turned off when the
SD
voltage on IN is lower than the UVLO threshold V
.
IN_UV_F
T
− T
.
SD
SH
Whenever VIN voltage ramps up to higher than
V , the power FET will be turned on automatically
IN_UV_R
after t
de−bounce time if there is no OV or OT condition.
DEB
APPLICATIONS INFORMATION
Input Decoupling (Cin)
the FPF3380 has good thermal conductivity through the
PCB, the junction temperature will be relatively low with
high power applications. The maximum dissipation the
FPF3380 can handle is given by:
A ceramic or tantalum at least 0.1 mF capacitor is
recommended and should be connected close to the
FPF338x package. Higher capacitance and lower ESR will
improve the overall line and load transient response.
ƪT
ƫ
J(MAX) * TA
(eq. 2)
PD(MAX)
+
Output Decoupling (Cout
)
RqJA
The FPF338x is a stable component and does not require
a minimum Equivalent Series Resistance (ESR) for the
output capacitor. The minimum output decoupling value is
0.1 mF and can be augmented to fulfill stringent load
transient requirements.
Since T is not recommended to exceed 125°C, then the
J
2
FPF338x soldered on 645 mm , 1 oz copper area, and the
ambient temperature (T ) is 25°C. The power dissipated by
A
the FPF3380 can be calculated from the following
equations:
Thermal Considerations
PD [ Vin @ IQ@Iout ) Iout 2 @ rON
ǒ
Ǔ
(eq. 3)
As power in the FPF3380 increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and the ambient temperature
affect the rate of junction temperature rise for the part. When
Hints
V and V printed circuit board traces should be as wide
in
out
as possible. Place external components, especially the input
capacitor and TVS, as close as possible to the FPF3380, and
make traces as short as possible.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WLCSP12 1.828x1.288x0.574
CASE 567WP
ISSUE O
DATE 25 JUN 2018
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON93136G
WLCSP12 1.828x1.288x0.574
PAGE 1 OF 1
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