FQD2N60CTM [ONSEMI]
功率 MOSFET,N 沟道,QFET®,600 V,1.9 A,4.7 Ω,DPAK;型号: | FQD2N60CTM |
厂家: | ONSEMI |
描述: | 功率 MOSFET,N 沟道,QFET®,600 V,1.9 A,4.7 Ω,DPAK 开关 脉冲 晶体管 |
文件: | 总9页 (文件大小:451K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DATA SHEET
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MOSFET – N-Channel,
QFET)
V
R
MAX
I MAX
D
DSS
DS(ON)
600 V
4.7 ꢀ @ 10 V
1.9 A
600 V, 1.9 A, 4,7 W
D
FQD2N60C / FQU2N60C
This N−Channel enhancement mode power MOSFET is produced
using onsemi’s proprietary planar stripe and DMOS technology. This
advanced MOSFET technology has been especially tailored to reduce
on−state resistance, and to provide superior switching performance
and high avalanche energy strength. These devices are suitable for
switched mode power supplies, active power factor correction (PFC),
and electronic lamp ballasts.
G
S
Features
• 1.9 A, 600 V, R
= 4.7 ꢀ (Max.) @ V = 10 V, I = 0.95 A
GS D
• Low Gate Charge (Typ. 8.5 nC)
• Low Crss (Typ. 4.3 pF)
DS(on)
• 100% Avalanche Tested
• These Devices are Halid Free and are RoHS Compliant
DPAK3 (IPAK)
CASE 369AR
DPAK3 (TO−252 3 LD)
CASE 369AS
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
C
MARKING DIAGRAMS
Symbol
Rating
Drain−Source Voltage
Drain Current − Continuous (T = 25°C)
Value
Unit
V
V
DSS
600
$Y&Z&3&K
FQU
$Y&Z&3&K
FQD
I
D
1.9
1.14
A
C
− Continuous (T = 100°C)
C
2N60C
2N60C
I
Drain Current − Pulsed
Gate−Source Voltage
Single Pulsed Avalanche Energy (Note 2)
(Note 1)
7.6
30
A
V
DM
V
GSS
E
120
1.9
4.4
4.5
2.5
mJ
A
AS
I
Avalanche Current
(Note 1)
(Note 1)
(Note 3)
AR
E
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
mJ
V/ns
W
AR
dv/dt
FQD2N60C,
FQU2N60C = Device Code
P
Power Dissipation (T = 25°C) *
D
A
Power Dissipation (T = 25°C)
44
W
$Y
&Z
&3
&K
= onsemi Logo
= Assembly Location
= Date Code
C
− Derate above 25°C
0.35
W/°C
T , T
Operating and Storage Temperature
Range
−55 to
+150
°C
J
STG
= Lot Run Traceability Code
T
Maximum Lead Temperature for
Soldering Purposes, 1/8”
300
°C
L
ORDERING INFORMATION
(from case for 5 seconds)
†
Device
Package
Shipping
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
FQD2N60CTM
FQU2N60CTU
DPAK3
(TO−252 3 LD)
(Pb−Free)
2500 /
Tape & Reel
70 Units / Tube
DPAK3 (IPAK)
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2004
1
Publication Order Number:
April, 2022 − Rev. 3
FQU2N60C/D
FQD2N60C / FQU2N60C
THERMAL CHARACTERISTICS
Symbol
Parameter
Value
2.87
110
Unit
°C/W
°C/W
R
R
Thermal Resistance, Junction−to−Case, Max.
ꢁ
JC
JA
Thermal Resistance, Junction−to−Ambient (minimum pad of 2 oz copper), Max.
ꢁ
2
Thermal Resistance, Junction−to−Ambient (* 1 in pad of 2 oz copper), Max.
50
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
C
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain−to−Source Breakdown Voltage
I
I
= 250 ꢂ A, V = 0 V
600
−
−
−
V
DSS
D
GS
ꢃ BV
ꢃ T
/
Breakdown Voltage Temperature
Coefficient
= 250 ꢂ A, Referenced to 25°C
−
0.6
V/°C
DSS
J
D
I
Zero Gate Voltage Drain Current
V
DS
V
DS
V
GS
V
GS
= 600 V, V = 0 V
−
−
−
−
−
−
−
−
1
ꢂ A
DSS
GS
= 480 V, T = 125°C
10
C
I
Gate−Body Leakage Current, Forward
Gate−Body Leakage Current, Reverse
= 30 V, V = 0 V
100
−100
nA
nA
GSSF
DS
I
= −30 V, V = 0 V
DS
GSSR
ON CHARACTERISTICS
V
Gate Threshold Voltage
V
DS
V
GS
V
DS
= V , I = 250 ꢂ A
2.0
−
−
4.0
4.7
−
V
ꢀ
S
GS(th)
DS(on)
GS
D
R
Static Drain−Source On Resistance
Forward Transconductance
= 10 V, I = 0.95 A
3.6
5.0
D
g
FS
= 40 V, I = 0.95 A
−
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 25 V, V = 0 V,
−
−
−
180
20
235
25
pF
iss
DS
GS
f = 1.0 MHz
C
Output Capacitance
oss
C
Reverse Transfer Capacitance
4.3
5.6
rss
SWITCHING CHARACTERISTICS
t
Turn−On Delay Time
Turn−On Rise Time
Turn−Off Delay Time
Turn−Off Fall Time
Total Gate Charge
Gate−Source Charge
Gate−Drain Charge
V
= 300 V, I = 2 A,
−
−
−
−
−
−
−
9
28
60
58
66
12
−
ns
d(on)
DD
G
D
R
= 25
ꢀ
(Note 4)
(Note 4)
t
r
25
24
28
8.5
1.3
4.1
t
d(off)
t
f
Q
V
DS
V
GS
= 480 V, I = 2 A,
nC
g
D
= 10 V
Q
gs
Q
gd
−
DRAIN−SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
Maximum Continuous Drain−Source Diode Forward Current
Maximum Pulsed Drain−Source Diode Forward Current
−
−
−
−
−
−
−
1.9
7.6
1.4
−
A
A
S
I
SM
V
SD
Drain−Source Diode Forward Voltage
Reverse Recovery Time
V
V
= 0 V, I = 1.6 A
−
V
GS
S
t
rr
= 0 V, I = 2 A,
230
1.0
ns
ꢂ C
GS
S
dI /dt = 100 A/ꢂ s
F
Q
Reverse Recovery Charge
−
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. Repetitive Rating : Pulse width limited by maximum junction temperature.
2. L = 56 mH, I = 2 A, V = 50 V, R = 25 ꢀ, Starting T = 25°C.
AS
DD
G
J
3. I ≤ 2.0 A, di/dt ≤ 200A/ꢂ s, V ≤ BV
, Starting T = 25°C.
SD
DD
DSS
J
4. Essentially independent of operating temperature.
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2
FQD2N60C / FQU2N60C
TYPICAL CHARACTERISTICS
1
10
0
10
150°C
V
GS
0
10
25°C
−55°C
Top:
15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
5.0 V
−1
10
*Notes:
*Notes:
1. 250 ꢂ s Pulse Test
1. V = 40 V
DS
2. 250 ꢂ s Pulse Test
Bottom: 4.5 V
2. T = 25°C
C
−2
−1
10
10
−1
0
1
2
10
10
10
4
6
8
10
V
GS
, Gate−Source Voltage (V)
V
DS
, Drain−Source Voltage (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
12
10
8
V
GS
= 10 V
150°C
25°C
0
10
6
4
2
0
V
= 20 V
GS
*Notes:
1. V = 0 V
GS
*Note: T = 25°C
2. 250 ꢂ s Pulse Test
J
−1
10
1
1.0
1.2
1.4
0
2
3
4
5
0.2
0.4
0.6
0.8
V
SD
, Source−Drain Voltage (A)
I , Drain Current (A)
D
Figure 3. On−Resistance Variation vs. Drain
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current and Temperature
Current and Gate Voltage
12
500
450
400
350
300
250
C
C
C
= C + C (C = shorted)
iss
gs
gd
ds
= C + C
V
V
= 120 V
= 300 V
= 480 V
oss
rss
ds
gd
DS
DS
DS
= C
10
8
gd
V
C
iss
6
C
oss
200
150
100
4
C
rss
*Notes:
2
0
1. V = 0 V
2. f = 1 MHz
GS
50
0
*Note: I = 2 A
D
0
2
6
8
0
4
10
−1
1
10
10
10
Q , Total Gate Charge (nC)
G
V
DS
, Drain−Source Voltage (V)
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
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3
FQD2N60C / FQU2N60C
TYPICAL CHARACTERISTICS (continued)
3.0
2.5
1.2
1.1
1.0
0.9
0.8
2.0
1.5
1.0
*Notes:
0.5
*Notes:
1. V = 10 V
1. V = 0 V
GS
GS
2. I = 250 ꢂ s
2. I = 0.95 A
D
D
0.0
−100
−50
0
50
100
150
200
−100
−50
0
50
100
150
200
T , Junction Temperature (°C)
J
T , Junction Temperature (°C)
J
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On−Resistance Variation
vs. Temperature
2.0
1.6
Operation This Area
is Limited by R
DS(on)
1
0
10
100 ꢂ s
1.2
0.8
10
1 ms
10 ms
100 ms
−1
10
*Note:
1. T = 25°C
DC
0.4
0.0
C
2. T = 150°C
3. Single Pulse
J
−2
10
0
1
2
3
50
25
75
100
125
150
10
10
10
10
T , Case Temperature (°C)
C
V
DS
, Drain−Source Voltage (V)
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current vs. Case
Temperature
D = 0.5
0
10
0.2
0.1
P
DM
0.05
t
1
0.02
t
2
−1
10
0.01
*Notes:
1. Z (t) = 2.87°C/W Max.
2. Duty Factor, D = t /t
ꢁ
JC
Single Pulse
1
2
3. T − T = P
× Z (t)
ꢁ
JC
JM
C
DM
−3
−5
−4
−2
−1
0
1
10
10
10
10
10
10
10
t , Square Wave Pulse Duration (s)
1
Figure 11. Transient Thermal Response Curve
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4
FQD2N60C / FQU2N60C
Same Type
as DUT
V
GS
50 kꢀ
Q
g
12 V
300 nF
200 nF
V
DS
V
GS
Q
Q
gd
gs
DUT
I
G
= const.
Charge
Figure 12. Gate Charge Test Circuit & Waveform
R
L
V
DS
90%
V
DS
V
DD
V
GS
R
G
10%
V
GS
DUT
V
GS
t
t
d(on)
d(off)
t
f
t
r
t
off
t
on
Figure 13. Resistive Switching Test Circuit & Waveforms
BVDSS
L
1
2
EAS
+
ꢀ LIAS2ꢀꢀ
V
DS
BVDSS * VDD
BV
DSS
I
D
I
AS
R
G
V
DD
I (t)
D
DUT
V
DD
V
DS
(t)
V
GS
t
P
t
p
Time
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
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5
FQD2N60C / FQU2N60C
+
DUT
V
DS
_
I
SD
L
Driver
R
G
Same Type
as DUT
V
DD
V
GS
• dv/dt controlled by R
G
• I controlled by pulse period
SD
Gate Pulse Width
D =
V
GS
(Driver)
Gate Pulse Period
10 V
I
, Body Diode Forward Current
FM
I
SD
(DUT)
di/dt
I
RM
Body Diode Reverse Current
Body Diode Recovery dv/dt
V
DS
(DUT)
V
DD
V
SD
Body Diode
Forward Voltage Drop
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
QFET is a registered trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or
other countries.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DPAK3 (IPAK)
CASE 369AR
ISSUE O
DATE 30 SEP 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13815G
DPAK3 (IPAK)
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DPAK3 (TO−252 3 LD)
CASE 369AS
ISSUE A
DATE 28 SEP 2022
GENERIC
MARKING DIAGRAM*
XXXXXX
XXXXXX
AYWWZZ
XXXX = Specific Device Code
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
A
Y
= Assembly Location
= Year
WW = Work Week
ZZ
= Assembly Lot Code
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
98AON13810G
DPAK3 (TO−252 3 LD)
PAGE 1 OF 1
DESCRIPTION:
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
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