FQP2N40-F080 [ONSEMI]
N 沟道 QFET® MOSFET;
| 型号： | FQP2N40-F080 |
| 厂家： | 
ONSEMI |
| 描述： | N 沟道 QFET® MOSFET 局域网 开关 脉冲 晶体管 |
| 文件： | 总9页 (文件大小：1181K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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FQP2N40
N-Channel QFET® MOSFET
400 V, 1.8 A, 5.8 Ω
Features
• 1.8 A, 400 V, R
ID = 0.9 A
= 5.8 Ω (Max.) @ V = 10 V,
GS
DS(on)
Description
This N-Channel enhancement mode power MOSFET
is produced using ON Semiconductor’s proprietary
planar stripe and DMOS technology. This advanced
MOSFET technology has been especially tailored to
reduce on-state resistance, and to provide superior
switching performance and high avalanche energy
strength. These devices are suitable for switched mode
power supplies, active power factor correction (PFC), and
electronic lamp ballasts.
•
•
•
•
•
Low Gate Charge (Typ. 4.0 nC)
Low Crss (Typ. 3.0 pF)
Fast Switching
100% Avalanche Tested
Improved dv/dt Capability
D
G
D
G
S
TO-220
S
Absolute Maximum Ratings TC = 25oC unless otherwise noted.
FQP2N40-F080
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Thermal Resistance, Junction-to-Case, Max.
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Publication Order Number:
©2000 Semiconductor Components Industries, LLC.
October-2017,Rev.3
FQP2N40/D
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Package Marking and Ordering Information
Part Number
Top Mark
Package
Packing Method Reel Size
N/A
Tape Width
Quantity
FQP2N40-F080
FQP2N40
TO-220
N/A
50 units
Tube
Electrical Characteristics TC = 25oC unless otherwise noted.
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1. Repetitive rating : pulse-width limited by maximum junction temperature.
2. L = 45 mH, IAS = 1.8 A, VDD = 50 V, RG = 25 Ω, starting TJ = 25oC.
3. ISD ≤ 1.8 A, di/dt ≤ 200 A/μs, VDD ≤ BVDSS, starting TJ = 25oC.
4. Essentially independent of operating temperature.
www.onsemi.com
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ꢖꢂꢃꢃꢂꢗꢀꢀꢆꢀꢀꢀꢀꢀꢋꢈꢋꢀꢉ
ꢂꢅꢃꢀ
ꢀꢅꢀ
ꢇꢉ
ꢂꢃ
ꢇꢉ
ꢂꢃ
ꢄꢅꢅꢀ
ꢀ
ꢀꢁꢂꢃꢄꢅꢀꢆ
ꢀ
ꢀꢁꢂꢃꢄꢅꢀꢆ
ꢀꢀꢀꢇꢈꢀꢉꢀꢈꢀꢊꢀꢋꢌꢉ
ꢁ
ꢀꢀꢀꢍꢈꢀꢍꢋꢌ ꢅꢀꢎꢏꢐꢅꢄꢀꢑꢄꢅꢃ
ꢁ
ꢀꢀꢀꢇꢈꢀꢍꢋꢌ ꢅꢀꢎꢏꢐꢅꢄꢀꢑꢄꢅꢃ
ꢀꢀꢀꢍꢈꢀꢑꢉꢀꢊꢀꢍꢋ
ꢂ
ꢇꢈ
ꢇꢈ
ꢂꢃ
ꢂꢃ
ꢇꢉ
ꢊ
ꢉ
ꢀ
ꢁ
ꢂꢃ
8
6
ꢀꢃꢁꢁꢂꢁꢃꢄꢅꢆꢇꢈꢉꢊꢋꢌꢆꢁꢀꢉꢍꢅꢄꢎꢆꢁꢁꢏꢀꢐ
ꢂꢃ
ꢂꢃ
ꢂꢃ
ꢀꢀꢁꢁꢂꢁꢑꢋꢄꢒꢓꢇꢈꢉꢊꢋꢌꢆꢁꢀꢉꢍꢅꢄꢎꢆꢁꢁꢏꢀꢐ
ꢀꢁꢂꢃꢄꢅꢆ'ꢈꢆꢔꢎꢕꢖꢅꢂꢁꢘꢎꢆꢉꢏꢊꢄꢊꢌꢍꢅꢄꢁꢐꢍꢁꢌꢐ
ꢀꢁꢂꢃꢄꢅꢆ%ꢈꢆ#ꢄꢊꢎꢐ&ꢅꢄꢆꢉꢏꢊꢄꢊꢌꢍꢅꢄꢁꢐꢍꢁꢌꢐ
ꢀ
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ꢃꢆ
ꢃꢄ
ꢃꢀ
ꢈ
ꢉ
ꢊꢋꢊꢃꢀꢉ
ꢀꢁ
ꢉ
ꢊꢋꢊꢄꢀꢉ
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ꢀꢁꢂꢃꢄꢏꢀꢅ
ꢀꢀꢀꢈꢉꢀꢔꢇꢈꢀꢇꢀꢕꢔ
ꢁ
ꢀꢀꢀꢖꢉꢀꢖꢛꢕ ꢏꢀꢜꢝꢞꢏꢄꢀ ꢄꢏꢃ
ꢆ
ꢀ
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ꢀ
ꢄꢂ
ꢄ
ꢀꢁꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂ
ꢃꢁꢀ
ꢃꢁꢂ
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ꢅꢁꢀ
ꢅꢁꢂ
ꢁꢄꢃ
ꢁꢄꢅ
ꢁꢄꢆ
ꢁꢄꢇ
ꢀꢄꢁ
ꢀꢄꢃ
ꢀꢄꢅ
ꢀ ꢁꢂꢁꢃꢄꢅꢆꢇꢁꢈꢉꢄꢄꢊꢇꢋꢁꢁꢌꢍꢎ
ꢀ
ꢀꢁꢀꢁꢂꢉꢊꢋꢄꢌꢍꢈꢃꢄꢅꢆꢇꢂ#ꢊ ꢎꢅꢏꢍꢂ!ꢀ"
ꢀꢁꢂꢃꢄꢅꢆꢓꢈꢆꢔꢎꢕꢖꢅꢐꢁꢐꢍꢊꢎꢌꢅꢆꢗꢊꢄꢁꢊꢍꢁꢘꢎꢆꢆꢙꢐꢈ
ꢚꢄꢊꢁꢎꢆꢉꢃꢄꢄꢅꢎꢍꢆꢊꢎꢛꢆꢒꢊꢍꢅꢆꢗꢘꢜꢍꢊꢂꢅ
ꢀꢁꢂꢃꢄꢅꢆꢝꢈꢆꢞꢘꢛ ꢆꢚꢁꢘꢛꢅꢆꢀꢘꢄ!ꢊꢄꢛꢆꢗꢘꢜꢍꢊꢂꢅꢆ
ꢗꢊꢄꢁꢊꢍꢁꢘꢎꢆꢙꢐꢈꢆ"ꢘꢃꢄꢌꢅꢆꢉꢃꢄꢄꢅꢎꢍꢆ
ꢊꢎꢛꢆ#ꢅ$ꢋꢅꢄꢊꢍꢃꢄꢅ
ꢀ
ꢀ
ꢃꢂꢁ
ꢃꢁꢁ
ꢀꢂꢁ
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ꢌꢅꢂꢂꢀꢇꢀꢌꢄꢂꢀꢍꢀꢌ
ꢃꢄ
ꢌꢆꢂꢂꢀꢇꢀꢌ
ꢉ ꢊꢋꢊꢈꢀꢉ
ꢂꢁ
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ꢅ
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ꢀꢀꢀꢖꢉꢀꢗꢀꢇꢀꢈꢀꢘꢙꢚ
ꢀ
ꢃꢄꢄ
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ꢁ
ꢁ
ꢇ
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3
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ꢃ
ꢀꢁ
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ꢀꢁ
ꢏ ꢂꢁꢐꢑꢋꢅꢒꢁꢓꢅꢋꢊꢁꢈꢔꢅꢄꢕꢊꢁꢌꢇꢈꢎ
ꢁ
ꢀꢀꢁꢁꢂꢃꢄꢅꢆꢇꢈꢉꢊꢋꢄꢌꢍꢂꢀꢊ ꢎꢅꢏꢍꢂ!ꢀ"
ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢆꢉꢊꢋꢊꢌꢁꢍꢊꢎꢌꢅꢆꢉꢏꢊꢄꢊꢌꢍꢅꢄꢁꢐꢍꢁꢌꢐ
ꢀꢁꢂꢃꢄꢅꢆꢑꢈꢆꢒꢊꢍꢅꢆꢆꢉꢏꢊꢄꢂꢅꢆꢉꢏꢊꢄꢊꢌꢍꢅꢄꢁꢐꢍꢁꢌꢐ
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3
ꢀ !ꢁꢂꢃꢄꢅꢆꢇꢃꢈꢃꢂꢉꢊꢈꢁꢋꢉꢁꢂꢋꢅꢀꢀꢀꢀꢁꢂꢃꢄꢅꢆꢄꢇꢈꢉꢊ
ꢂ
ꢀ
ꢊꢄꢁ
ꢃꢄꢂ
ꢃꢄꢁ
ꢀꢄꢂ
ꢀꢄꢁ
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ꢁꢄꢁ
ꢃꢁꢄ
ꢃꢁꢃ
ꢃꢁꢀ
ꢀ
ꢀꢊꢋꢌꢍꢎꢀꢏ
ꢀꢁꢘ
ꢀꢁꢈ
ꢀꢀꢀꢇꢉꢀꢐ ꢀꢑꢀꢁꢀꢐ
ꢇꢈ
ꢀ
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ꢀꢀꢀꢇꢈꢀꢉꢇꢈꢀꢊꢀꢇꢌꢀꢉ
ꢀꢀꢀꢍꢈꢀꢘꢀꢀꢊꢀꢌꢈꢙꢀꢚ
ꢁ
ꢓ
ꢀꢀꢀꢄꢉꢀꢒ ꢀꢑꢀꢄꢃꢁꢀ
ꢉ
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ꢗꢂꢀ
ꢀ
ꢂꢀ
ꢃꢀꢀ
ꢃꢂꢀ
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ꢉꢂꢁ
ꢁ
ꢂꢁ
ꢀꢁꢁ
ꢀꢂꢁ
ꢃꢁꢁ
ꢔꢂꢁꢕꢊꢓꢌꢅꢒꢉꢓꢁꢔꢆꢖꢗꢆꢋꢄꢅꢊꢋꢆꢁꢏꢉꢘꢐ
ꢚꢂꢃꢛꢔꢑꢕꢘꢋꢆꢑꢃꢚꢍꢈꢜꢍꢇꢉꢘꢔꢇꢍꢃꢝꢇꢞ
ꢈ
%
ꢀꢁꢂꢃꢄꢅꢆ-ꢈꢆꢞꢄꢅꢊ.ꢛꢘ!ꢎꢆꢗꢘꢜꢍꢊꢂꢅꢆꢗꢊꢄꢁꢊꢍꢁꢘꢎ
ꢙꢐꢈꢆ#ꢅ$ꢋꢅꢄꢊꢍꢃꢄꢅ
ꢀꢁꢂꢃꢄꢅꢆ/ꢈꢆꢔꢎꢕꢖꢅꢐꢁꢐꢍꢊꢎꢌꢅꢆꢗꢊꢄꢁꢊꢍꢁꢘꢎ
ꢙꢐꢈꢆ#ꢅ$ꢋꢅꢄꢊꢍꢃꢄꢅ
ꢀ
ꢀ
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ꢇꢉꢃ
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ꢆꢌꢉꢎꢆꢏꢆꢅꢂꢐꢉꢑꢒꢉꢓꢉꢅꢆꢇꢈꢉꢊ
ꢇꢁꢅ
ꢃꢀꢀꢊµꢌ
ꢃꢊꢖꢌ
ꢃꢀꢊꢖꢌ
ꢄ
ꢇꢁ
ꢔꢕ
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ꢉꢔꢇꢅꢂꢌꢉꢕ
ꢉꢉꢉꢖꢗꢉꢊꢁꢉꢘꢉꢙꢚꢉꢈꢛ
ꢉꢉꢉꢙꢗꢉꢊꢀꢉꢘꢉꢖꢚꢜꢉꢈꢛ
ꢉꢉꢉꢝꢗꢉꢞꢆꢈ !ꢂꢉ"#!ꢌꢂ
ꢀꢆ
ꢇꢁ
ꢄ
ꢅ
ꢆ
ꢃ
ꢄꢃ
ꢃꢁ
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ꢎ
ꢂꢁꢃꢄꢅꢆꢇ!ꢛꢑꢉꢄꢘꢊꢁ ꢑꢒꢋꢅꢕꢊꢁꢌ ꢎ
ꢂ
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ꢀꢁꢂꢃꢄꢅꢆ',ꢈꢆ)ꢊ*ꢁ$ꢃ$ꢆꢚꢄꢊꢁꢎꢆꢉꢃꢄꢄꢅꢎꢍ
ꢙꢐꢈꢆꢉꢊꢐꢅꢆ#ꢅ$ꢋꢅꢄꢊꢍꢃꢄꢅ
ꢀ
ꢔ ꢋ ꢀ ꢁꢂ
ꢇ ꢁ ꢄ
ꢀ
ꢀꢁ ꢂ ꢃꢄ ꢏ ꢀꢅ
ꢀ ꢁꢄ
ꢂ
ꢀꢀꢀꢈ ꢉꢀ! ꢀ ꢁꢎꢃꢓꢀꢇ ꢀ" ꢉꢈ " ꢀ #$ ꢀꢘ % & ꢉ
ꢀ
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ꢀ ꢁꢃ
ꢀꢀꢀ" ꢉꢀ ꢀ ꢄ ꢀ, ꢀ ꢁ ꢀꢇ ꢀꢜ ꢅ ꢀ- ꢀ! ꢀ ꢁꢎꢃꢓ
ꢀ
ꢄ
ꢀ ꢁꢀ ꢂ
ꢇ ꢁ ꢀꢅ
ꢀ ꢁꢀ ꢄ
ꢀ ꢁꢀ ꢃ
"
ꢁꢂ
ꢀꢀ
ꢌ ꢍꢎ ꢏ ꢐꢑ ꢊꢒ ꢓ ꢐꢌ ꢑ
ꢀꢃ
ꢇ ꢁ ꢀꢆ
ꢇ ꢁ ꢀꢁ
ꢇ ꢁ ꢀꢂ
ꢇ ꢁ ꢀꢃ
ꢇ ꢁ ꢀꢆ
ꢇ ꢁ ꢀꢅ
ꢇ ꢁ ꢄ
ꢇ ꢁ ꢅ
t 1
, R e c t a n g u l a r
ꢁꢖ ꢉ ꢒꢗ ꢊ ꢁꢃ ꢉ ꢄꢅ ꢋꢆꢑ ꢇ ꢁꢌꢗ ꢊ ꢘ ꢎ
ꢀꢁꢂꢃꢄꢅꢆ''ꢈꢆ#ꢄꢊꢎꢐꢁꢅꢎꢍꢆ#ꢏꢅꢄ$ꢊꢜꢆꢖꢅꢐꢋꢘꢎꢐꢅꢆꢉꢃꢄꢙꢅ
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4
VGS
Same Type
as DUT
50KΩ
Qg
12V
200nF
300nF
VDS
VGS
Qgs
Qgd
DUT
I
= const.
G
Charge
Figure 12. Gate Charge Test Circuit & Waveform
RL
VDS
90%
VDS
VDD
VGS
RG
10%
VGS
DUT
V
GS
td(on)
tr
td(off)
tf
t on
t off
Figure 13. Resistive Switching Test Circuit & Waveforms
BVDSS
--------------------
BVDSS - VDD
L
1
2
2
----
EAS
=
L IAS
VDS
I D
BVDSS
IAS
RG
VDD
ID (t)
V
VDS (t)
VDD
DUT
GS
t p
t p
Time
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
www.onsemi.com
5
+
DUT
VDS
_
I SD
L
Driver
RG
Same Type
as DUT
VDD
VGS
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
--------------------------
VGS
D =
Gate Pulse Period
10V
( Driver )
IFM , Body Diode Forward Current
I SD
di/dt
( DUT )
IRM
Body Diode Reverse Current
Body Diode Recovery dv/dt
VSD
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
www.onsemi.com
6
Mechanical Dimensions
Figure 16. TO220, Molded, 3-Lead, Jedec Variation AB
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