FQPF13N50C [ONSEMI]
功率 MOSFET，N 沟道，QFET®，500 V，13.5 A，480 mΩ，TO-220F;
| 型号： | FQPF13N50C |
| 厂家： | 
ONSEMI |
| 描述： | 功率 MOSFET，N 沟道，QFET®，500 V，13.5 A，480 mΩ，TO-220F 局域网 开关 脉冲 晶体管 |
| 文件： | 总11页 (文件大小：1281K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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www.onsemi.com
onsemi andꢀꢀꢀꢀꢀꢀꢀand other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or
subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi
product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without
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liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws,
regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/
or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application
by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized
for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for
implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and holdonsemi and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative
Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Other names and brands may be claimed as the property of others.
FQP13N50C / FQPF13N50C
N-Channel QFET® MOSFET
500 V, 13 A, 480 mΩ
Description
These N-Channel enhancement mode power field effect
Features
13 A, 500 V, RDS(on) = 480 mΩ (Max.) @ VGS = 10 V,
ID = 6.5 A
•
transistors are produced using ON Semiconductor’s
•
•
•
Low Gate Charge (Typ. 43 nC)
proprietary, planar stripe,
DMOS technology. This
advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switched mode power supplies,
active power factor correction, electronic lamp ballasts
based on half bridge topology.
Low Crss (Typ. 20 pF)
100% Avalanche Tested
D
G
G
G
D
S
D
TO-220
TO-220F
S
S
Absolute Maximum Ratings TC = 25oC unless otherwise noted.
Symbol
Parameter
FQP13N50C
FQPF13N50C
500
Units
V
V
I
Drain-Source Voltage
DSS
- Continuous (T = 25°C)
Drain Current
13
8
13 *
8 *
A
D
C
- Continuous (T = 100°C)
A
C
I
(Note 1)
Drain Current
- Pulsed
52
52 *
A
DM
V
E
I
Gate-Source Voltage
± 30
860
13
V
GSS
AS
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Single Pulsed Avalanche Energy
Avalanche Current
mJ
A
AR
E
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
19.5
4.5
mJ
V/ns
W
AR
dv/dt
P
Power Dissipation (T = 25°C)
195
48
D
C
- Derate above 25°C
Operating and Storage Temperature Range
1.56
0.39
W/°C
°C
T , T
-55 to +150
300
J
STG
Maximum lead temperature for soldering purposes,
T
°C
L
1/8" from case for 5 seconds
* Drain current limited by maximum junction temperature
Thermal Characteristics
Symbol
Parameter
FQP13N50C
0.64
FQPF13N50C
Units
°C/W
°C/W
°C/W
R
R
R
Thermal Resistance, Junction-to-Case, Max.
Thermal Resistance, Case-to-Sink, Typ.
2.58
--
θJC
0.5
θJS
Thermal Resistance, Junction-to-Ambient, Max.
62.5
62.5
θJA
Publication Order Number:
©2003 Semiconductor Components Industries, LLC.
September-2017, Rev. 3
FQP13N50C-F105/D
Package Marking and Ordering Information
Part Number
FQP13N50C-F105
FQPF13N50C-F105
Top Mark
FQP13N50C
FQPF13N50C
Package
TO-220
Packing Method Reel Size
Tape Width
N/A
Quantity
50 units
50 units
N/A
N/A
Tube
Tube
TO-220F
N/A
Electrical Characteristics TC = 25oC unless otherwise noted.
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
Off Characteristics
BV
V
I
= 0 V, I = 250 µA
Drain-Source Breakdown Voltage
500
--
--
--
--
V
DSS
GS
D
∆BV
Breakdown Voltage Temperature
Coefficient
DSS
= 250 µA, Referenced to 25°C
0.5
V/°C
D
/
∆T
J
I
V
V
V
V
= 500 V, V = 0 V
--
--
--
--
--
--
--
--
1
µA
µA
nA
nA
DSS
DS
GS
Zero Gate Voltage Drain Current
= 400 V, T = 125°C
10
DS
GS
GS
C
I
= 30 V, V = 0 V
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
100
-100
GSSF
DS
I
= -30 V, V = 0 V
GSSR
DS
On Characteristics
V
V
V
V
= V , I = 250 µA
Gate Threshold Voltage
2.0
--
--
4.0
0.48
--
V
Ω
S
GS(th)
DS
GS
DS
GS
D
R
Static Drain-Source
On-Resistance
DS(on)
= 10 V, I = 6.5 A
0.39
15
D
g
= 40 V, I = 6.5 A
Forward Transconductance
--
FS
D
Dynamic Characteristics
C
C
C
Input Capacitance
--
--
--
1580
180
20
2055
235
25
pF
pF
pF
iss
V
= 25 V, V = 0 V,
GS
DS
Output Capacitance
oss
rss
f = 1.0 MHz
Reverse Transfer Capacitance
Switching Characteristics
t
t
t
t
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
--
--
--
--
--
--
--
25
100
130
100
43
60
210
270
210
56
ns
ns
d(on)
V
= 250 V, I = 13 A,
DD
D
r
R
= 25 Ω
G
ns
d(off)
f
(Note 4)
(Note 4)
ns
Q
Q
Q
nC
nC
nC
g
V
V
= 400 V, I = 13 A,
DS
D
7.5
--
= 10 V
gs
gd
GS
18.5
--
Drain-Source Diode Characteristics and Maximum Ratings
I
Maximum Continuous Drain-Source Diode Forward Current
--
--
--
--
--
--
--
13
52
1.4
--
A
A
S
I
Maximum Pulsed Drain-Source Diode Forward Current
SM
V
t
V
V
= 0 V, I = 13 A
Drain-Source Diode Forward Voltage
Reverse Recovery Time
--
V
SD
GS
S
= 0 V, I = 13 A,
410
4.5
ns
µC
rr
GS
S
dI / dt = 100 A/µs
Q
Reverse Recovery Charge
--
F
rr
ꢀꢁꢂꢃꢄꢅ
1. Repetitive rating : pulse-width limited by maximum junction temperature.
2. L = 6 mH, IAS = 13 A, VDD = 50 V, RG = 25 Ω, starting TJ = 25oC.
3. ISD ≤ 13 A, di/dt ≤ 200 A/μs, VDD ≤ BVDSS, starting TJ = 25oC.
4. Essentially independent of operating temperature.
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2
ꢀ !ꢁꢂꢃꢄꢅꢆꢇꢃꢈꢃꢂꢉꢊꢈꢁꢋꢉꢁꢂꢋ
VGS
Top :
15.0 V
10.0V
8.0V
7.0V
6.0V
5.5V
5.0V
101
1
10
150oC
Bottom: .5 V
-55oC
25oC
100
0
10
※
Notes :
μ
1. 250 s Pulse Test
2. TC = 25
※
Notes :
℃
1. V = 40V
DS μ
2. 250 s Pulse Test
-1
10
-1
10
-1
1
10
2
4
6
8
10
10
100
VGS, Gate-Source Voltage [V]
VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
1.5
1.0
0.5
101
VGS = 10V
100
VGS = 20V
℃
150
※
Notes :
1. V = 0V
2. 250 s Pulse Test
℃
25
※
℃
GS μ
Note : T = 25
J
-1
10
0
5
10
15
20
25
30
35
0.2
0.4
0.6
0.8
1.0
1.2
1.4
ID, Drain Current [A]
VSD, Source-Drain voltage [V]
Figure 3. On-Resistance Variation vs
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
12
10
8
3000
C
iss = Cgs + Cgd (Cds = shorted)
VDS = 100V
VDS = 250V
Coss = Cds + C
gd
Crss = Cgd
2500
2000
1500
1000
500
VDS = 400V
C
iss
Coss
6
4
※
Notes ;
1. VGS = 0 V
2. f = 1 MHz
C
rss
2
※
Note: ID = 13A
40
0
0
10
0
10
20
30
50
-1
100
101
QG, Total Gate Charge [nC]
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
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3
(continued)
ꢀ !ꢁꢂꢃꢄꢅꢆꢇꢃꢈꢃꢂꢉꢊꢈꢁꢋꢉꢁꢂꢋ
1.2
1.1
1.0
0.9
0.8
3.0
2.5
2.0
1.5
1.0
0.5
0.0
※Notes :
1. V = 0 V
※
Notes :
2. IDG=S 250 μA
1. VGS = 10 V
2. ID = 6.5 A
-100
-50
0
50
100
150
200
-100
-50
0
50
100
150
200
T, Junction Temperature [oC]
T, Junction Temperature [oC]
J
J
Figure 7. Breakdown Voltage Variation
vs Temperature
Figure 8. On-Resistance Variation
vs Temperature
Operation in This Area
is Limited by R DS(on)
2
10
Operation in This Area
is Limited by R DS(on)
2
10
10 µs
100 µs
10 µs
1
10
100 µs
1 ms
1 ms
10 ms
100 ms
DC
10 ms
100 ms
1
10
DC
0
10
0
10
※
Notes :
1. TC = 25 o
2. TJ = 150 o
3. Single Pulse
※
-1
10
Notes :
1. TC = 25 oC
C
2. T = 150 o
3. Single Pulse
C
C
J
-1
-2
10
10
0
1
10
2
10
3
10
0
2
10
10
10
101
103
VDS, Drain-Source Voltage [V]
VDS, Drain-Source Voltage [V]
Figure 9-1. Maximum Safe Operating Area
for FQP13N50C
Figure 9-2. Maximum Safe Operating Area
for FQPF13N50C
14
12
10
8
6
4
2
0
25
50
75
100
125
150
℃
TC, Case Temperature [
]
Figure 10. Maximum Drain Current
vs Case Temperature
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4
(continued)
ꢀ !ꢁꢂꢃꢄꢅꢆꢇꢃꢈꢃꢂꢉꢊꢈꢁꢋꢉꢁꢂꢋ
1 00
D = 0 .5
0 .2
※
1 0-1
N o te s
1 . Z θ JC (t)
2 . D uty F a cto r, D = t1/t2
3 . T JM T C P D Z θ JC (t)
:
℃
/W M a x.
=
0 .6 4
0 .1
-
=
*
M
0 .0 5
0 .0 2
0 .0 1
PDM
1 0-2
s in g le p u ls e
t1
t2
1 0-5
1 0-4
1 0-3
1 0-2
1 0-1
1 00
1 01
t1 , S q u a re W a ve P u ls e D u ra tio n [s e c]
Figure 11-1. Transient Thermal Response Curve for FQP13N50C
D = 0 .5
1 00
0 .2
※
N otes
1. Zθ JC (t)
2. D uty Factor, D = t1/t2
:
℃
/W M ax.
=
2.58
0 .1
3. TJM
-
TC
=
P D M * Zθ JC(t)
0 .0 5
1 0-1
0 .0 2
0 .0 1
PDM
t1
s in g le p u ls e
t2
1 0-2
1 0-5
1 0-4
1 0-3
1 0-2
1 0-1
1 00
1 01
t1 , S q u a re W a ve P u ls e D u ra tio n [s e c]
Figure 11-2. Transient Thermal Response Curve for FQPF13N50C
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5
VGS
Same Type
as DUT
50KΩ
Qg
12V
200nF
300nF
VDS
VGS
Qgs
Qgd
DUT
I
= const.
G
Charge
Figure 12. Gate Charge Test Circuit & Waveform
RL
VDS
90%
VDS
VDD
VGS
RG
10%
VGS
DUT
V
GS
td(on)
tr
td(off)
tf
t on
t off
Figure 13. Resistive Switching Test Circuit & Waveforms
BVDSS
--------------------
BVDSS - VDD
L
1
2
2
----
EAS
=
L IAS
VDS
I D
BVDSS
IAS
RG
VDD
ID (t)
V
VDS (t)
VDD
DUT
GS
t p
t p
Time
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
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6
+
DUT
VDS
_
I SD
L
Driver
RG
Same Type
as DUT
VDD
VGS
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
--------------------------
VGS
D =
Gate Pulse Period
10V
( Driver )
IFM , Body Diode Forward Current
I SD
di/dt
( DUT )
IRM
Body Diode Reverse Current
Body Diode Recovery dv/dt
VSD
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
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Mechanical Dimensions
Figure 16. TO220, Molded, 3-Lead, Jedec Variation AB
Package drawings are provided as a service to customers considering ON Semiconductor components. Drawings may change in
any manner without notice. Please note the revision and/or date on the drawing and contact a ON Semiconductor representative to
verify or obtain the most recent revision. Package specifications do not expand the terms of ON Semiconductor’s worldwide terms
and conditions, specif-ically the warranty therein, which covers ON Semiconductor products.
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8
Mechanical Dimensions
Figure 17. TO220, Molded, 3-Lead, Full Pack, EIAJ SC91, Straight Lead
Package drawings are provided as a service to customers considering ON Semiconductor components. Drawings may change in
any manner without notice. Please note the revision and/or date on the drawing and contact a ON Semiconductor representative to
verify or obtain the most recent revision. Package specifications do not expand the terms of ON Semiconductor’s worldwide terms
and conditions, specif-ically the warranty therein, which covers ON Semiconductor products.
www.onsemi.com
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ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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