FQS4900TF [ONSEMI]

分立式 MOSFET;


型号：	FQS4900TF
厂家：	ONSEMI
描述：	分立式 MOSFET 开关脉冲光电二极管晶体管
文件：	总11页 (文件大小：1171K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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August 2000

QFET

FQS4900

Dual N & P-Channel, Logic Level MOSFET

General Description

Features

These dual N and P-channel enhancement mode power

field effect transistors are produced using Fairchild’s

proprietary, planar stripe, DMOS technology.

This advanced technology has been especially tailored to

minimize on-state resistance, provide superior switching

performance, and withstand high energy pulse in the

avalanche and commutation mode. This device is well

suited for high interface in telephone sets.

•

N-Channel 1.3A, 60V, R

P-Channel -0.3A, -300V, R

Low gate charge ( typical N-Channel 1.6 nC)

( typical P-Channel 3.6 nC)

Fast switching

= 0.55 Ω @ V = 10 V

DS(on)

= 0.65 Ω @ V = 5 V

= 15.5 Ω @ V = -10 V

DS(on)

= 16 Ω @ V =- 5 V

DS(on)

•

Improved dv/dt capability

Absolute Maximum Ratings

= 25°C unless otherwise noted

Symbol

Parameter

N-Channel

P-Channel

-300

Units

Drain-Source Voltage

1.3

DSS

- Continuous (T = 25°C)

DrainCurrent

-0.3

- Continuous (T = 70°C)

0.82

5.2

-0.19

(Note 1)

(Note 2)

DrainCurent

- Pulsed

-1.2

Gate-Source Voltage

± 20

GSS

dv/dt

Peak Diode Recovery dv/dt

7.0

4.5

V/ns

Power Dissipation (T = 25°C)

2.0

1.3

(T = 70°C)

T , T

Operating and Storage Temperature Range

-55 to +150

°C

STG

Thermal Characteristics

Symbol

Parameter

Typ

Max

Units

Thermal Resistance, Junction-to-Ambient

62.5

°C/W

θJA

Rev. A, August 2000

Electrical Characteristics

T = 25°C unless otherwise noted

Symbol

Parameter

Test Conditions

Type

Min

Typ

Max

Units

Off Characteristics

= 0 V, I = 250 µA

N-Ch

Drain-Source Breakdown Voltage

DSS

= 0 V, I = -250 µA

P-Ch -300

= 60 V, V = 0 V

µA

Zero Gate Voltage Drain Current

DSS

N-Ch

= 48 V, T = 55°C

-1

= -300 V, V = 0 V

P-Ch

= -240 V, T = 55°C

-10

100

-100

= 20 V, V = 0 V

Gate-Body Leakage Current, Forward

Gate-Body Leakage Current, Reverse

All

GSSF

= -20 V, V = 0 V

GSSR

On Characteristics

= 4V, I = 20 mA

N-Ch

P-Ch

1.0

-1.0

1.95

-1.95

0.55

0.65

15.5

Gate Threshold Voltage

GS(th)

= 4V, I = -20 mA

= 10 V, I = 0.65 A

Static Drain-Source On-Resistance

0.39

0.46

11.2

Ω

DS(on)

N-Ch

P-CH

= 5 V, I = 0.65 A

= -10 V, I = -0.15 A

= -5 V, I = -0.15 A

11.4

Ω

= 10 V, I = 0.65 A

N-CH

P-CH

1.7

0.6

Forward Transconductance

= -10 V, I = -0.15 A

Switching Characteristics

N-Ch

P-Ch

N-Ch

P-Ch

N-Ch

P-Ch

N-Ch

P-Ch

N-Ch

P-Ch

N-Ch

P-Ch

N-Ch

P-Ch

5.7

105

2.1

4.7

N-Channel

d(on)

Turn-On Delay Time

= 30 V, I = 1.3 A,

= 25 Ω

Turn-On Rise Time

P-Channel

= -150 V, I = -0.3 A,

d(off)

Turn-Off Delay Time

= 25 Ω

Turn-Off Fall Time

Total Gate Charge

1.6

3.6

0.28

0.42

0.82

2.1

N-Channel

= 48 V, I = 1.3 A,

= 5 V

Gate-Source Charge

Gate-Drain Charge

P-Channel

= -240 V, I = -0.3 A,

= -5 V

Drain-Source Diode Characteristics and Maximum Ratings

N-Ch

P-Ch

N-Ch

1.3

-0.3

1.5

Maximum Continuous Drain-Source Diode Forward Current

= 0 V, I = 1.3 A

Drain-Source Diode Forward Voltage

= 0 V, I = -0.3 A

P-Ch

-4.0

Notes:

1. Repetitive Rating : Pulse width limited by maximum junction temperature

3. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%

4. Essentially independent of operating temperature

Rev. A, August 2000

Typical Characteristics : N-Channel

V_GS

Top :

10.0 V

8.0 V

6.0 V

5.0 V

4.5 V

4.0 V

3.5 V

10⁰Bottom : 3.0 V

10⁰

℃

150

℃

-55

※

Notes :

1. 250 s Pulse Test

1. V_DS= 25V

℃

2. T_C= 25

2. 250 s Pulse Test

-1

10⁰

10¹

V_GS, Gate-Source Voltage [V]

V_DS, Drain-Source Voltage [V]

Figure 1. On-Region Characteristics

Figure 2. Transfer Characteristics

2.0

1.5

1.0

0.5

0.0

V_GS= 10V

10⁰

V_GS= 5V

℃

150

※

Notes :

1. V_GS= 0V

※

℃

Note : T = 25

2. 250 s Pulse Test

-1

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

I_D, Drain Current [A]

V_SD, Source-Drain voltage [V]

Figure 3. On-Resistance Variation vs.

Drain Current and Gate Voltage

Figure 4. Body Diode Forward Voltage

Variation vs. Source Current

and Temperature

_iss= C_gs+ C_gd(C_ds= shorted)

_oss= C_ds+ C_gd

C_rss= C_gd

160

120

※

Notes :

V_DS= 30V

V_DS= 48V

1. V_GS= 0 V

2. f = 1 MHz

iss

C_oss

rss

※

Note : I_D= 1.3 A

2.5

0.0

10^-1

10⁰

10¹

0.5

1.0

1.5

2.0

3.0

Q_G, Total Gate Charge [nC]

V_DS, Drain-Source Voltage [V]

Figure 5. Capacitance Characteristics

Figure 6. Gate Charge Characteristics

Rev. A, August 2000

Typical Characteristics : N-Channel (Continued)

2.5

2.0

1.5

1.0

0.5

0.0

1.2

1.1

1.0

※Notes :

1. V_GS= 0 V

2. I_D= 250 μ A

0.9

※

Notes :

1. V_GS= 10 V

2. I_D= 0.65 A

0.8

-100

-50

100

150

200

-100

-50

100

150

200

T_J, Junction Temperature [^oC]

Figure 7. Breakdown Voltage Variation

vs. Temperature

Figure 8. On-Resistance Variation

vs. Temperature

1.5

1.2

0.9

0.6

0.3

0.0

Operation in This Area

is Limited by R _DS(on)

10¹

10⁰

1 ms

10 ms

100 ms

1 s

10 s

-1

※

Notes :

1. T_C= 25 ^o

2. T_J= 150 ^o

3. Single Pulse

-2

10⁰

10¹

10²

-1

100

125

150

℃

T_C, Case Temperature [

]

V_DS, Drain-Source Voltage [V]

Figure 9. Maximum Safe Operating Area

Figure 10. Maximum Drain Current

vs. Case Temperature

D = 0 .5

0 .2

1 0 ¹

※

N o te s

1 . Z _θ_{J C}(t)

2 . D u ty F a c to r, D = t₁/t₂

0 .1

℃

/W M a x.

6 2 .5

0 .0 5

3 . T _{J M}

T _C

P _D

* Z _θ_{J C}(t)

0 .0 2

1 0 ⁰

0 .0 1

P_DM

t₁

s in g le pu ls e

t₂

1 0 ^-1

1 0^-4

1 0 ^-3

1 0 ^-2

1 0^-1

1 0 ⁰

1 0¹

1 0 ²

t₁, S q u a re W a v e P uls e D u ra tio n [s e c ]

Figure 11. Transient Thermal Response Curve

Rev. A, August 2000

Typical Characteristics : P-Channel (Continued)

10⁰

V_GS

10⁰

Top :

-10.0 V

-8.0 V

-6.0 V

-5.0 V

-4.5 V

-4.0 V

-3.5 V

℃

150

Bottom : -3.0 V

-1

℃

-55

※

Notes :

1. 250 s Pulse Test

※

Notes :

℃

2. T_C= 25

-2

1. V_DS= -25V

2. 250 s Pulse Test

-1

10⁰

10¹

-V_GS, Gate-Source Voltage [V]

-V_DS, Drain-Source Voltage [V]

Figure 1. On-Region Characteristics

Figure 2. Transfer Characteristics

10⁰

V_GS= - 5V

V_GS= - 10V

℃

150

※

Notes :

1. V_GS= 0V

※

℃

Note : T = 25

2. 250 s Pulse Test

-1

0.0

0.5

1.0

1.5

2.0

2.5

3.0

0.0

0.3

0.6

0.9

1.2

1.5

-I_D, Drain Current [A]

-V_SD, Source-Drain Voltage [V]

Figure 3. On-Resistance Variation vs.

Drain Current and Gate Voltage

Figure 4. Body Diode Forward Voltage

Variation vs. Source Current

and Temperature

250

200

150

100

_iss= C_gs+ C_gd(C_ds= shorted)

_oss= C_ds+ C_gd

_rss= C_gd

V_DS= -60V

iss

_DS= -150V

V_DS= -240V

C_oss

※

Notes :

1. V_GS= 0 V

2. f = 1 MHz

rss

※

Note : I_D= -0.3 A

-1

10⁰

10¹

Q_G, Total Gate Charge [nC]

V_DS, Drain-Source Voltage [V]

Figure 5. Capacitance Characteristics

Figure 6. Gate Charge Characteristics

Rev. A, August 2000

Typical Characteristics : P-Channel (Continued)

1.2

1.1

1.0

2.5

2.0

1.5

1.0

0.5

0.0

※Notes :

1. V_GS= 0 V

0.9

※

Notes :

1. V_GS= -10 V

2. I_D= -250

μ A

2. I_D= -0.15A

0.8

-100

-50

100

150

200

-50

100

150

200

T_J, Junction Temperature [^oC]

Figure 7. Breakdown Voltage Variation

vs. Temperature

Figure 8. On-Resistance Variation

vs. Temperature

10¹

0.35

0.30

0.25

0.20

0.15

0.10

0.05

0.00

Operation in This Area

is Limited by R _DS(on)

10⁰

1 ms

10 ms

100 ms

1 s

-1

10 s

-2

※

Notes :

1. T_C= 25 ^o

2. T_J= 150 ^o

3. Single Pulse

-3

10⁰

10¹

10²

100

125

150

℃

T_C, Case Temperature [

]

-V_DS, Drain-Source Voltage [V]

Figure 9. Maximum Safe Operating Area

Figure 10. Maximum Drain Current

vs. Case Temperature

D = 0 .5

0 .2

1 0 ¹

※

N o te s

1 . Z _θ_{J C}(t)

2 . D u ty F a c to r, D = t₁/t₂

0 .1

℃

/W M a x.

6 2 .5

0 .0 5

3 . T _{J M}

T _C

P _D

* Z _θ_{J C}(t)

0 .0 2

1 0 ⁰

0 .0 1

P_DM

t₁

s in g le pu ls e

t₂

1 0 ^-1

1 0^-4

1 0 ^-3

1 0 ^-2

1 0^-1

1 0 ⁰

1 0¹

1 0 ²

t₁, S q u a re W a v e P uls e D u ra tio n [s e c ]

Figure 11. Transient Thermal Response Curve

Rev. A, August 2000

Gate Charge Test Circuit & Waveform

V_GS

Same Type

50Kꢀ

as DUT

Q_g

12V

200nF

300nF

V_DS

V_GS

Q_gs

Q_gd

DUT

3mA

Charge

Resistive Switching Test Circuit & Waveforms

R_L

V_DS

90%

V_DS

V_DD

V_GS

R_G

10%

V_GS

DUT

t_d(on)

t_r

t_d(off)

t_f

t _on

t _off

Rev. A, August 2000

Package Dimensions

8-SOP

0.1~0.25

0.004~0.001

MIN

1.55 ±0.20

0.061 ±0.008

6.00 ±0.30

0.236 ±0.012

1.80

0.071

MAX

3.95 ±0.20

0.156 ±0.008

5.72

0.225

0.50 ±0.20

0.020 ±0.008

Rev. A, August 2000

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The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is

not intended to be an exhaustive list of all such trademarks.

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HiSeC™

SuperSOT™-8

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TinyLogic™

UHC™

Bottomless™

CoolFET™

CROSSVOLT™

E²CMOS™

FACT™

ISOPLANAR™

MICROWIRE™

POP™

PowerTrench^®

QFET™

VCX™

FACT Quiet Series™

QS™

FAST^®

Quiet Series™

SuperSOT™-3

SuperSOT™-6

FASTr™

GTO™

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when properly used in accordance with instructions for use

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2. A critical component is any component of a life support

device or system whose failure to perform can be

reasonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification

Product Status

Definition

Advance Information

Formative or In

Design

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

No Identification Needed

Obsolete

Full Production

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

Not In Production

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

Rev. A, January 2000

ON Semiconductor and

are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent

coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.

ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,

regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or

specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer

application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not

designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification

in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized

application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and

expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such

claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This

literature is subject to all applicable copyright laws and is not for resale in any manner.

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FQS4900TF [ONSEMI]

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