FR015L3EZ_技术文档

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is an Equal Opportunity/Afﬁrmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

October 2014

FR015L3EZ (15mΩ, -20V)

Low-Side Reverse Bias / Reverse Polarity Protector

Features

Description

.

Up to -20V Reverse-Bias Protection

Reverse bias is an increasingly common fault event that

may be generated by user error, improperly installed

Nano Seconds of Reverse-Bias Blocking

Response Time

batteries,

automotive

environments,

erroneous

connections to third-party chargers, negative “hot plug”

transients, inductive transients, and readily available

negatively biased rouge USB chargers.

.

+12V 24-Hour “Withstand” Rating

15mΩ Typical Series Resistance at 3.0V

18mΩ Typical Series Resistance at 2.1V

Integrated TVS Over Voltage Suppression

MicroFET2x2mm Package Size

RoHs Compliant

Fairchild circuit protection is proud to offer a new type of

reverse bias protection devices. The FR devices are low

resistance, series switches that, in the event of a

reverse bias condition, shut off power and block the

negative voltage to help protect downstream circuits.

The FR devices are optimized for the application to offer

best in class reverse bias protection and voltage

capabilities while minimizing size, series voltage drop,

and normal operating power consumption.

USB V_BUSCompatible

Applications

In the event of a reverse bias application, FR015L3EZ

devices effectively provide a full voltage block and can

easily protect -0.3V rated silicon.

.

3V+ Battery Operated Systems

Reverse Battery Protection

2 to 5 Cell Alkaline Battery Operated Systems

USB 1.0, 2.0 and 3.0 Devices

USB Charging

From a power perspective, in normal bias, a 15mΩ FR

device in a 0.1A application will generate only 1.5mV of

voltage drop or 0.15mW of power loss. In reverse bias,

FR devices dissipate less then 10µW in a 3V reverse

bias event. This type of performance is not possible with

a diode solution.

Mobile Devices

Mobile Medical

Benefits extend beyond the device. Due to low power

dissipation, not only is the device small, but heat sinking

requirements and cost can be minimized as well.

Toys

Any DC Barrel Jack Powered Device

Any DC Devices subject to Negative Hot Plug or

Inductive Transients

Ordering Information

Operating

Part Number Temperature

Range

Top

Mark

Package

Packing Method

6-Lead, Molded Leadless Package (MLP), Dual, 3000 on Tape & Reel;

-55°C ~ 125°C

FR015L3EZ

019L

Non-JEDEC, 2mm Square, Single-Tied DAP

7-inch Reel, 12mm Tape

FR015L3EZ • Rev. A2

www.fairchildsemi.com

1

Diagrams

CTL

Power

Switch

Startup Diode

Inrush Reducer

NEG

PO

OV Bypass

Protection

Figure 1. Block Diagram

Figure 2. Typical Schematic

Pin Configuration

Pin 1

CTL

NEG

POS

MicroFET 2x2 mm

Figure 3. Pin Assignments

Pin Definitions

Name

Description

The ground of the load circuit to be protected. Current flows into this pin during normal bias

operation.

POS

4

The control pin of the device. A positive voltage on this pin with regard to NEG pin turns the

switch on and a negative voltage turns the switch to a high impedance state.

CTL

3

The ground of the input power source. Current flows out of this pin during normal bias

operation.

NEG

1, 2, 5, 6

FR015L3EZ • Rev. A2

www.fairchildsemi.com

2

Absolute Maximum Ratings

Values are at T_A=25°C unless otherwise noted.

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be

operable above the recommended operating conditions and stressing the parts to these levels is not recommended.

In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.

The absolute maximum ratings are stress ratings only.

Symbol

Parameter

Value

Unit

Steady-State Normal Operating Voltage between CTL and NEG Pins

(V_IN= V+ _{MAX_OP}, I_IN= 1.5A, Switch On)

V+ _{MAX_OP}

+8

24-Hour Normal Operating Voltage Withstand Capability between CTL and

NEG Pins (V_IN= V+ ₂₄, I_IN= 1.5A, Switch On) ⁽¹⁾

V+ ₂₄

12

V

Steady-State Reverse Bias Standoff Voltage between CTL and NEG Pins

V- _{MAX_OP}

-20

(V_IN= V- _{MAX_OP}

)

I_IN

T_J

Input Current

V_IN= 3V, Continuous⁽²⁾(see Figure 4)

8

A

Operating Junction Temperature

T_A= 25°C⁽²⁾(see Figure 4)

T_A= 25°C⁽²⁾(see Figure 5)

150

2.4

°C

P_D

Power Dissipation

W

A

0.9

I_{DIODE_CONT}Steady-State Diode Continuous Forward Current from POS to NEG

I_{DIODE_PULSE}Pulsed Diode Forward Current from POS to NEG (300µs Pulse)

Human Body Model, JESD22-A114

2

190

2500

2000

5000

7000

300

3000

Charged Device Model, JESD22-C101

Electrostatic

Discharge

Capability

Contact

Air

ESD

POS is shorted to CTL

V

System Model,

IEC61000-4-2

Contact

Air

No external connection

between POS and CTL

Notes:

1. The V₊₂₄rating is NOT a survival guarantee. It is a statistically calculated survivability reference point taken on

qualification devices, where the predicted failure rate is less than 0.01% at the specified voltage for 24 hours. It is

intended to indicate the device’s ability to withstand transient events that exceed the recommended operating

voltage rating. Specification is based on qualification devices tested using accelerated destructive testing at

higher voltages, as well as production pulse testing at the V₊₂₄level. Production device field life results may vary.

Results are also subject to variation based on implementation, environmental considerations, and circuit

dynamics. Systems should never be designed with the intent to normally operate at V₊₂₄levels. Contact Fairchild

Semiconductor for additional information.

2. The device power dissipation and thermal resistance (R_θ) are characterized with device mounted on the following

FR4 printed circuit boards, as shown in Figure 4 and Figure 5

Figure 4. 1 Square Inch of 2-ounce copper

Figure 5. Minimum Pads of 2-ounce Copper

Thermal Characteristics

Symbol

R_θJA

Parameter

Value

60

Unit

Thermal Resistance, Junction to Ambient⁽²⁾(see Figure 4)

Thermal Resistance, Junction to Ambient⁽²⁾(see Figure 5)

°C/W

R_θJA

150

FR015L3EZ • Rev. A2

www.fairchildsemi.com

3

Electrical Characteristics

Values are at T_A= 25°C unless otherwise noted.

Symbol

Parameter

Conditions

Min. Typ. Max. Unit

Positive Bias Characteristics

V_IN= +1.7V, I_IN= 1.5A

V_IN= +2.1V, I_IN= 1.5A

V_IN= +3V, I_IN= 1.5A

V_IN= +5V, I_IN= 1.5A

22

18

15

14

30

25

20

19

R_ON

Device Resistance, Switch On

mꢀ

V_IN= +3V, I_IN= 1.5A,

T_J= 125°C

22

30

Input Voltage, V_IN, at which Voltage

at POS, V_POS, Reaches a Certain

Level at Given Current

V_ON

0.7

1.0

1.3

V

I

_IN= 100mA, V_POS= 50mV,

V_NEG= 0V

∆V_ON/ ∆T_J

Temperature Coefficient of V_ON

-1.7

mV/°C

A

I_{DIODE_CONT}

Continuous Diode Forward Current V_CTL= V_POS

2

V_CTL= V_POS, I_DIODE= 3A,

Pulse width < 300µs

V_F

Diode Forward Voltage

0.65

0.80

0.95

V

Bias Current Flowing out of NEG

Pin during Normal Bias Operation

V_CTL= 8V, V_NEG= 0V,

No Load

I_BIAS

10

µA

Negative Bias Characteristics

V- _{MAX_OP}

Reverse Bias Breakdown Voltage

-20

V

I_IN= -250µA, V_CTL= V_POS=0V

∆V- _{MAX_OP}

∆T_J

/

Reverse Bias Breakdown Voltage

Temperature Coefficient

16

mV/°C

V_NEG= 16V,

V_CTL= V_POS= 0V

Leakage Current from NEG to POS

in Reverse-Bias Condition

I-

1

µA

ns

V_NEG= 2.7V, V_CTL= 0V,

Time to Respond to Negative Bias

Condition

t_RN

C_LOAD= 10µF, Reverse Bias

50

Startup Inrush Current = 0.2A

Integrated TVS Performance

V_Z

Breakdown Voltage @ I_T

I_T= 1mA

12

13

2

14.5

10

V

V_CTL– V_POS= 8V

Leakage Current from CTL to POS,

NEG is Open

I_R

µA

V_CTL– V_POS= -8V

V_CTL> V_POS

-2

-10

0.6

Max Pulse

I_PPM

Current from

A

V

IEC61000-4-5

CTL to POS

V_CTL< V_POS

V_CTL> V_POS

V_CTL< V_POS

0.4

8x20µs pulse,

Clamping

Voltage form

CTL to POS

15.0

14.3

NEG is Open

V_C

Dynamic Characteristics

Input Capacitance between CTL

and NEG

C_I

900

133

V

_IN= 3V, V_NEG= V_POS= 0V,

Switch Capacitance between POS

and NEG

C_S

pF

f = 1MHz

Output Capacitance between CTL

and POS

C_O

R_C

967

2

Control Internal Resistance

ꢀ

FR015L3EZ • Rev. A2

www.fairchildsemi.com

4

Typical Characteristics

T_J= 25°C unless otherwise specified.

40

35

2.0

1.8

1.6

1.4

1.2

1.0

0.8

30

Input Voltage, V_IN= 1.7V

25

2.1V

3V

5V

20

15

10

0

4

8

12

16

20

0.0

0.5

1.0

1.5

2.0

2.5

3.0

I_IN, INPUT CURRENT (A)

Figure 6. Switch On Resistance vs. Switch Current

Figure 7. Minimum Input Voltage to Turn On Switch

vs. Current at 50mV Switch Voltage Drop

1.0

24

T_J= 25^oC

I_IN= 0.1A

21

0.8

I_IN= 0.1A

18

V_IN= 3V

0.6

0.9A

15

0.4

12

8V

1.5A

0.2

9

0.0

0.5

6

-75 -50 -25

0

25

50 75 100 125 150

2.0

3.5

5.0

6.5

8.0

T_J, JUNCTION TEMPERATURE (^oC)

V_IN, INPUT VOLTAGE (V)

Figure 8. Effective Switch Resistance R_SWvs.

Input Voltage V_IN

Figure 9. Switch On Resistance vs. Junction

Temperature at 0.1A

24

100

10

1

I_IN= 1.5A

21

18

V_IN= 3V

15

8V

12

9

6

0.1

1E-3

0.01

0.1

1

10

100

1000

-75 -50 -25

0

25 50 75 100 125 150

T_J, JUNCTION TEMPERATURE (^oC)

t, PULSE WIDTH (s)

Figure 10. Switch On Resistance vs. Junction

Temperature at 1.5A

Figure 11. Single-Pulse Maximum Power vs. Time

FR015L3EZ • Rev. A2

www.fairchildsemi.com

5

(Continued)

Typical Characteristics

T_J= 25°C unless otherwise specified.

100

V_POS= V_CTL= 0V

10

T_J= 125^oC

1

0.1

25^oC

-55^oC

0.01

1E-3

0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1

V_F, STARTUP DIODE FORWARD VOLTAGE (V)

Figure 12. Startup Diode Current vs. Forward Voltage

www.fairchildsemi.com

FR015L3EZ • Rev. A2

6

Application Test Configurations

Figure 13. Startup Test Circuit – Normal Bias with FR015L3EZ Device

Figure 14. Startup Test Circuit – Reverse Bias with FR015L3EZ Device

FR015L3EZ • Rev. A2

www.fairchildsemi.com

7

Application Test Configurations

Figure 15. Startup Test Circuit – No Reverse Polarity Protection

Typical Application Waveforms

─ V_IN, 2V/div. The input voltage between CTL and NEG

─ V_OUT, 2V/div. The output voltage between CTL and POS

─ V_D, 1V/div. The startup diode voltage between POS and NEG

─ i_IN, 5A/div. The input current flowing out of NEG

Time: 2µs/div

Figure 16. Normal Bias Startup Waveform, V_IN=3V, V₁=3V, C₁=5200µF, C₂=C₃=10µF, R₁=R₂=33kꢀ, R₃=2ꢀ

FR015L3EZ • Rev. A2

www.fairchildsemi.com

8

Typical Application Waveforms (Continued)

─ V_IN, 5V/div. The input voltage between CTL and NEG

─ V_D, 5V/div. The startup diode voltage between POS and NEG

─ V_OUT, 0.5V/div. The output voltage between CTL and POS

Time: 100ns/div

Figure 17. Reverse Bias Startup Waveform, V_IN=3V, V₁=3V, C₁=5200µF, C₂=C₃=10µF, R₁=R₂=33kꢀ, R₃=2ꢀ

─ V_IN, 1V/div. The voltage applied on the load circuit

─ i_IN, 10A/div. The input current

Time: 2µs/div

Figure 18. Startup Waveform without FR015L3EZ Device, V_IN=3V, V₁=3V, C₁=5200µF, C₂=C₃=10µF,

R₁=R₂=33kꢀ, R₃=2ꢀ

FR015L3EZ • Rev. A2

www.fairchildsemi.com

9

Application Information

The FR015L3EZ is capable of being turned on at a

voltage as low as 1.5V, therefore is especially suitable

for low voltage application like AA, AAA or single

lithium-ion battery operated devices. The voltage and

current waveforms in Figure 16 and Figure 18 are both

captured with a 2ꢀ load at 3V input.

Figure 16, while the reverse bias protector is present,

the input voltage, V_IN, and the output voltage, V_O, are

separated and look different. When this reverse bias

protector is removed, V_INand V_Omerge, as shown in

Figure 18 as V_IN. This V_INis also the voltage applied to

the load circuit. It can be seen that, with reverse bias

protection, the voltage applied to the load and the

current flowing into the load look very much the same as

without reverse bias protection.

When the DC power source is connected to the circuit

(refer to Figure 1 and Figure 2), the built-in startup diode

initially conducts the current such that the load circuit

powers up. Due to the initial diode voltage drop, the

FR015L3EZ effectively reduces the peak inrush current

of a hot plug event. Under these test conditions, the

input inrush current reaches about 19A peak. While the

current flows, the input voltage increases. The speed of

this input voltage increase depends on the time constant

formed by the load resistance R₃and load capacitance

C₃, assuming the input voltage source holds itself during

turn on. The larger the time constant, the slower the

input voltage increase. As the input voltage approaches

a level equal to the protector’s turn-on voltage, V_ON, the

protector turns on and operates in Low-Resistance

Mode as defined by V_INand operating current I_IN.

In Figure 16, negative voltage spikes are seen on V_IN

and V_Dbefore V_INstarts to rise from 0; and in both

Figures 16 and 18, negative input current is seen after

FR015L3EZ is fully turned on. These phenomena are a

combined effect of parasitic inductance and all the

capacitors in the input voltage control circuit enclosed in

the broken line as shown in Figures 13 to 15. This is not

a problem as long as the load circuit doesn’t see a

negative voltage at anytime, which is what the reverse

bias protector is meant for. Indeed, we can see from

Figures 16 and 18, the output voltage on the load circuit

is always equal to or greater than 0V.

In the event of a negative voltage transient between

CTL and NEG, or when the DC power source, V_IN, is

reversely connected to the circuit, while no residual

voltage presents between CTL and POS, the device

blocks the flow of current and holds off the voltage,

thereby protecting the load circuit. Figure 17 shows the

startup waveforms while a passive load circuit is

reversely biased. It can be clearly seen that the output

voltage is near 0 or at a level that is harmless to the

load circuit.

Benefits of Reverse Bias Protection

The most important benefit is, of course, to prevent

accidently reverse-biased voltage from damaging the

load circuit. Another benefit is that the peak startup

inrush current can be reduced. How fast the input

voltage rises, the input/output capacitance, the input

voltage, and how heavy the load is determine how much

the inrush current can be reduced. In this specific 3V /

2A application, for example, the inrush current has been

reduced from 24A to 19A, a 21% reduction. This can

offer a system designer the option of increasing C₃while

keeping “effective” load circuit capacitance down.

Figure 18 shows the voltage and current waveforms

when no reverse bias protection is implemented. In

FR015L3EZ • Rev. A2

www.fairchildsemi.com

10

ON Semiconductor and

are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent

coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.

ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,

regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or

specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer

application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not

designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification

in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized

application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and

expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such

claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This

literature is subject to all applicable copyright laws and is not for resale in any manner.

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1


型号：	FR015L3EZ
厂家：	ONSEMI
描述：	低压侧逆向偏置/逆向极性保护器
文件：	总13页 (文件大小：674K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

FR015L3EZ [ONSEMI]

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