FSA1208BQX [ONSEMI]

低功耗,八端口,高速隔离开关;
FSA1208BQX
型号: FSA1208BQX
厂家: ONSEMI    ONSEMI
描述:

低功耗,八端口,高速隔离开关

开关 输出元件
文件: 总10页 (文件大小:637K)
中文:  中文翻译
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Is Now  
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www.onsemi.com  
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FSA1208  
Low-Power, Eight-Port, High-Speed Isolation Switch  
Features  
Description  
.
.
.
.
Low On Capacitance: 6 pF Typical  
The FSA1208 is a low -pow er, eight-port, high-speed  
sw itch. This part is configured as a single-pole, single-  
throw sw itch and is optimized for isolating a high-  
speed source, such as a DDR memory bus. The  
FSA1208 features an extremely low on capacitance  
(CON) of 6 pF Superior channel-to-channel crosstalk  
minimizes interference.  
Low On Resistance: 15 Typical  
Low Pow er Consumption: 1 A Maximum  
10 μA Maximum ICCT over an Expanded Voltage  
Range (VIN=2.3 V, VCC=4.3 V)  
.
.
Wide -3 dB Bandw idth: > 400 MHz  
The FSA1208 contains special circuitry on the A & B  
pins that allow s the device to w ithstand an over-voltage  
condition. This device is also designed to minimize  
current consumption even w hen the control voltage  
applied to the /OE pin is low er than the supply voltage  
(VCC). Applications include port isolation and sw itching  
in DDR memory modules, portable cell phones, PDAs,  
digital cameras, printers, and notebook computers.  
Packaged in Space-Saving 20-Lead MLP  
(2.5 x 4.5 mm)  
.
.
7.5 kV ESD Rating; >16 kV Pow er/GND ESD  
Rating  
Low COFF Capacitance: 2.5 pF Typical  
Applications  
.
DIMM DDR Memory  
Ordering Information  
Operating  
Temperature Range  
Part Number Top Mark  
Package  
20-Lead, Quad, Molded Leadless Package  
(MLP), 2.5 x 4.5 mm  
FSA1208BQX  
F1208  
-40 to +85°C  
DIMM  
OE  
VCC  
DIMM  
DIMM Slot  
Figure 1. Analog Symbol  
© 2008 Semiconductor Components Industries, LLC  
October-2017, Rev. 2  
Publication Order Number:  
FSA1208/D  
Pin Configurations  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
19  
18  
17  
16  
15  
14  
13  
12  
/OE  
NC  
GND  
20  
1
11  
10  
VCC  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
2
3
4
5
6
7
8
9
Figure 2. Pin Assignments for MLP (Top Through View)  
Pin Definitions  
Pin #  
20  
Name  
/OE  
Description  
Sw itch Enable  
A Side of Bus  
B Side of Bus  
No Connection  
Pow er  
2-9  
12-19  
11  
A1-A8  
B8-B1  
NC  
1
VCC  
10  
GND  
Ground  
Truth Table  
/OE  
Function  
HIGH  
LOW  
Disconnect  
A1-A8=B1-B8  
www.onsemi.com  
2
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be  
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.  
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.  
The absolute maximum ratings are stress ratings only.  
Symbol  
VCC  
Parameter  
Min.  
-0.50  
-0.50  
-0.50  
-50  
Max.  
+5.25  
VCC  
Unit  
V
Supply Voltage  
VCNTRL  
VSW  
DC Input Voltage (/OE)(1)  
DC Sw itch I/O Voltage(1)  
DC Input Diode Current  
DC Output Current  
V
5.25  
V
I
IK  
mA  
mA  
°C  
IOUT  
50  
+150  
7.5  
TSTG  
Storage Temperature  
-65  
All Pins  
Human Body Model, JEDEC: JESD22-A114 I/O to GND  
Pow er to GND  
8
16  
2
ESD  
kV  
Charged Device Model, JEDEC: JESD22-C101  
Note:  
1. The input and output negative ratings may be exceeded if the input and output diode current ratings are  
observed.  
Recommended Operating Conditions  
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended  
operating conditions are specified to ensure optimal performance to the datasheet specifications. ON Semiconductor  
does not recommend exceeding them or designing to Absolute Maximum Ratings.  
Symbol  
Parameter  
Min.  
2.3  
0
Max.  
4.3  
Unit  
V
VCC  
Supply Voltage  
(2)  
VCNTRL  
Control Input Voltage (S, /OE)  
Sw itch I/O Voltage  
VCC  
VCC  
+85  
V
VSW  
TA  
-0.5  
-40  
V
Operating Temperature  
°C  
Note:  
2. The control input must be held HIGH or LOW; it must not float.  
www.onsemi.com  
3
 
 
DC Electrical Characteristics  
All typical values are at 25°C unless otherw ise specified.  
TA=- 40ºC to +85ºC  
Min. Typ. Max.  
Symbol  
Parameter  
Conditions  
VCC (V)  
Units  
VIK  
VIH  
Clamp Diode Voltage  
Input Voltage High  
I =-18 mA  
IN  
2.5  
2.3 to 3.6  
4.3  
-1.2  
V
V
V
V
V
1.3  
1.7  
0.5  
0.7  
2.3 to 3.6  
4.3  
VIL  
Input Voltage Low  
I
Control Input Leakage  
Off State Leakage  
VSW=0 to VCC  
4.3  
4.3  
-1  
-2  
1
2
µA  
µA  
IN  
IOZ  
0 A, B 3.6 V  
VSW=0 V, ION=-10 mA  
Figure 3  
2.5  
7
  
RON  
Sw itch On Resistance(3)  
Quiescent Supply Current  
VSW=1.8 V, ION=-10 mA  
Figure 3  
2.5  
4.3  
15  
  
ICC  
VIN=0 or VCC, IOUT=0  
1
µA  
Increase in ICC Current Per  
Control Voltage and VCC  
ICCT  
VIN=1.8 V  
2.7  
10  
µA  
Note:  
3. Measured by the voltage drop betw een A and B pins at the indicated current through the sw itch.  
On resistance is determined by the low er of the voltage on the tw o (A or B ports).  
AC Electrical Characteristics  
All typical values are for VCC=2.5 V at 25°C unless otherw ise specified.  
TA=- 40ºC to +85ºC  
Min. Typ. Max.  
Symbol  
Parameter  
Conditions  
VCC (V)  
2.3 to 3.6  
2.3 to 3.6  
Units  
ns  
RL=50 Ω, CL=5 pF  
VSW=1.8 V  
Figure 4, Figure 5  
ton  
Turn-On Time, /OE to Output  
Turn-Off Time, /OE to Output  
15  
12  
34  
25  
RL=50 Ω, CL=5 pF  
VSW=1.8 V  
tuff  
ns  
Figure 4, Figure 5  
RL=50 , CL=5 pF  
Figure 4, Figure 6  
tad  
Propagation Delay(4)  
Off Isolation  
3.3  
0.35  
-40  
ns  
dB  
RL=50 , f=400 MHz  
Figure 11  
OIRR  
Xtalk  
2.3 to 3.6  
2.3 to 3.6  
Non-Adjacent Channel  
Crosstalk  
RL=50 Ω, f=100 MHz  
Figure 12  
-40  
dB  
RL=50 Ω, CL=0 pF  
Figure 10  
1000  
750  
MHz  
MHz  
BW  
-3dB Bandw idth  
2.3 to 3.6  
RL=50 Ω, CL=5 pF  
Figure 10  
Note:  
4. Guaranteed by characterization.  
www.onsemi.com  
4
 
 
High-Speed-Related AC Electrical Characteristics  
TA=- 40ºC to +85ºC  
Min. Typ. Max.  
Symbol  
Parameter  
Conditions  
VCC (V)  
Units  
tSK(O)  
tSK(P)  
Channel-to-Channel Skew (5)  
CL=5 pF  
3.3  
3.3  
3.3  
40  
15  
60  
80  
40  
ps  
ps  
ps  
Skew of Opposite Transitions  
of the Same Output(5)  
CL=5 pF  
CL=5 pF  
tSK(PKG)  
Package-to-Package Skew (5)  
100  
Note:  
5. Guaranteed by characterization.  
Capacitance  
TA=- 40ºC to +85ºC  
Min. Typ. Max.  
2.0  
Symbol  
Parameter  
Conditions  
Units  
C
IN  
Control Pin Input Capacitance  
D+/D- On Capacitance  
VCC=0.2 V, f=1 MHz  
VCC=2.5 V, /OE=0 V, f=1 MHz  
Figure 9  
CON  
6.0  
2.5  
pF  
VCC and /OE=2.5 V, f=1 MHz  
Figure 8  
COFF  
D1n, D2n Off Capacitance  
www.onsemi.com  
5
 
Test Diagrams  
VON  
A
n
Bn  
V
SW  
ION  
GND  
/O  
GND  
V
cc  
Sel= 0 rV  
R
=
/ ION  
O
O
Figure 3. On Resistance  
A
n
tRISE= 2.5ns  
tFALL = 2.5ns  
Bn  
C
V
SW  
V
CC  
VOUT  
R
R
GND  
S
90%  
CC /2  
90%  
CC /2  
L
L
InputV/OE, V  
Sel  
V
V
GND  
10%  
10%  
90%  
GND  
V
Sel  
V
OH  
90%  
GND  
Output- V  
OUT  
RL , R , and CL are functions of the application  
S
VOL  
tON  
tOFF  
environment (see AC tables for specific values).  
CL includes test fixture and stray capacitance.  
Figure 4. AC Test Circuit Load  
Figure 5. Turn-On / Turn-Off Waveforms  
tRISE= 500ps  
tFALL = 500ps  
+400mV  
-400mV  
90%  
0V  
90%  
10%  
10%  
Output  
tPHL  
tPLH  
Figure 6. Propagation Delay  
Figure 7. Intra-Pair Skew Test tSK(P)  
(try to 500ps)  
A
n
A
Capacitance  
Meter  
n
/OE  
/OE  
Capacitance  
Meter  
V
= 0 or V  
cc  
Sel  
= 0 or V  
cc  
V
Sel  
B
n
B
n
Figure 8. Channel Off Capacitance  
Figure 9. Channel On Capacitance  
www.onsemi.com  
6
Test Diagrams (Continued)  
Network Analyzer  
RS  
VIN  
V
GND  
S
GND  
VOUT  
V
Sel  
GND  
GND  
RT  
GND  
RS and RT are functions of the application  
environment (see AC Tables for specific values).  
Figure 10. Bandwidth  
Network Analyz r  
R
S
V
IN  
GND  
V
S
R
T
GND  
OUT  
V
GND  
Sel  
V
GND  
GND  
R
T
R andRT ar functions of theapplication  
S
GND  
environment (seeAC tables for specific Values).  
Off isolation = 20 Log (VOUT/ VIN)  
Figure 11. Channel Off Isolation  
Network Analyz r  
N
R
S
V
IN  
GND  
V
S
GND  
V
Sel  
GND  
R
T
GND  
V
OUT  
GND  
R
T
RS and RT ar functions of theapplication environment  
(seeAC tables for specific values).  
GND  
Crosstalk = 20Log(VOUT / V )  
IN  
Figure 12. Non-Adjacent Channel-to-Channel Crosstalk  
www.onsemi.com  
7
Physical Dimensions  
Figure 13. 20-Lead, Molded Leadless Package (MLP)  
www.onsemi.com  
8
ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the  
United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A  
listing of ON Semiconductor’s product/patent coverage maybe accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make  
changes without further notice to anyproducts herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitabilityof its products for any  
particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of anyproduct or circuit, and specificallydisclaims anyand all  
liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor  
products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by  
ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do varyin different applications and  
actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application bycustomer’s technical experts.  
ON Semiconductor does not conveyanylicense under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for  
use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or  
any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized  
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs,  
damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or  
unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in anymanner.  
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9

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