FSA2467UMX [ONSEMI]

0.4Ω 低电压双 DPDT 模拟开关;
FSA2467UMX
型号: FSA2467UMX
厂家: ONSEMI    ONSEMI
描述:

0.4Ω 低电压双 DPDT 模拟开关

开关 光电二极管 输出元件
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中文:  中文翻译
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March 2013  
FSA2467  
0.4Ω Low-Voltage Dual DPDT Analog Switch  
Features  
Description  
.
.
Typical 0.4On Resistance (RON) for +2.7V Supply  
The FSA2467 is a dual Double-Pole, Double-Throw  
(DPDT) analog switch. The FSA2467 operates from a  
single 1.65V to 4.3V supply. The FSA2467 features an  
ultra-low on resistance of 0.4at a +2.7V supply and  
25°C. This device is fabricated with sub-micron CMOS  
technology to achieve fast switching speeds and is  
designed for break-before-make operation.  
Features Less then12µA ICCT Current when Sn  
Input is Lower than VCC  
.
.
.
.
.
0.25Maximum RON Flatness for +2.7V Supply  
3 x 3mm 16-Lead MLP Package  
1.8x2.6mm 16-Lead UMLP Package  
Broad VCC Operating Range  
FSA2467 features very low quiescent current even when  
the control voltage is lower than the VCC supply. This  
feature allows mobile handset applications direct  
interface with baseband processor general-purpose  
I/Os.  
Low THD (0.02% Typical for 32Load)  
Applications  
.
.
.
Cell Phone  
PDA  
Portable Media Player  
Ordering Information  
Part Number  
FSA2467MPX  
FSA2467UMX  
Package Description  
Top Mark  
FSA  
2467  
16-lead Molded Leadless Package (MLP), JEDEC MO-220, 3 x 3mm Square  
16-lead Ultrathin Molded Leadless Package (UMLP), 1.8 x 2.6mm  
GC  
Application Diagram  
Figure 1. Application Diagram  
© 2005 Fairchild Semiconductor Corporation  
FSA2467 Rev. 1.0.8  
www.fairchildsemi.com  
Pin Assignments  
1B1  
15  
4B0  
13  
1A  
16  
VCC  
14  
12  
11  
10  
9
1B0  
1S  
1
2
4A  
4B1  
2S  
3
4
2B1  
2A  
3B0  
5
6
7
8
2B0  
GND  
3B1  
3A  
Figure 2. MLP (Top Through View)  
Figure 3. UMLP (Top View)  
Truth Table  
Control Inputs  
Pin Descriptions  
Name  
Function  
Function  
Data Ports  
LOW  
HIGH  
nB0 Connected to nA  
nB1 Connected to nA  
nAnB0nB1  
nS  
Control Input  
Analog Symbol  
Figure 4. Analog Symbol  
© 2005 Fairchild Semiconductor Corporation  
FSA2467 Rev. 1.0.8  
www.fairchildsemi.com  
2
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be  
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.  
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.  
The absolute maximum ratings are stress ratings only.  
Symbol  
VCC  
VS  
Parameter  
Min.  
-0.5  
-0.5  
-0.5  
-50  
Max.  
5.0  
Unit  
V
Supply Voltage  
Switch Voltage  
Input Voltage  
VCC+0.3  
5.0  
V
VIN  
V
IIK  
Input Diode Current  
Switch Current  
mA  
mA  
mA  
ºC  
ºC  
ºC  
ISW  
350  
500  
ISWPEAK  
TSTG  
TJ  
Peak Switch Current (Pulsed at 1ms duration, <10% Duty Cycle)  
Storage Temperature Range  
-65  
+150  
+150  
+260  
Junction Temperature  
TL  
Lead Temperature, Soldering 10 Seconds  
Human Body Model,  
Electrostatic Discharge Capability  
JESD22-A114  
ESD  
5.5  
kV  
Recommended Operating Conditions  
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended  
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not  
recommend exceeding them or designing to Absolute Maximum Ratings.  
Symbol  
VCC  
Parameter  
Min.  
1.65  
0
Max.  
4.30  
VCC  
Unit  
V
Supply Voltage  
VIN  
Control Input Voltage(1)  
Switch Input Voltage  
Operating Temperature  
V
Vs  
0
VCC  
V
TA  
-40  
+85  
ºC  
Note  
1. Unused inputs must be held HIGH or LOW. They may not float.  
© 2005 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSA2467 Rev. 1.0.8  
3
 
DC Electrical Characteristics  
Typical values are at 25ºC unless otherwise specified.  
TA = -40 to  
+85ºC  
TA = +25ºC  
Symbol  
Parameter  
Condition  
VCC (V)  
Unit  
Min. Typ. Max. Min Max.  
4.3  
1.4  
2.7 to 3.6  
2.3 to 2.7  
1.3  
1.1  
VIH  
Input Voltage High  
V
1.65 to 1.95  
4.3  
0.9  
0.7  
2.7 to 3.6  
2.3 to 2.7  
0.5  
0.4  
VIL  
Input Voltage Low  
V
1.65 to 1.95  
1.65 to 4.30  
0.4  
IIN  
Control Input Leakage VIN=0V to VCC  
nA=0.3V, VCC-0.3V  
-0.5  
-50  
0.5  
50  
μA  
nA  
INO(OFF)  
INC(OFF)  
Off Leakage Current of  
Port nB0 and nB1  
1.95 to 4.30  
1.95 to 4.30  
-10  
-10  
10  
10  
nB0 or nB1=0.3V, VCC  
0.3V or floating  
-
-
nA=0.3V,VCC-0.3V  
On Leakage Current of  
Port A  
IA(ON)  
-50  
50  
nA  
nB0 or nB1=0.3V, VCC  
0.3V or Floating  
IOUT=100mA  
4.3  
2.7  
0.4  
0.4  
0.6  
0.6  
nB0 or nB1=0V,0.8V,  
1.8V,2.7V  
Switch On  
RON  
Ω
Ω
Resistance(2)  
IOUT=100mA, nB0 or  
nB1=0V,0.7V, 1.2V, 2.3V  
2.3  
0.55  
0.95  
IOUT=100mA, nB0 or  
nB1=1.0V  
1.8  
2.7  
2.3  
0.8  
2.0  
IOUT=100mA, nB0 or  
nB1=0.8V  
0.04  
0.03  
0.10  
0.10  
On Resistance  
Matching Between  
Channels(3)  
ΔRON  
IOUT=100mA, nB0 or  
nB1=0.7V  
2.7  
2.3  
0.25  
0.3  
On Resistance  
Flatness(4)  
IOUT=100mA, B0 or  
nB1=0V to VCC  
Ω
RFLAT(ON)  
Quiescent Supply  
Current  
ICC  
VIN=0V to VCC IOUT=0V  
4.3  
-100  
100  
-500  
500  
nA  
VIN=1.8V  
VIN=2.6V  
4.3  
4.3  
7
3
12  
6
15  
7
Increase in ICC Current  
per Control Voltage  
ICCT  
μA  
Notes:  
2. On resistance is determined by the voltage drop between A and B pins at the indicated current through the switch.  
3. RON=RON max RON min measured at identical VCC, temperature and voltage.  
4. Flatness is defined as the difference between the maximum and minimum value of on resistance over the  
specified range of conditions.  
© 2005 Fairchild Semiconductor Corporation  
FSA2467 Rev. 1.0.8  
www.fairchildsemi.com  
4
 
 
AC Electrical Characteristics  
Typical values are at 25ºC unless otherwise specified.  
TA = -40 to  
+85ºC  
TA = +25ºC  
Symbol  
Parameter  
Condition  
VCC  
Unit  
Figure  
Min. Typ.  
Max.  
Min. Max.  
nB0 or nB1=1.5V  
3.6 to 4.3  
50  
60  
tON  
Turn-On Time  
ns  
Figure 8  
RL=50Ω, CL=35pF  
2.7 to 3.6  
2.3 to 2.7  
3.6 to 4.3  
2.7 to 3.6  
65  
80  
32  
42  
75  
90  
40  
50  
nB0 or nB1=1.5V  
RL=50Ω, CL=35pF  
tOFF  
Turn-Off Time  
ns  
ns  
Figure 8  
Figure 9  
2.3 to 2.7  
3.6 to 4.3  
52  
60  
nB0 or nB1=1.5V  
12  
Break-Before-  
Make Time  
tBBM  
RL=50Ω, CL=35pF  
2.7 to 3.6  
2.3 to 2.7  
15  
20  
CL=100pF,  
VGEN=0V, RGEN=0Ω  
3.6 to 4.3  
2.7 to 3.6  
2.3 to 2.7  
15  
10  
8
CL=100pF,  
VGEN=0V, RGEN=0Ω  
Q
Charge Injection  
Off Isolation  
pC  
Figure 11  
CL=100pF,  
VGEN=0V, RGEN=0Ω  
3.6 to 4.3  
2.7 to 3.6  
2.3 to 2.7  
-75  
-75  
-75  
f=100KHz,  
RL=50Ω,CL=5pF  
OIRR  
dB  
dB  
Figure 10  
Figure 10  
3.6 to 4.3  
2.7 to 3.6  
2.3 to 2.7  
2.3 to 4.3  
-75  
-75  
-75  
85  
f=100KHz, RL=50Ω,  
CL=5pF  
Xtalk  
BW  
Crosstalk  
-3dB Bandwidth  
RL=50Ω  
MHZ Figure 13  
RL=32Ω, VIN=2VPP  
f=20 to 20kHZ  
,
,
,
3.6 to 4.3  
2.7 to 3.6  
2.3. to 2.7  
0.02  
0.02  
0.02  
Total Harmonic  
Distortion  
RL=32Ω, VIN=2VPP  
f=20 to 20kHZ  
THD  
%
Figure 14  
RL=32Ω, VIN=2VPP  
f=20 to 20kHZ  
Capacitance  
Symbol  
Parameter  
Condition  
VCC  
TA = +25ºC Typical  
Unit  
Figure  
CIN  
COFF  
CON  
Control Pin Input Capacitance  
B Port Off Capacitance  
A Port On Capacitance  
f=1MHZ  
f=1MHZ  
f=1MHZ  
0
1.5  
32  
pF  
pF  
pF  
Figure 8  
Figure 8  
Figure 8  
3.3  
3.3  
118  
© 2005 Fairchild Semiconductor Corporation  
FSA2467 Rev. 1.0.8  
www.fairchildsemi.com  
5
Typical Applications  
Figure 5. RON at 2.7V VCC  
Figure 6. RON at 2.3V VCC  
Figure 7. RON at 1.8V VCC  
© 2005 Fairchild Semiconductor Corporation  
FSA2467 Rev. 1.0.8  
www.fairchildsemi.com  
6
AC Loadings and Waveforms  
Figure 8. Turn-On / Turn-Off Timing  
Figure 9. Break-Before-Make Timing  
Figure 10. Off Isolation and Crosstalk  
© 2005 Fairchild Semiconductor Corporation  
FSA2467 Rev. 1.0.8  
www.fairchildsemi.com  
7
AC Loadings and Waveforms (Continued)  
Figure 11. Charge Injection  
Figure 12. On / Off Capacitance Measurement Setup  
Figure 13. Bandwidth  
Figure 14. Harmonic Distortion  
© 2005 Fairchild Semiconductor Corporation  
FSA2467 Rev. 1.0.8  
www.fairchildsemi.com  
8
Package Dimensions  
Figure 15. 16-Lead, Molded Leadless Package (MLP), JEDEC MO-220 3x3mm Square  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,  
specifically the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/.  
For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:  
http://www.fairchildsemi.com/packaging/3x3MLP16_Pack_TNR.pdf.  
© 2005 Fairchild Semiconductor Corporation  
FSA2467 Rev. 1.0.8  
www.fairchildsemi.com  
9
Package Dimensions  
2.10  
0.563(15X)  
0.10  
C
1.80  
A
B
0.663  
0.40  
2X  
1
2.60  
2.90  
PIN#1 IDENT  
0.10  
C
TOP VIEW  
0.225  
(16X)  
2X  
RECOMMENDED  
LAND PATTERN  
0.55 MAX.  
0.152  
0.10 C  
0.08  
C
TERMINAL SHAPE VARIANTS  
SEATING  
PLANE  
C
0.05  
0.00  
0.40  
0.60  
SIDE VIEW  
0.30  
0.50  
0.15  
0.25  
0.15  
0.25  
0.10  
15X  
15X  
0.45  
0.10  
0.35  
PIN 1  
NON-PIN 1  
5
Supplier 1  
9
0.40  
0.30  
0.50  
0.15  
0.25  
0.15  
15X  
0.25  
0.30  
0.50  
15X  
1
PIN 1  
NON-PIN 1  
PIN#1 IDENT  
Supplier 2  
13  
16  
0.25  
0.15  
0.55  
0.45  
0.10 C  
0.05 C  
A B  
BOTTOM VIEW  
R0.20  
PACKAGE  
EDGE  
NOTES:  
A. PACKAGE DOES NOT FULLY CONFORM TO  
JEDEC STANDARD.  
LEAD  
OPTION 2  
SCALE : 2X  
LEAD  
OPTION 1  
SCALE : 2X  
B. DIMENSIONS ARE IN MILLIMETERS.  
C. DIMENSIONS AND TOLERANCES PER  
ASME Y14.5M, 1994.  
D. LAND PATTERN RECOMMENDATION IS  
BASED ON FSC DESIGN ONLY.  
E. DRAWING FILENAME: MKT-UMLP16Arev4.  
F. TERMINAL SHAPE MAY VARY ACCORDING  
TO PACKAGE SUPPLIER, SEE TERMINAL  
SHAPE VARIANTS.  
Figure 16. 16-Lead, Ultrathin Molded Leadless Package (UMLP)  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,  
specifically the warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/.  
© 2005 Fairchild Semiconductor Corporation  
FSA2467 Rev. 1.0.8  
www.fairchildsemi.com  
10  
© 2005 Fairchild Semiconductor Corporation  
FSA2467 Rev. 1.0.8  
www.fairchildsemi.com  
11  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent  
coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.  
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,  
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not  
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification  
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized  
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and  
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such  
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This  
literature is subject to all applicable copyright laws and is not for resale in any manner.  
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