FSA806UMX [ONSEMI]

USB2.0 高速,UART,音频开关,带负信号能力;
FSA806UMX
型号: FSA806UMX
厂家: ONSEMI    ONSEMI
描述:

USB2.0 高速,UART,音频开关,带负信号能力

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July 2012  
FSA806 — USB2.0 High-Speed (480Mbps), UART, and  
Audio Switch with Negative Signal Capability  
Features  
Description  
The FSA806 is a 3:1 USB accessory switch that enables  
USB data, stereo and mono audio, and UART data to  
.
3:1 Switch Handles:  
-
-
-
Audio Headsets  
UART  
Up to Two High- and Low-Speed USB Data  
share  
a common connector port. Two ports are  
designed for high-speed USB 2.0 signaling, while also  
capable of full speed USB and UART communication.  
The architecture is designed to allow audio signals to  
swing below ground so a common USB and headphone  
jack can be used for personal media players and  
portable peripheral devices.  
.
.
Negative-Swing-Capable Audio Channel  
Built-in Termination Resistors for Audio Pop  
Reduction  
The FSA806 meets both USB Rev. 2.0 and micro-USB  
specifications.  
.
Simple Switch Control Using Two Select Pins  
Applications  
.
Cell Phones, MP3 Players, PDAs  
Ordering Information  
Operating Temperature  
Part Number  
Top Mark  
Package  
Range  
12-Lead Quad, 1.8 x 1.8mm Ultrathin Molded  
Leadless Package (UMLP)  
FSA806UMX  
-40 to +85°C  
KN  
VCC  
FSA806  
R_HOS  
L_HOS  
R
3:1  
MUX  
and  
Charge  
Pump  
DP_HOST  
DM_HOST  
DP_CO  
DM_CO  
GN  
DP_HOST  
DM_HOS  
SEL[0  
SEL[1  
Switc  
Contro  
Figure 1. Functional Block Diagram  
© 2010 Fairchild Semiconductor Corporation  
FSA806 • Rev. 1.0.1  
www.fairchildsemi.com  
Application Diagram  
Baseband  
Processor  
VCC  
FSA806  
mini/micro  
US  
R_HOST  
L_HOST  
Audio  
Codec  
VBU  
ID  
R
3:1  
MUX  
and  
DP_HOST2  
DM_HOST2  
HS USB /  
FS USB  
DP_CON  
Charge  
Pump  
DM_CON  
GND  
DP_HOST1  
DM_HOST1  
HS USB /  
FS USB  
SEL[0]  
SEL[1]  
Switch  
Control  
Figure 2. Typical Application  
Functional Description  
The FSA806 USB2.0 accessory switch is designed to  
consolidate wired accessories for portable devices, such  
as cellular telephones and portable audio players. The  
benefits of consolidation include reduced space  
requirements from a reduction of connectors and their  
size. The micro-USB connector, for example, reduces  
connector height and depth, allowing for slimmer overall  
designs. Using the USB industry standard and a common  
connector type, for accessories such as chargers and  
headsets, greatly reduces the waste associated with new  
phone purchases by allowing re-use of the accessories.  
Applications with Multiple USB Controllers  
When operating with two USB controllers, it is  
recommended to configure the switches to OPEN before  
switching to the other (second) USB interface. The  
OPEN setting duration should be long enough for the  
accessory to go to a SE0 state, when the switch is set to  
the other (second) USB port, the new controller re-  
enumerates.  
Using just five wires for all connection types  
considerably reduces the cost of wired accessories and  
simplifies their construction. The FSA806 facilitates  
adopting this methodology because it is designed to  
redirect the DP/DM pins from the USB connector to one  
of three ports at the baseband’s discretion.  
© 2010 Fairchild Semiconductor Corporation  
FSA806 • Rev. 1.0.1  
www.fairchildsemi.com  
2
Mode Descriptions  
The FSA806 select pins control the switching  
operations, SEL[0] and SEL[1] described in Table 1  
Table 1.  
Selection Truth Table  
SEL[1] SEL[0]  
Switch Action  
Description  
0
0
OPEN  
Open all switch paths (device in low-power mode)  
Closes USB1 path to D+/D-, default condition(1)  
- DP_CON connected to DP_HOST1  
- DM_CON connected to DM_HOST1  
0
1
USB1, UART  
USB2, UART  
AUDIO  
Closes USB2 path to D+/D-  
- DP_CON connected to DP_HOST2  
- DM_CON connected to DM_HOST2  
1
0
1
Closes audio path to D+/D- only  
- DP_CON connected to R_HOST  
- DM_CON connected to L_HOST  
1
Notes:  
1. The SELECT pins are CMOS inputs and should not be left in a floating condition. Some applications require a  
UART path be in the CLOSED position on power-up for initial programming of the device under test. If that  
condition is desired, the two SELECT pins should be pulled to the correct levels with external resistors that  
should exceed 100KΩ to reduce the static power consumption. In other applications, adding weak pull-down  
resistors to GND defaults the device to all paths open (low-power mode).  
2. When the audio switch is in the OPEN position, the R and L are terminated to GND with internal termination  
resistors to discharge any stray capacitance that could cause audio pop.  
© 2010 Fairchild Semiconductor Corporation  
FSA806 • Rev. 1.0.1  
www.fairchildsemi.com  
3
Pin Configuration  
Figure 3. 12-Pin, UMLP Pin Assignments (Top-Through View)  
Pin Descriptions  
Name  
Pin #  
Description  
USB, UART Interface  
D+ signal, dedicated USB port to be connected to the resident USB or UART transceiver on  
the phone.  
DP_HOST1  
DM_HOST1  
DP_HOST2  
DM_HOST2  
3
D- signal, dedicated USB port to be connected to the resident USB or UART transceiver on  
the phone.  
4
5
D+ signal, dedicated USB port to be connected to the resident USB or UART transceiver on  
the phone.  
6
D- signal, dedicated USB port to be connected to the resident USB or UART transceiver on  
the phone.  
Audio Interface  
R_HOST  
7
8
Right audio channel from phone audio codec.  
Left audio channel from phone audio codec.  
L_HOST  
Power Interface  
VCC  
2
Input voltage supply pin to be connected to the phone battery output.  
Connector Interface  
GND  
9
Ground  
11  
Connected to the USB connector D+ pin; depending on the FSA806 signaling mode, this pin  
can share DP_HOST1, DP_HOST2 or R_HOST signals.  
DP_CON  
10  
Connected to the USB connector D- pin; depending on the FSA806 signaling mode, this pin  
can share DM_HOST1, DM_HOST2 or L_HOST signals.  
DM_CON  
Switch Control  
SEL[1:0]  
12, 1 Switch selection pins; refer to Table 1 for truth table.  
© 2010 Fairchild Semiconductor Corporation  
FSA806 • Rev. 1.0.1  
www.fairchildsemi.com  
4
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be  
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.  
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.  
The absolute maximum ratings are stress ratings only.  
Symbol  
Parameter  
Supply Voltage from Battery / Baseband  
USB  
Min.  
-0.5  
-0.5  
Max.  
6.0  
Unit  
VCC  
V
V
BUS+0.5  
VSW  
Switch I/O Voltage  
Stereo/Mono Audio Path Active  
Vcc-8.5 VCC +0.5  
V
All Other Channels  
-0.5  
-50  
VCC +0.5  
IIK  
Input Clamp Diode Current  
Switch I/O Current (Continuous)  
mA  
mA  
USB  
50  
60  
ISW  
Audio  
All Other Channels  
USB  
50  
150  
150  
150  
+150  
+150  
+260  
15  
mA  
mA  
mA  
Peak Switch Current (Pulsed at 1ms  
Duration, <10% Duty Cycle)  
Audio  
ISWPEAK  
All Other Channels  
TSTG  
TJ  
Storage Temperature Range  
-65  
°C  
°C  
°C  
Maximum Junction Temperature  
TL  
Lead Temperature (Soldering, 10 Seconds)  
Air Gap  
Contact  
All Pins  
All Pins  
USB Connector Pins  
IEC 61000-4-2 System  
(D+, D-, VBUS  
)
8
ESD  
kV  
Human Body Model, JEDEC JESD22-A114  
Charged Device Model, JEDEC JESD22-C101  
3
2
Recommended Operating Conditions  
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended  
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not  
recommend exceeding them or designing to Absolute Maximum Ratings.  
Symbol  
Parameter  
Min.  
2.7  
Max.  
4.4  
Unit  
V
VCC  
Battery Supply Voltage  
Switch I/O Voltage  
USB/UART Path Active  
Audio Path Active  
0
4.4  
V
VSW  
TA  
VCC-7  
-40  
2.0  
V
Operating Temperature  
+85  
ºC  
© 2010 Fairchild Semiconductor Corporation  
FSA806 • Rev. 1.0.1  
www.fairchildsemi.com  
5
Switch Path DC Electrical Characteristics  
All typical values are at 25ºC unless otherwise specified.  
TA = -40 to +85°C  
Min. Typ. Max.  
Symbol  
Parameter  
VCC (V)  
Conditions  
Unit  
Host Interface Pins (SEL[2:0])  
VIH  
VIL  
IIN  
Input High Voltage  
Input Low Voltage  
Control Input Leakage  
3.2 to 4.4  
3.2 to 4.4  
1.3  
V
V
0.7  
0 to 4.4 VSW=0 to VCC  
0 DP_CON, DM_CON,  
-1  
-2  
1
2
µA  
IOZ  
Off-State Leakage  
4.4  
DP_HOSTn, DM_HOSTn,  
R_HOST, L_HOST 3.6V  
µA  
µA  
Switch Off Characteristics  
All Ports Except MIC & Audio  
path VSW=0V to 4.4V,  
Figure 8  
IOFF  
Power-Off Leakage Current  
0
10  
9
USB Switch On Paths  
HS USB Range Switch On  
Resistance  
VDP_CON/DM_CON=0V, 0.4V,  
RONUSB  
3.2 to 4.4  
3.2 to 4.4  
6
8
I
ON=8mA, Figure 7  
VDP_CON/DM_CON =0V, 3.2V,  
ON=8mA, Figure 7  
UART Range Switch On  
Resistance  
RONUART  
I
Audio R/L Switch On Paths  
RONAUD Audio Switch On Resistance  
3.2 to 4.4  
3.8  
3
1
VL/R=-0.8V, 0.8V, ION=30mA,  
Figure 7  
RFLAT  
Audio RON Flatness(1)  
0.16  
1
RTERM  
Internal Termination Resistors  
kΩ  
Total Switch Current Consumption  
Battery Supply Sleep Mode  
Average Current  
Static Current During Sleep  
Mode (SEL[2:0]=0)  
ICCSL  
3.2 to 4.4  
3.2 to 4.4  
µA  
USB/UART Mode  
20  
35  
1
µA  
µA  
µA  
µA  
Battery Supply Active Mode  
Average Current  
ICCWK  
Audio Mode  
VSEL=2.8V and VCC=4.4V  
VSEL=1.8V and VCC=4.4V  
8
Increase in ICCSL/ICCWK Current  
ICCSELT  
3.2 to 4.4  
per Control Voltage and VCC  
10  
Note:  
3. Flatness is defined as the difference between the maximum and minimum values of on resistance over the  
specified range of conditions.  
© 2010 Fairchild Semiconductor Corporation  
FSA806 • Rev. 1.0.1  
www.fairchildsemi.com  
6
Switch Path AC Electrical Characteristics(4)  
All typical value are for VCC =3.8V at 25ºC unless otherwise specified.  
TA = -40 to +85°C  
Min. Typ. Max.  
Symbol  
Parameter  
VCC (V)  
Conditions  
Unit Figure  
f=20kHz, RT=32,  
CL=0pF  
Audio Mode  
3.8  
-95  
-75  
Active  
Channel  
Crosstalk  
f=1MHz, RT=50,  
CL=0pF  
Xtalk  
dB Figure 10  
DP_CON  
to  
DM_CON  
USB Mode  
3.8  
3.8  
3.8  
f=240MHz, RT=50,  
CL=0pF  
-36  
Audio Rejection  
f=20kHz, RT=32,  
CL=0pF  
-100  
L_HOST to DM_CON,  
R_HOST to DP_CON  
Off  
Isolation  
Rejection  
OIRR  
dB  
Figure 9  
f=1 MHz, RT=50,  
CL=0pF  
-85  
-35  
USB Rejection  
Ratio  
DM_HOST to  
DM_CON, DP_HOST  
to DP_CON  
f=240MHz, RT=50,  
CL=0pF  
20Hz to 20kHz,  
RL=16, Input  
Signal Range  
1.6VPP  
0.10  
0.07  
%
%
Figure 14  
Figure 14  
Total Harmonic Distortion + Noise  
(Audio Path)  
THD+N  
3.8  
20Hz to 20kHz,  
RL=32, Input  
Signal Range  
1.6VPP  
Note:  
4. Guaranteed by characterization; not production tested.  
Capacitance  
TA = -40 to +85°C  
Symbol  
Parameter  
VCC (V)  
Conditions  
Unit  
Figure  
Min. Typ. Max.  
Select Pins  
CIN  
0
VBIAS=0.2V  
BIAS=0.2V, f=1MHz  
VBIAS=0.2V, f=1MHz  
2.5  
pF  
pF  
pF  
Figure 12  
Figure 12  
Figure 13  
Capacitance(5)  
D+, D- On Capacitance  
(HS USB Mode)(5)  
COFF(D+, D-)  
3.8  
3.8  
V
4.0  
6.8  
D+, D- On Capacitance  
(HS USB Mode)(5)  
CON(D+, D-)  
Note:  
5. Guaranteed by characterization; not production tested.  
© 2010 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSA806 • Rev. 1.0.1  
7
High-Speed USB Eye Compliance Results  
Figure 4. High-Speed Test Results  
(DP_CON/DM_CON – DP_HOST1/DM_HOST1)  
Figure 5. High-Speed Test Results  
(DP_CON/DM_CON – DP_HOST2/DM_HOST2)  
Figure 6. High-Speed Eye Compliance Input Signal  
© 2010 Fairchild Semiconductor Corporation  
FSA806 • Rev. 1.0.1  
www.fairchildsemi.com  
8
Test Diagrams  
VON  
IA(OFF)  
NC  
A
nB  
n
nA  
V
IN  
V
IN  
Select  
ION  
GND  
GND  
Select  
GND  
V
= 0 orV  
cc  
Sel  
V
= 0 or V  
cc  
Sel  
**Each switch port is tested separately.  
RON = VON / ION  
Figure 7. On Resistance  
Figure 8. Off Leakage  
Network Analyzer  
NC  
R
Network Analyzer  
S
R
S
V
IN  
VS1, S2, S3  
V
GND  
S
V
S
GND  
R
T
GND  
GND  
V
R
GND  
Sel  
T
GND  
V
GND  
OUT  
V
GND  
OUT  
GND  
R
T
RS and RT are functions of the application  
environment (see AC/DC tables).  
R
GND  
T
GND  
GND  
RS and RT are functions of the application  
environment (see AC tables for values).  
Off-Isolation = 20 Log (VOUT / VIN  
)
CROSSTALK = 20 Log (VOU  
Figure 9. Channel Off Isolation  
Figure 10. Active Channel Crosstalk  
Generator  
VCC  
B
Input – VSEL  
VIN  
Off  
On  
Off  
mA  
RS  
VS  
0V  
VOUT  
CL  
GND  
GND  
ΔVOUT  
nSn  
VOUT  
V
SEL  
CL includes test fixture and stray capacitance  
Q = ΔVOUT • C  
L
GND  
Figure 11. Charge Injection Test  
© 2010 Fairchild Semiconductor Corporation  
FSA806 • Rev. 1.0.1  
www.fairchildsemi.com  
9
Test Diagrams (Continued)  
nB  
n
nS  
n
Capacitance  
VSel = 0 or Vcc  
Meter  
f = 1MHz  
nB  
n
Figure 12. Channel Off Capacitance  
nB  
Capacitance  
n
Meter  
nS  
n
V
Sel= 0 orVcc  
f = 1MHz  
nB  
n
Figure 13. Channel On Capacitance  
Audio Analyzer  
R
S
V
IN  
V
GND  
S
GND  
V
VCNTRL  
OUT  
GND  
GND  
R
T
V
Sel = 0 or Vcc  
GND  
RS and RT are functions of the application  
environment (see AC Tables for specific values).  
Figure 14. Total Harmonic Distortion + Noise  
© 2010 Fairchild Semiconductor Corporation  
FSA806 • Rev. 1.0.1  
www.fairchildsemi.com  
10  
Physical Dimensions  
(11X)  
0.563  
2.10  
1.80  
A
B
0.10  
C
0.588  
0.40  
2X  
1
1.80  
0.10  
2.10  
PIN#1 IDENT  
C
(12X)  
0.20  
TOP VIEW  
2X  
RECOMMENDED  
LAND PATTERN  
0.55 MAX.  
0.152  
0.10  
0.08  
C
C
0.45  
0.35  
0.10  
0.05  
0.00  
SEATING  
PLANE  
C
0.10  
0.10  
SIDE VIEW  
DETAIL A  
SCALE : 2X  
0.35  
(11X)  
NOTES:  
0.45  
3
6
A. PACKAGE DOES NOT FULLY CONFORM TO  
JEDEC STANDARD.  
0.40  
B. DIMENSIONS ARE IN MILLIMETERS.  
DETAIL A  
C. DIMENSIONS AND TOLERANCES PER  
ASME Y14.5M, 1994.  
1
PIN#1 IDENT  
D. LAND PATTERN RECOMMENDATION IS  
BASED ON FSC DESIGN ONLY.  
12  
9
0.25  
0.15  
(12X)  
BOTTOM VIEW  
0.10  
C A B  
E. DRAWING FILENAME: MKT-UMLP12Arev4.  
0.05  
C
PACKAGE  
EDGE  
LEAD  
LEAD  
OPTION 2  
SCALE : 2X  
OPTION 1  
SCALE : 2X  
Figure 15. 12-Lead, Ultrathin Molded Leadless Package (UMLP)  
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner  
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or  
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the  
warranty therein, which covers Fairchild products.  
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:  
http://www.fairchildsemi.com/packaging/.  
© 2010 Fairchild Semiconductor Corporation  
FSA806 • Rev. 1.0.1  
www.fairchildsemi.com  
11  
© 2010 Fairchild Semiconductor Corporation  
FSA806 • Rev. 1.0.1  
www.fairchildsemi.com  
12  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent  
coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.  
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,  
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not  
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification  
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized  
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and  
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such  
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literature is subject to all applicable copyright laws and is not for resale in any manner.  
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FAIRCHILD

FSA8108BUCX

支持调高/调低音量和发送/结束按键的音频插孔检测和配置开关
ONSEMI

FSA831

USB2.0 High-Speed (480Mbps) Charger Detection with Isolation Switch
FAIRCHILD

FSA831AL10X

USB2.0 High-Speed (480 Mbps) Charger Detection with Isolation Switch, 10LD,MICROPAK,JEDEC MO255,1.6 X 2.1MM (PREMOLDED), 5000/TAPE REEL
FAIRCHILD

FSA831L10X

USB2.0 High-Speed (480Mbps) Charger Detection with Isolation Switch
FAIRCHILD

FSA831L10X-F131

Power Management Circuit
FAIRCHILD

FSA832

USB 2.0 High-Speed (480 Mbps) Charger Detection IC with Isolation Switch
FAIRCHILD

FSA832L10

USB 2.0 High-Speed (480 Mbps) Charger Detection IC with Isolation Switch
FAIRCHILD

FSA832L10X

Consumer Circuit, 2.10 X 1.60 MM, 0.50 MM PITCH, MO-255UABD, MICROPAK-10
FAIRCHILD

FSA832L10X

USB 2.0 高速 (480 Mbps) 充电器检测集成电路,带隔离开关
ONSEMI

FSA839

Low-Voltage, 0.8Ω SPDT Analog Switch with Power-Off Isolation
FAIRCHILD