FSBH0F70WANY_技术文档

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June 2013

FSBH0F70WA, FSBH0170W, FSBH0270W

Green Mode Fairchild Power Switch (FPS™)

Features

Description

.

Brownout Protection with Hysteresis

Built-In 5 ms Soft-Start Function

Internal Avalanche-Rugged 700 VSenseFET

Low Acoustic Noise During Light-Load Operation

High-Voltage Startup

The highly integrated FSBH-series consists of an

integrated current-mode Pulse Width Modulator (PWM)

and an avalanche-rugged 700 V SenseFET. It is

specifically designed for high-performance offline

Switched-Mode Power Supplies (SMPS) with minimal

external components.

The integrated PWM controller features include a

proprietary green-mode function that provides off-time

modulation to linearly decrease the switching frequency

at light-load conditions to minimize standby power

consumption. To avoid acoustic-noise problems, the

minimum PWM frequency is set above 18 kHz. This

green-mode function enables the power supply to meet

international power conservation requirements. The

PWM controller is manufactured using the BiCMOS

process to further reduce power consumption. The

FSBH-series turns off some internal circuits to improve

power saving when V_FBis lower than 1.6 V, which

allows an operating current of only 2.5 mA.

Linearly Decreasing PWM Frequency to 18 KHz

Peak-Current-Mode Control

Cycle-by-Cycle Current Limiting

Leading-Edge Blanking (LEB)

Synchronized Slope Compensation

Internal Open-Loop Protection

V_DDUnder-Voltage Lockout (UVLO)

V_DDOver-Voltage Protection (OVP)

Internal Auto-Restart Circuit (OVP, OTP)

Constant Power Limit (Full AC Input Range)

Internal OTP Sensor with Hysteresis

The FSBH-series has built-in synchronized slope

compensation to achieve stable peak-current-mode

control. The proprietary external line compensation

ensures constant output power limit over a wide AC

input voltage range, from 90 V_ACto 264 V_AC.

Applications

The FSBH-series provides many protection functions. In

addition to cycle-by-cycle current limiting, the internal

open-loop protection circuit ensures safety when an

open-loop or output short occurs. PWM output is

disabled until V_DDdrops below the V_TH-OLP, then the

controller starts up again. As long as V_DDexceeds 28 V,

the internal OVP circuit is triggered.

General-purpose switched-mode power supplies and

flyback power converters, including:

.

Auxiliary Power Supply for PC and Server

SMPS for VCR, SVR, STB, DVD & DVCD Player,

Printer, Facsimile, and Scanner

.

Adapter for Camcorder

Compared with a discrete MOSFET and controller or

RCC switching converter solution, the FSBH-series

reduces component count, design size, and weight;

while increasing efficiency, productivity, and system

reliability. These devices provide a basic platform that is

well suited for the design of cost-effective flyback

converters, such as in PC auxiliary power supplies.

www.fairchildsemi.com

FSBH0F70WA/0170W/0270W • Rev. 1.0.3

Ordering Information

Operating

Temperature

Range

VIN Pin

(PIN #4)

Packing

Method

Part Number

SenseFET

Package

Not

Available

FSBH0F70WANY 0.5 A700 V

-40°C to +105°C 8-Pin, Dual In-Line Package (DIP)

Tube

FSBH0170WNY

FSBH0270WNY

1.0 A700 V

2.0 A700 V

Enabled

Typical Application Diagram

HV

Drain

VIN

FB

VDD

GND

Figure 1.

Typical Flyback Application

Table 1. Output Power Table⁽¹⁾

Product

230 V_AC± 15%⁽²⁾

Open Frame⁽⁴⁾

85-265 V_AC

Open Frame⁽⁴⁾

Adapter⁽³⁾

FSBH0F70WA

FSBH0170W

FSBH0270W

7 W

10 W

15 W

20 W

6 W

9 W

8 W

10 W

14 W

13 W

16 W

11 W

Notes:

1. The maximum output power can be limited by junction temperature.

2. 230 V_ACor 100/115 V_ACwith doublers.

3. Typical continuous power in a non-ventilated enclosed adapter with sufficient drain pattern as a heat sink at 50C

ambient.

4. Maximum practical continuous power in an open-frame design with sufficient drain pattern as a heat sink at 50C

ambient.

FSBH0F70WA/0170W/0270W • Rev. 1.0.3

www.fairchildsemi.com

2

Block Diagram

HV

5

Drain

6,7,8

OVP

OLP

OTP

Auto-ReStart

Protection

HV

Startup

OVP

OSC

Debounce

PWM

Soft

Driver

V_DD-OVP

V_PWM

S

R

Q

Internal

BIAS

…

VDD

2

V_RESET

UVLO

Pattern

Generator

Soft-Start

Comparator

12V/8V

Soft-Start

V_RESET

Current-Limit

Comparator

Green

Mode

V_Limit

GND

1

3

PWM

Comparator

6V

Max.

Duty

Slope

V_PWM

Compensation

3R

Z_FB

VIN

4

FB

1.13V/0.59V

R

High/Low Line

Compensation

V_Limit

OLP

Delay

OLP

4.6V

OLP

Comparator

Figure 2.

FSBH0170W / 0270W Internal Block Diagram

HV

5

Drain

6,7,8

OVP

Auto-ReStart

OLP

Protection

OTP

HV

Startup

OVP

OSC

Debounce

PWM

Soft

Driver

V_DD-OVP

V_PWM

S

R

Q

Internal

BIAS

…

VDD

2

V_RESET

UVLO

Pattern

Generator

Soft-Start

Comparator

12V/8V

Soft-Start

V_RESET

Current-Limit

Comparator

Green

Mode

V_Limit

GND

1

3

PWM

Comparator

6V

Max.

Duty

Slope

V_PWM

Compensation

3R

Z_FB

NC

4

FB

R

OLP

Delay

OLP

4.6V

OLP

Comparator

Figure 3.

FSBH0F70WA Internal Block Diagram

FSBH0F70WA/0170W/0270W • Rev. 1.0.3

www.fairchildsemi.com

3

Pin Configuration

8

F – Fairchild Logo

Z – Plant Code

ZXYTT

BH0F70A

WTPM

ZXYTT

BH0170

WTPM

X – 1-Digit Year Code

Y – 1-Digit Week Code

TT – 2-Digit Die-Run Code

T – Package Type (N:DIP)

P – Y: Green Package

M – Manufacture Flow Code

1

8

1

ZXYTT

BH0270

WTPM

1

Figure 4.

Pin Configuration and Top Mark Information

Pin Definitions

Pin # Name

Description

1

GND

Ground. SenseFET source terminal on primary side and internal controller ground.

Power Supply. The internal protection circuit disables PWM output as long as V_DDexceeds the

OVP trigger point.

2

VDD

Feedback. The signal from the external compensation circuit is fed into this pin. The PWM duty

cycle is determined in response to the signal on this pin and the internal current-sense signal.

3

4

FB

Line-Voltage Detection. The line-voltage detection is used for brownout protection with

hysteresis and constant output power limit over universal AC input range.

VIN

NC

HV

No Connection for FSBH0F70WA

5

6

7

8

Startup. For startup, this pin is pulled HIGH to the line input or bulk capacitor via resistors.

Drain SenseFET Drain. High-voltage power SenseFET drain connection.

FSBH0F70WA/0170W/0270W • Rev. 1.0.3

www.fairchildsemi.com

4

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be

operable above the recommended operating conditions and stressing the parts to these levels is not recommended.

In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.

The absolute maximum ratings are stress ratings only.

Symbol

Parameter

Min.

Max.

Unit

FSBH0F70WA

FSBH0170W

FSBH0270W

FSBH0F70WA

FSBH0170W

FSBH0270W

FSBH0F70WA

FSBH0170W

FSBH0270W

V_DRAINDrain Pin Voltage^(5,6)

700

V

1.5

4.0

8.0

10

I_DM

Drain Current Pulsed⁽⁷⁾

A

E_AS

Single Pulsed Avalanche Energy⁽⁸⁾

50

mJ

140

30

V_DD

V_FB

DC Supply Voltage

V

FB Pin Input Voltage

VIN Pin Input Voltage

HVPin Input Voltage

Power Dissipation (T_A＜50°C)

-0.3

7.0

700

V

IN

V

V_HV

P_D

V

1.5

80

20

W

Θ_JA

ψ_JT

T_J

Junction-to-Air Thermal Resistance

Junction-to-Top Thermal Resistance⁽⁹⁾

Operating Junction Temperature

C/W

C

Internally limited^{(10 )}

T_STG

T_L

Storage Temperature Range

-55

+150

+260

C

Lead Temperature (Wave Soldering or IR, 10 Seconds)

C

FSBH0F70WA

FSBH0170W

FSBH0270W

FSBH0F70WA

FSBH0170W

FSBH0270W

5.0

2.0

Human Body Model

(All Pins Except HV Pn): JESD22-A114

ESD

kV

Charged Device Model

(All Pins Except HV Pin): JESD22-C101

Notes:

5. All voltage values, except differential voltages, are given with respect to the network ground terminal.

6. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.

7. Non-repetitive rating: pulse width is limited by maximum junction temperature.

8. L = 51 mH,starting T_J= 25C.

9. Measured on the package top surface.

10. Internally Limited of T_Jrefers to T_OTP

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended

operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not

recommend exceeding them or designing to Absolute Maximum Ratings.

Symbol

Parameter

Operating Ambient Temperature

Min.

Max.

Unit

T_A

-40

+105

°C

FSBH0F70WA/0170W/0270W • Rev. 1.0.3

www.fairchildsemi.com

5

Electrical Characteristics

V_DD=15 V and T_A=25C unless otherwise specified.

Symbol

SenseFET Section

Drain-Source

Parameter

Condition

Min. Typ. Max. Unit

BV_DSS

I_D=250 µA, V_GS=0 V

700

V

Breakdown Voltage

V_DS=700 V, V_GS=0 V

50

200

Zero-Gate-Voltage

Drain Current

I_DSS

μA

V_DS=560 V, V_GS=0 V, T_C=125C

FSBH0F70WA

14.00 19.00

Drain-Source On-

R_DS(ON)

C_ISS

C_OSS

C_RSS

t_D(ON)

t_R

V_GS=10 V, I_D=0.5 A

FSBH0170W

FSBH0270W

FSBH0F70WA

FSBH0170W

FSBH0270W

FSBH0F70WA

FSBH0170W

FSBH0270W

FSBH0F70WA

FSBH0170W

FSBH0270W

FSBH0F70WA

FSBH0170W

FSBH0270W

FSBH0F70WA

FSBH0170W

FSBH0270W

FSBH0F70WA

FSBH0170W

FSBH0270W

FSBH0F70WA

FSBH0170W

FSBH0270W

8.80

6.00

162

250

550

18

11.00

7.20

211

325

715

24

Ω

State Resistance⁽¹²⁾

V_GS=0 V, V_DS=25 V,

f=1 MHz

Input Capacitance

Output Capacitance

pF

ns

V_GS=0 V, V_DS=25 V,

f=1 MHz

25

33

38

50

3.8

10

5.7

Reverse Transfer

Capacitance

V_GS=0 V, V_DS=25 V,

f=1 MHz

15

17

26

9.5

12.0

20.0

19

29.0

34.0

50.0

48

Turn-On Delay

Rise Time

V_DS=350 V, I_D=1.0 A

4

18

15

40

33.0

30.0

55.0

42

76.0

70.0

120.0

94

t_D(OFF)

Turn-Off Delay

Fall Time

t_F

10

30

25

60

Continued on the following page…

FSBH0F70WA/0170W/0270W • Rev. 1.0.3

www.fairchildsemi.com

6

Electrical Characteristics (Continued)

V_DD=15 V and T_A=25C unless otherwise specified.

Symbol

Parameter

Condition

Min.

Typ.

Max.

Unit

Control Section

V_DDSection

V_DD-ON

Start Threshold Voltage

11

7

12

8

13

9

V

V_DD-OFF

Minimum Operating Voltage

FSBH0170W

FSBH0270W

V_DD-ON– 0.16 V

30

I_DD-ST

Startup Current

µA

FSBH0F70WA

V_DD-ON– 0.16 V

240

3.0

320

3.5

400

4.0

I_DD-OP

Operating Supply Current

V_DD=15 V, V_FB=3 V

mA

V_DD=12 V,

V_FB=1.6 V

I_DD-ZDC

Operating Current for V_FB<V_FB-ZDC

1.5

2.5

3.5

I_DD-OLP

V_TH-OLP

V_DD-OVP

Internal Sink Current

I_DD-OLPOff Voltage

V_TH-OLP+0.1 V

30

5

70

6

90

7

µA

V

V_DDOver-Voltage Protection

27

75

28

130

29

200

V

t_D-VDD-OVPV_DDOver-Voltage Protection Debounce Time

µs

HV Section

HV120 V_DC

V_DD=0 Vwith 10 µF

,

I_HV

Maximum Current Drawn from HVPin

Leakage Current after Startup

1.5

3.5

1

5.0

20

mA

µA

HV=700 V,

V_DD=V_DD-OFF+1 V

I_HV-LC

Oscillator Section

f_OSC

f_OSC-G

D_MAX

f_DV

Frequency in Nominal Mode

Center Frequency

94

14

100

18

106

22

kHz

%

Green-Mode Frequency

Maximum Duty Cycle

85

Frequency Variation vs. V_DDDeviation

V_DD=11 V to 22 V

5

%

Frequency Variation vs. Temperature

Deviation⁽¹¹⁾

f_DT

T_A=-25 to 85C

%

V_INSection (FSBH0170W & FSBH0270W)

V

PWM Turn-On Threshold Voltage

PWM Turn-Off Threshold Voltage

PWM Turn-Off Debounce Time

1.08

0.50

1.13

0.55

500

1.18

0.60

V

IN-ON

V

IN-OFF

t_IN-OFF

ms

Feedback Input Section

A_V

Z_FB

FB Voltage to Current-Sense Attenuation

1/4.5

4

1/4.0

1/3.5

7

V/V

kΩ

V

Input Impedance

V_FB-OPEN

Output High Voltage

FB Pin Open

5.5

Continued on the following page…

FSBH0F70WA/0170W/0270W • Rev. 1.0.3

www.fairchildsemi.com

7

Electrical Characteristics (Continued)

V_DD=15 V and T_A=25C unless otherwise specified.

Symbol

V_FB-N

Parameter

Green-Mode Entry FB Voltage

Green-Mode Ending FB Voltage

Zero Duty Cycle FB Voltage

Condition

Min.

2.3

Typ.

Max.

2.7

Unit

V

2.5

2.0

1.6

5.4

4.6

56

V_FB-G

1.9

2.1

V

V_FB-ZDC

V

FSBH0F70WA

FSBH0x7W

5.2

4.4

50

5.6

4.8

59

FB Open-Loop

Trigger Level

V_FB-OLP

V

t_D-OLP

FB Open-Loop Protection Delay

ms

Current-Sense Section⁽¹⁵⁾

FSBH0F70WA

FSBH0170W

FSBH0270W

V

Open

0.63

0.70

0.90

4.5

0.73

0.80

1.00

5.0

0.83

0.90

1.10

5.5

IN

I_LIM

Peak Current Limit

V =1.2 V

IN

A

V =1.2 V

IN

t_SS

Constant Power Limit (FSBH0170W & FSBH0270W)

Period During Soft-Start Time⁽¹¹⁾

ms

V_LMT1

V_LMT2

Threshold Voltage 1 for Current Limit

Threshold Voltage 2 for Current Limit

V =1.2 V

0.73

0.56

0.80

0.63

0.87

0.70

V

IN

V =3.6 V

IN

Constant Power Limit (FSBH0F70WA)

V_LMT

Threshold Voltage for Current Limit

0.97

1.00

1.03

V

Over-Temperature Protection Section (OTP)

T_OTP

Protection Junction Temperature^(11,13)

Restart Junction Temperature^(11,14)

+135

+142

+150

°C

T_RESTART

T_OTP-25

Notes:

11. These parameters, although guaranteed, are not 100% tested in production.

12. Pulse test: pulse width ≤ 300 µs, duty ≤ 2%.

13. When activated, the output is disabled and the latch is turned off.

14. The threshold temperature for enabling the output again and resetting the latch after over-temperature protection

has been activated.

15. These parameters, although guaranteed, are tested in wafer process.

PWM Frequency

f_OSC

f_OSC-G

V_FB-ZDC

V_FB-G

V_FB-N

V_FB

Figure 5.

V_FBvs. PWM Frequency

FSBH0F70WA/0170W/0270W • Rev. 1.0.3

www.fairchildsemi.com

8

Typical Characteristics (Continued)

14

12

10

8

3.02

3.00

2.98

2.96

2.94

2.92

2.90

2.88

2.86

6

4

2

0

-40

-25 -10

5

20

35

50

65

80

95

110 125

-40 -25 -10

5

20

35

50

65

80

95 110 125

Temperature(°C)

Figure 6.

I_DD-STvs. Temperature

Figure 7.

I_DD-OPvs. Temperature

12.4

8.3

12.2

12.0

11.8

11.6

11.4

11.2

8.2

8.1

8.0

7.9

7.8

7.7

-40 -25 -10

5

20

35

50

65

80

95

110 125

-40

-25

-10

5

20

35

50

65

80

95

110 125

Temperature(°C)

Figure 8.

V_DD-ONvs. Temperature

Figure 9.

V_DD-OFFvs. Temperature

6.6

6.4

6.2

6.0

5.8

5.6

5.4

5.2

5.0

28.42

28.41

28.40

28.39

28.38

28.37

28.36

28.35

-40

-25 -10

5

20

35

50

65

80

95

110 125

-40 -25 -10

5

20

35

50

65

80

95

110 125

Temperature(°C)

Figure 10. V_TH-OLPvs. Temperature

Figure 11. V_DD-OVPvs. Temperature

4.0

3.5

3.0

2.5

2.0

1.5

1.0

7

6

5

4

3

2

1

0

-40 -25

-10

5

20

35

50

65

80

95

110 125

-40

-25

-10

5

20

35

50

65

80

95

110 125

Temperature(°C)

Figure 12. I_HVvs. Temperature

Figure 13. I_HV-LCvs. Temperature

FSBH0F70WA/0170W/0270W • Rev. 1.0.3

www.fairchildsemi.com

9

Typical Characteristics (Continued)

101.5

101.0

100.5

100.0

99.5

19.2

19.1

19.0

18.9

18.8

18.7

18.6

99.0

98.5

98.0

97.5

-40 -25 -10

5

20

35

50

65

80

95

110 125

-40

-25 -10

5

20

35

50

65

80

95

110 125

Temperature(°C)

Figure 14. f_OSCvs. Temperature

Figure 15. f_OSC-Gvs. Temperature

0.64

0.63

0.62

0.61

0.60

0.59

0.58

1.17

1.16

1.15

1.14

1.13

1.12

1.11

-40

-25 -10

5

20

35

50

65

80

95

110 125

-40

-25 -10

5

20

35

50

65

80

95

110 125

Temperature(°C)

Figure 16. V_IN-OFFvs. Temperature

Figure 17. V_IN-ONvs. Temperature

2.56

2.54

2.52

2.50

2.48

2.46

2.44

2.42

2.60

2.55

2.50

2.45

2.40

2.35

2.30

-40

-25 -10

5

20

35

50

65

80

95

110 125

-40 -25

-10

5

20

35

50

65

80

95

Temperature(°C)

Figure 18. I_DD-ZDCvs. Temperature

Figure 19. V_FB-Nvs. Temperature

2.20

2.15

2.10

2.05

2.00

1.95

1.90

1.85

1.80

1.800

1.700

1.600

1.500

1.400

1.300

1.200

-40

-25 -10

5

20

35

50

65

80

95

110 125

-40 -25 -10

5

20

35

50

65

80

95

Temperature(°C)

Figure 20. V_FB-Gvs. Temperature

Figure 21. V_FB-ZDCvs. Temperature

FSBH0F70WA/0170W/0270W • Rev. 1.0.3

www.fairchildsemi.com

10

Functional Description

Startup Operation

FSBH0170W/0270W

The HV pin is connected to bulk voltage through an

external resistor, R_HV, as shown in Figure 22. When AC

voltage is applied to the power system, an internal HV

startup circuit provides a high current (around 3.5 mA)

to charge an external V_DDcapacitor until V_DDvoltage

exceeds the turn-on threshold voltage (V_DD-ON). For

lower power consumption, the HV startup circuit shuts

down during normal operation. The external V_DD

capacitor and auxiliary winding maintain the V_DDvoltage

and provide operating current to controller.

R_A

R_B

R_C

1.1V/0.6V

VIN

Brown-In/Out

C

Figure 24. Brown-In/Out Function on VIN Pin

R_HV

Once the VIN pin voltage is lower than 0.6 V and lasts

for 500 ms, the PWM gate is disabled to protect the

system from over current. FSBH0170W / 0270W starts

2

5

HV

VDD

up as V increases above 1.1 V. Because the divider

IN

C_DD

N_A

resistors of the VIN pin are connected behind the

bridge, the ratio calculations for brownout in PFC and

non-PFC system are different, as shown in Figure 25.

The formulas are provided in the following equations:

Brownout with PFC:

FSBH0x70W/WA

AC line

Figure 22. Startup Circuit

R_C

2

 2V_{AC _OUT}



 0.6

Slope Compensation

(1)

(2)

(3)

R_A R_B R_C



The FSBH-series is designed for flyback power

converters. The peak-current-mode control is used to

optimize system performance. Slope compensation is

added to reduce current loop gain and improve power

system stability. The FSBH-series has a built-in,

synchronized, positive slope for each switching cycle.

Brownout with non-PFC:

R_C

 2V_{AC _OUT} 0.6

R_A R_B R_C

Brown-in level is determined by:

Soft-Start

R_A R_B R_C

1.1

2

V_{AC _IN}





The FSBH-series has an internal soft-start circuit that

reduces the SenseFET switching current during power

system startup. The characteristic curve of soft-start

time versus V_LMTlevel is shown in Figure 23. The V_LMT

level rises in six steps. By doing so, the power system

can smoothly build up the rated output voltage and

effectively reduce voltage stress on the PWM switch

and output diode.

R_C

PFC Stops

PFC Runs

AC Input

V_LMT

0.89V_LMT

0.79V_LMT

0.68V_LMT

V_IN

0.58V_LMT

0.26V_LMT

Figure 25. V_INLevel According to PFC Operation

Brown-In Function of FSBH0F70WA

1ms

2ms

3ms

4ms

5ms

The VIN pin functions are disabled from FSBH0F70WA

which still exist brown-in protection in VDD pin. There is

a discharge current internal from V_DDto ground during

startup. The HV source current must be larger than I_DD-

_STto charge the capacitor of V_DD. The brown-in level can

be determined by R_HVaccording to the equation:

Figure 23. Soft-Start Function

Brown-In/Out Function

FSBH0170W/0270W has a built-in internal brown-in/out

protection comparator monitoring voltage of the VIN pin.

Figure 24 shows a resistive divider with low-pass

filtering for line-voltage detection on the VIN pin.

2V_AC12

R_HV



(4)

I_DDST

FSBH0F70WA/0170W/0270W • Rev. 1.0.3

www.fairchildsemi.com

11

V_LMT

0.80

Green-Mode Operation

The FSBH-series uses feedback voltage (V_FB) as an

indicator of the output load and modulates the PWM

frequency, as shown in Figure 26, such that the

switching frequency decreases as load decreases. In

heavy-load conditions, the switching frequency is

100 kHz. Once V_FBdecreases below V_FB-N(2.5 V), the

PWM frequency starts to linearly decrease from

100 kHz to 18 kHz to reduce switching losses. As V_FB

decreases below V_FB-G(2.0 V), the switching frequency is

fixed at 18 kHz and the FSBH-series enters “deep” green

mode to reduce the standby power consumption.

0.63

0.5 1.2

3.6 4.0

V_IN

Figure 28. Constant Power Control

Frequency

PWM

Protections

Frequency

The FSBH-series provides full protection functions to

prevent the power supply and the load from being

damaged. The protection features include:

100kHz

Open-Loop / Overload Protection (OLP)

18kHz

When the upper branch of the voltage divider for the

shunt regulator (KA431 shown) is broken, as shown in

Figure 29, or over current or output short occurs, there

is no current flowing through the opto-coupler transistor,

which pulls the feedback voltage up to 6 V.

V_FB-ZDC

V_FB-G

V_FB-N

V_FB

Figure 26. PWM Frequency

As V_FBdecreases below V_FB-ZDC(1.6 V), the FSBH-

series enters burst-mode operation. When V_FBdrops

below V_FB-ZDC, FSBH-series stops switching and the

output voltage starts to drop, which causes the feedback

voltage to rise. Once V_FBrises above V_FB-ZDC, switching

resumes. Burst mode alternately enables and disables

switching, thereby reducing switching loss to improve

power saving, as shown in Figure 27.

When feedback voltage is above 4.6 V for longer than

56 ms, OLP is triggered. This protection is also triggered

when the SMPS output drops below the nominal value

longer than 56 ms due to the overload condition.

V_DDOver-Voltage Protection (OVP)

V_DDover-voltage protection prevents IC damage caused

by over voltage on the VDD pin. The OVP is triggered

when V_DDvoltage reaches 28 V. Debounce time (typically

130 µs) prevents false trigger by switching noise.

V_O

Over-Temperature Protection (OTP)

The SenseFET and the control IC are integrated,

making it easier to detect the temperature of the

SenseFET. As the temperature exceeds approximately

142°C, thermal shutdown is activated.

V_FB

V_FB.ZDC

(1.6V)

I_Drain

6V

Switching

Disabled

Switching

Disabled

V_FB

Vo

PWM

2

3R

R

Figure 27. Burst-Mode Operation

H/L Line Over-Power Compensation

KA431

To limit the output power of the converter constantly,

high/low line over-power compensation is included.

Sensing the converter input voltage through the VIN pin,

the high/low line compensation function generates a

relative peak-current-limit threshold voltage for constant

power control, as shown in Figure 28.

56ms

OLP

Feedback Open

Loop

4.6V

V_FB

6V

V_FB-OLP(4.6V)

OLP Triggers

OLP Shutdown Delay Time

56ms

Figure 29. OLP Operation

FSBH0F70WA/0170W/0270W • Rev. 1.0.3

www.fairchildsemi.com

12

Physical Dimensions

0.400 10.160

0.355 9.017

[

]

8

5

PIN 1 INDICATOR

0.280 7.112

0.240 6.096

[

]

1

4

HALF LEAD 4X

0.005 [0.126]

FULL LEAD 4X

0.005 [0.126] MIN

0.325 8.263

0.300 7.628

[

]

0.195 4.965

MAX 0.210 [5.334]

0.115

[

2.933

]

SEATING PLANE

0.150 3.811

0.115

[

2.922

]

C

MIN 0.015 [0.381]

0.100 [2.540]

0.300 [7.618]

0.045 1.144

0.030 0.763

4X

[

]

0.430 [10.922]

MAX

0.022 0.562

0.014 0.358

[

]

0.070 1.778

0.045 1.143

4X

[

]

0.10

C

NOTES:

A) THIS PACKAGE CONFORMS TO

JEDEC MS-001 VARIATION BA

B) CONTROLING DIMS ARE IN INCHES

C) DIMENSIONS ARE EXCLUSIVE OF BURRS,

MOLD FLASH, AND TIE BAR EXTRUSIONS.

D) DIMENSIONS AND TOLERANCES PER ASME

Y14.5M -1982

E) DRAWING FILENAME AND REVSION: MKT-N08MREV1.

Figure 30.

8-Pin Dual In-Line Package (DIP)

Package drawings are provided as a service to customers considering Fairchild components. Drawings maychange in any manner

without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or

obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specificallythe

warrantytherein, whichcovers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the mostrecent package drawings:

http://www.fairchildsemi.com/packaging/.

FSBH0F70WA/0170W/0270W • Rev. 1.0.3

www.fairchildsemi.com

13

www.fairchildsemi.com

FSBH0F70WA/0170W/0270W • Rev. 1.0.3

14

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1


型号：	FSBH0F70WANY
厂家：	ONSEMI
描述：	用于 8 W 离线反激式转换器的 700 V 集成电源开关，100 kHz，提供通电/欠压保护开关信息通信管理电源开关光电二极管转换器
文件：	总16页 (文件大小：1061K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

FSBH0F70WANY [ONSEMI]

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