FSDM0465RBWDTU [ONSEMI]
用于 48W 离线反激转换器的 650V 集成电源开关;型号: | FSDM0465RBWDTU |
厂家: | ONSEMI |
描述: | 用于 48W 离线反激转换器的 650V 集成电源开关 局域网 开关 电源开关 转换器 |
文件: | 总20页 (文件大小:368K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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FSDM0465RB
TM
Green Mode Fairchild Power Switch (FPS )
Features
• Internal Avalanche Rugged SenseFET
• Advanced Burst-Mode Operation Consumes Under One
W at 240VAC & 0.5W Load
• Precision Fixed Operating Frequency (66kHz)
• Internal Start-up Circuit
• Improved Pulse by Pulse Current Limiting
• Over Voltage Protection (OVP) : Auto-Restart
• Over Load Protection (OLP): Auto-Restart
• Internal Thermal Shutdown (TSD) : Auto-Restart
• Under Voltage Lock Out (UVLO) with Hysteresis
• Low Operating Current (2.5mA)
OUTPUT POWER TABLE (4)
(3)
230VAC ±15%
85-265VAC
PRODUCT
Adapt-
er
Open
Frame
Adapt- Open
er
(1)
(2)
(1)
(2)
Frame
FSDM0465RB
FSDM0565RB
FSDM07652RB
FSDM12652RB
48W
60W
70W
90W
56W
70W
80W
110W
40W
50W
60W
80W
48W
60W
70W
90W
Table 1. Maximum Output Power
Notes:
• Built-in Soft Start
1. Typical continuous power in a non-ventilated enclosed
adapter measured at 50°C ambient.
Application
• SMPS for LCD monitor and STB
• Adapter
2. Maximum practical continuous power in an open frame
design at 50°C ambient.
3. 230 VAC or 100/115 VAC with doubler.
4. The junction temperature can limit the maximum output
power.
Related Application Notes
• AN4137 - Design Guidelines for Off-line Flyback
Converters Using Fairchild Power Switch (FPS)
• AN4140 - Transformer Design Consideration for Off-line
Flyback Converters Using Fairchild Power Switch
• AN4141 - Troubleshooting and Design Tips for Fairchild
Power Switch Flyback Applications
Typical Circuit
• AN4148 - Audible Noise Reduction Techniques for FPS
Applications
AC
IN
DC
OUT
Description
The FSDM0465RB is an integrated Pulse Width Modulator
(PWM) and SenseFET specifically designed for high
performance offline Switch Mode Power Supplies (SMPS)
with minimal external components. This device is an
integrated high voltage power switching regulator which
combines a rugged avalanche, SenseFET with a current mode
PWM control block. The PWM controller includes integrated
fixed frequency oscillator, under voltage lockout, leading edge
blanking (LEB), optimized gate driver, internal soft start,
temperature compensated precise current sources for a loop
compensation and self protection circuitry. Compared with a
discrete MOSFET and PWM controller solution, the PWM/
FSDMRB can reduce total cost, component count, size and
weigh, while simultaneously increasing efficiency, productivity,
and system reliability. This device provides a basic platform
well suited for cost-effective designs of flyback converters.
Vstr
PWM
Drain
Vfb
Vcc
Source
Figure 1. Typical Flyback Application
FPSTM is a trademark of Fairchild Semiconductor Corporation
©2005 Fairchild Semiconductor Corporation
Rev.1.0.0
FSDM0465RB
Internal Block Diagram
Vcc
3
Vstr
6
Drain
1
N.C 5
ICH
+
0.5/0.7V
Internal
Bias
Vref
8V/12V
2.5R
Vcc good
-
Vcc
Vref
OSC
Idelay
IFB
PWM
R
S
Q
Q
VFB
4
Gate
driver
R
Soft start
LEB
VSD
Vcc
Vovp
TSD
2 GND
S
Q
Q
R
V
c
c
G
o
o
d
VCL
Figure 2. Functional Block Diagram of FSDM0465RB
2
FSDM0465RB
Pin Description
Pin Number
Pin Name
Pin Function Description
This pin is the high voltage power SenseFET drain. It is designed to drive the
transformer directly.
1
2
Drain
GND
This pin is the control ground and the SenseFET source.
This pin is the positive supply voltage input. During start up, the power is sup-
plied by an internal high voltage current source that is connected to the Vstr pin.
When Vcc reaches 12V, the internal high voltage current source is disabled and
the power is supplied from the auxiliary transformer winding.
3
Vcc
This pin is internally connected to the inverting input of the PWM comparator.
The collector of an opto-coupler is typically tied to this pin. For stable operation,
a capacitor should be placed between this pin and GND. If the voltage of this pin
reaches 6.0V, the over load protection is activated resulting in shutdown of the
4
Vfb
FPSTM
-
.
5
6
N.C
Vstr
This pin is connected directly to the high voltage DC link. At startup, the internal
high voltage current source supplies internal bias and charges the external ca-
pacitor that is connected to the Vcc pin. Once Vcc reaches 12V, the internal cur-
rent source is disabled.
Pin Assignments
TO-220F-6L
6.Vstr
5.N.C.
4.Vfb
3.Vcc
2.GND
1.Drain
Figure 3. Pin Configuration (Top View)
3
FSDM0465RB
Absolute Maximum Ratings
(Ta=25°C, unless otherwise specified)
Parameter
Symbol
Value
650
650
9.6
2.2
1.4
4
Unit
Drain-source Voltage
Vstr Max Voltage
V
DSS
V
STR
I
DM
V
V
(1)
Pulsed Drain Current (Tc=25°C)
A
(2)
Continuous Drain Current (Tc=25°C)
A (rms)
A (rms)
A (rms)
mJ
I
D
(2)
Continuous Drain Current (Tc=100°C)
Continuous Drain Current* (T =25°C)
Single Pulsed Avalanche Energy (4)
(3)
*
I
D
DL
E
-
AS
CC
Supply Voltage
V
20
V
Input Voltage Range
V
-0.3 to V
33
V
FB
CC
(2)
Total Power Dissipation (Tc=25°C)
P
W
D
Operating Junction Temperature
Operating Ambient Temperature
Storage Temperature Range
T
Internally limited
-25 to +85
°C
j
T
A
°C
T
-55 to +150
°C
STG
-
ESD Capability, HBM Model (All pins
except Vstr and Vfb)
2.0
kV
(GND-Vstr/Vfb=1.5kV)
ESD Capability, Machine Model (All pins
except Vstr and Vfb)
300
V
-
(GND-Vstr/Vfb=225V)
Notes:
1. Repetitive Rating: Pulse width limited by maximum junction temperature
2. Tc: Case Back Surface Temperature (With infinite heat sink)
3. T : Drain Lead Temperature (With infinite heat sink)
DL
4. L=14mH, starting Tj=25°C2. L=14mH, starting Tj=25°C
Thermal Impedance
Parameter
Symbol
Value
-
Unit
°C/W
°C/W
Junction-to-Ambient Thermal
Junction-to-Case Thermal
θJA
(1)
θJC
3.78
Notes:
1. Infinite cooling condition - refer to the SEMI G30-88.
4
FSDM0465RB
Electrical Characteristics
(Ta = 25°C unless otherwise specified)
Parameter
SenseFET SECTION
Symbol
Condition
Min. Typ. Max. Unit
Drain Source Breakdown Voltage
BV
DSS
V
V
= 0V, I = 250µA
650
-
-
-
-
V
GS
D
= 650V, V
= 0V
250
µA
DS
GS
Zero Gate Voltage Drain Current
I
DSS
V
V
= 520V
DS
-
-
-
250
2.6
µA
= 0V, T = 125°C
GS
C
Static Drain Source On Resistance (1)
Output Capacitance
R
V
GS
= 10V, I = 2.5A
D
2.2
Ω
DS(ON)
V
= 0V, V
= 25V,
DS
GS
f = 1MHz
C
-
60
-
pF
ns
OSS
Turn On Delay Time
Rise Time
T
V = 325V, I = 3.2A
DD D
-
-
-
-
23
20
65
27
-
-
-
-
D(ON)
T
R
Turn Off Delay Time
Fall Time
T
D(OFF)
T
F
CONTROL SECTION
Initial Frequency
F
V
= 3V
FB
60
0
66
1
72
3
kHz
%
OSC
Voltage Stability
F
13V ≤ Vcc ≤ 18V
STABLE
Temperature Stability (2)
Maximum Duty Cycle
Minimum Duty Cycle
Start Threshold Voltage
Stop Threshold Voltage
Feedback Source Current
Soft-start Time
∆F
-25°C ≤ Ta ≤ 85°C
0
±5
82
-
±10
87
0
%
OSC
D
MAX
MIN
-
-
77
-
%
D
%
V
V
FB
V
FB
V
FB
=GND
=GND
=GND
11
7
12
8
13
9
V
START
V
V
STOP
I
0.7
-
0.9
10
250
1.1
15
-
mA
ms
ns
FB
T
Vfb=3
S
Leading Edge Blanking Time
BURST MODE SECTION
T
-
-
LEB
V
Vcc=14V
Vcc=14V
-
-
0.7
0.5
-
-
V
V
BURH
Burst Mode Voltages
V
BURL
5
FSDM0465RB
Electrical Characteristics (Continued)
(Ta = 25°C unless otherwise specified)
Parameter
Symbol
Condition
Min. Typ. Max. Unit
PROTECTION SECTION
Peak Current Limit (3)
I
V
=5V, V =14V
CC
1.6
18
1.8
19
2.0
20
A
V
OVER
FB
Over Voltage Protection
Thermal Shutdown Temperature (2)
Shutdown Feedback Voltage
Shutdown Delay Current
TOTAL DEVICE SECTION
Startup Current (4)
V
-
-
OVP
130
5.5
2.8
145
6.0
3.5
160
6.5
4.2
°C
V
T
SD
V
V
V
≥ 5.5V
=5V
SD
FB
I
µA
DELAY
FB
I
V
FB
V
FB
V
FB
V
FB
=GND, V =11V
CC
-
-
1
1.3
5
mA
mA
start
I
=GND, V =14V
CC
OP
OP(MIN)
Operating Supply Current (4)
I
=GND, V =10V
CC
2.5
I
=GND, V =18V
CC
OP(MAX)
Notes:
1. Pulse test: Pulse width ≤ 300µS, duty ≤ 2%
2. These parameters, although guaranteed at the design, are not tested in mass production.
3. These parameters indicate the inductor current.
4. This parameter is the current flowing into the control IC.
6
FSDM0465RB
Typical Performance Characteristics
(These Characteristic Graphs are Normalized at Ta= 25°C)
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-25
0
25
50 75 100 125 150
-25
0
25
50
75 100 125 150
Junction Temperature(℃)
Junction Temperature(℃)
Operating Current vs. Temp
Start Threshold Voltage vs. Temp
1.2
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.0
0.8
0.6
0.4
0.2
0.0
-25
0
25
50
75 100 125 150
-25
0
25
50
75 100 125 150
Junction Temperature(℃)
Junction Temperature(℃)
Stop Threshold Voltage vs. Temp
Operating Frequency vs. Temp
1.2
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.0
0.8
0.6
0.4
0.2
0.0
-25
0
25
50
75 100 125 150
-25
0
25
50 75 100 125 150
Junction Temperature(℃)
Junction Temperature(℃)
Maximum Duty vs. Temp
Feedback Source Current vs. Temp
7
FSDM0465RB
Typical Performance Characteristics (Continued)
(These Characteristic Graphs are Normalized at Ta= 25°C)
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-25
0
25
50
75 100 125 150
-25
0
25
50
75 100 125 150
Junction Temperature(℃)
Junction Temperature(℃)
Shutdown Feedback Voltage vs. Temp
Shutdown Delay Current vs. Temp
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-25
0
25
50 75 100 125 150
-25
0
25
50 75 100 125 150
Junction Temperature(℃)
Junction Temperature(℃)
Over Voltage Protection vs. Temp
Burst Mode Enable Voltage vs. Temp
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-25
0
25
50 75 100 125 150
-50 -25
0
25
50
75 100 125
Junction Temperature(℃)
Junction Temperature(℃)
Burst Mode Disable Voltage vs. Temp
Current Limit vs. Temp
8
FSDM0465RB
Typical Performance Characteristics (Continued)
(These Characteristic Graphs are Normalized at Ta= 25°C)
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-50 -25
0
25
50
75 100 125
Junction Temperature(℃)
Soft Start Time vs. Temp
9
FSDM0465RB
2.1 Pulse-by-Pulse Current Limit: Because current mode
control is employed, the peak current through the SenseFET
is limited by the inverting input of the PWM comparator
(Vfb*) as shown in Figure 5. Assuming that the 0.9mA
current source flows only through the internal resistor (2.5R
+R= 2.8 kΩ), the cathode voltage of diode D2 is about 2.5V.
Since D1 is blocked when the feedback voltage (Vfb)
exceeds 2.5V, the maximum voltage of the cathode of D2 is
clamped at this voltage, thus clamping Vfb*. Therefore, the
peak value of the current through the SenseFET is limited.
Functional Description
1. Startup: In previous generations of Fairchild Power
Switches (FPSTM) the Vcc pin had an external start-up
resistor to the DC input voltage line. In this generation the
startup resistor is replaced by an internal high voltage current
source. At startup, an internal high voltage current source
supplies the internal bias and charges the external capacitor
(C ) that is connected to the Vcc pin as illustrated in Figure
a
4. When Vcc reaches 12V, the FSDM0465RB begins
switching and the internal high voltage current source is
disabled. Then, the FSDM0465RB continues its normal
switching operation and the power is supplied from the
auxiliary transformer winding unless Vcc goes below the
stop voltage of 8V.
2.2 Leading Edge Blanking (LEB): At the instant the
internal SenseFET is turned on, there usually exists a high
current spike through the SenseFET, caused by primary-side
capacitance and secondary-side rectifier reverse recovery.
Excessive voltage across the Rsense resistor would lead to
incorrect feedback operation in the current mode PWM
control. To counter this effect, the FSDM0465RB employs
an LEB circuit. This circuit inhibits the PWM comparator for
VDC
a short time (T
LEB
) after the, SenseFET is turned on.
Ca
Vcc
Idelay
Vref
IFB
Vcc
Vstr
Vfb
Vo
SenseFET
3
6
OSC
4
H11A817A
D1
D2
CB
2.5R
R
ICH
+
Gate
V *
Driver
fb
KA431
-
Vref
8V/12V
Vcc Good
OLP
Rsense
VSD
Internal
Bias
Figure 5. Pulse Width Modulation (PWM) Circuit
Figure 4. Internal Startup Circuit
3. Protection Circuit: The FSDM0465RB has several self
protective functions such as over load protection (OLP), over
voltage protection (OVP), and thermal shutdown (TSD).
Because these protection circuits are fully integrated into the
IC without external components, the reliability can be
improved without increasing cost. Once the fault condition
occurs, switching is terminated and the SenseFET remains
off. This causes Vcc to fall. When Vcc reaches the UVLO
stop voltage, 8V, the protection is reset and the internal high
voltage current source charges the Vcc capacitor via the Vstr
pin. When Vcc reaches the UVLO start voltage,12V, the
FSDM0465RB resumes its normal operation. In this manner,
the auto-restart can alternately enable and disable the
switching of the power Sense FET until the fault condition is
eliminated (see Figure 6).
2. Feedback Control: FSDM0465RB employs current
mode control, as shown in Figure 5. An opto-coupler (such
as the H11A817A) and shunt regulator (such as the KA431)
are typically used to implement the feedback network.
Comparing the feedback voltage with the voltage across the
Rsense resistor plus an offset voltage makes it possible to
control the switching duty cycle. When the reference pin
voltage of the KA431 exceeds the internal reference voltage
of 2.5V, the H11A817A LED current increases, thus
decreasing the feedback voltage and reducing the duty cycle.
This event typically happens when the input voltage is
increased or the output load is decreased.
10
FSDM0465RB
Fault
Occurs
Fault
Removed
VFB
Power
On
Vds
Over Load Protection
6.0V
2.5V
Vcc
T12= Cfb*(6.0-2.5)/Idelay
12V
8V
T1
Figure 7. Over Load Protection
T2
t
t
3.2 Over Voltage Protection (OVP): If the secondary side
feedback circuit malfunction or a solder defect caused an
open in the feedback path, the current through the opto-
coupler transistor becomes almost zero. Then, Vfb climbs up
in a similar manner to the over load situation, forcing the
preset maximum current to be supplied to the SMPS until the
over load protection is activated. Because more energy than
required is provided to the output, the output voltage may
exceed the rated voltage before the over load protection is
activated, resulting in the breakdown of the devices in the
secondary side. To prevent this situation, an OVP circuit is
employed. In general, Vcc is proportional to the output
voltage and the FSDM0465RB uses Vcc instead of directly
Normal
Operation
Fault
Situation
Normal
Operation
Figure 6. Auto Restart Operation
3.1 Over Load Protection (OLP): Overload is defined as
the load current exceeding a pre-set level due to an
unexpected event. In this situation, the protection circuit
should be activated to protect the SMPS.
However, even when the SMPS is operation normally, the
over load protection circuit can be activated during the load
transition. To avoid this undesired operation, the over load
protection circuit is designed to be activated after a specified
time to determine whether it is a transient situation or an
overload situation.
Because of the pulse-by-pulse current limit capability, the
maximum peak current through the SenseFET is limited, and
therefore the maximum input power is restricted with a given
input voltage. If the output consumes beyond this maximum
power, the output voltage (Vo) decreases below the set
voltage. This reduces the current through the opto-coupler
LED, which also reduces the opto-coupler transistor current,
thus increasing the feedback voltage (Vfb).
monitoring the output voltage. If V exceeds 19V, an OVP
CC
circuit is activated resulting in the termination of the
switching operation. To avoid undesired activation of OVP
during normal operation, Vcc should be designed to be
below 19V.
3.3 Thermal Shutdown (TSD): The SenseFET and the
control IC are built in one package. This makes it easy for
the control IC to detect the heat generation from the Sense
FET. When the temperature exceeds approximately 150°C,
the thermal shutdown is activated.
If Vfb exceeds 2.5V, D1 is blocked and the 3.5uA current
source starts to charge C slowly up to Vcc.
B
4. Soft Start: The FSDM0465RB’s internal soft-start circuit
slowly increases the PWM comparator’s inverting input
voltage along with the SenseFET current after it starts up.
The typical soft-start time is 10msec, The pulse width to the
power switching device is progressively increased to
establish the correct working conditions for transformers,
inductors, and capacitors. The voltage on the output
capacitors is progressively increased with the intention of
smoothly establishing the required output voltage. It also
helps to prevent transformer saturation and reduce the stress
on the secondary diode during startup.
In this condition, Vfb continues increasing until it reaches
6V, when the switching operation is terminated as shown in
Figure 7. The delay time for shutdown is the time required to
charge C from 2.5V to 6.0V with 3.5uA.
B
In general, a 10 ~ 50 ms delay time is typical for most
applications.
11
FSDM0465RB
5. Burst Operation: To minimize power dissipation in
standby mode, the FSDM0465RB enters burst mode
operation. As the load decreases, the feedback voltage
decreases. As shown in Figure 8, the device automatically
enters burst mode when the feedback voltage drops below
V
(500mV). At this point switching stops and the
BURL
output voltages start to drop at a rate dependent on the
standby current load. This causes the feedback voltage to
rise. Once it passes V
BURH
(700mV), switching resumes.
The feedback voltage then falls and the process repeats.
Burst mode operation alternately enables and disables
switching of the power SenseFET thereby reducing
switching loss in Standby mode.
Vo
Voset
VFB
0.7V
0.5V
Ids
Vds
time
Switing
Switching
Disabled
Switching
Disabled
T4
T2 T3
T1
Figure 8. Waveforms of Burst Operation
12
FSDM0465RB
Typical application circuit
Application
Output Power
34W
Input Voltage
Universal Input
(85-265Vac)
Output Voltage (Max Current)
5V (2.0A)
LCD Monitor
12V (2.0A)
Features
• High efficiency (>81% at 85Vac input)
• Low zero load power consumption (<300mW at 240Vac input)
• Low standby mode power consumption (<800mW at 240Vac input and 0.3W load)
• Low component count
• Enhanced system reliability through various protection functions
• Internal soft-start (10ms)
Key Design Notes
• Resistors R102 and R105 are employed to prevent start-up at low input voltage. After startup, there is no power loss in these
resistors since the startup pin is internally disconnected after startup.
• The delay time for over load protection is designed to be about 50ms with C106 of 47nF. If a faster triggering of OLP is
required, C106 can be reduced to 10nF.
• Zener diode ZD102 is used for a safety test such as UL. When the drain pin and feedback pin are shorted, the zener diode
fails and remains short, which causes the fuse (F1) to blow and prevents explosion of the opto-coupler (IC301). This zener
diode also increases the immunity against line surges.
1. Schematic
D202
MBRF10100
T1
EER3016
L201
12V, 2A
10
1
2
C202
1000uF
25V
C201
1000uF
25V
8
C104
2.2nF
1kV
R103
56kΩ
2W
R102
D101
C103
100uF
400V
30kΩ
UF 4007
3
R105
BD101
2KBP06M3N257
2
40kΩ
IC1
FSDM0465RB
6
5
Vstr
1
1
3
Drain
Vcc
D201
MBRF1045
L202
NC
3
5V, 2A
4
Vfb
4
7
4
ZD102
10V
D102
TVR10G
R104
5Ω
C204
1000uF
10V
GND
2
C105
22uF
50V
C203
1000uF
10V
6
C106
47nF
50V
C102
220nF
275VAC
ZD101
22V
5
C301
4.7nF
LF101
23mH
R201
1kΩ
R101
560kΩ
1W
R204
5.6kΩ
R202
1.2kΩ
R203
12kΩ
C205
47nF
IC301
H11A817A
IC201
KA431
F1
C101
220nF
275VAC
RT1
5D-9
FUSE
250V
2A
R205
5.6kΩ
13
FSDM0465RB
2. Transformer Schematic Diagram
EER3016
1
2
3
10
9
Np/2
N12V
Np/2
8
4
5
7
N5V
6
Na
3.Winding Specification
No
Pin (s→f)
4 → 5
Wire
0.2φ × 1
Turns
Winding Method
Na
8
Center Winding
Insulation: Polyester Tape t = 0.050mm, 2Layers
Np/2 2 → 1
0.4φ × 1
Insulation: Polyester Tape t = 0.050mm, 2Layers
10 → 8
0.3φ × 3
Insulation: Polyester Tape t = 0.050mm, 2Layers
N5V 7 → 6
0.3φ × 3
Insulation: Polyester Tape t = 0.050mm, 2Layers
Np/2 3 → 2
0.4φ × 1
18
7
Solenoid Winding
Center Winding
Center Winding
Solenoid Winding
N
12V
3
18
Outer Insulation: Polyester Tape t = 0.050mm, 2Layers
4.Electrical Characteristics
Pin
Specification
650uH ± 10%
10uH Max
Remarks
100kHz, 1V
2nd All Short
Inductance
1 - 3
1 - 3
Leakage Inductance
5. Core & Bobbin
Core: EER 3016
Bobbin: EER3016
Ae(mm2): 96
14
FSDM0465RB
6.Demo Circuit Part List
Part
F101
Value
2A/250V
5D-9
Note
Part
Value
Note
Fuse
NTC
C301
4.7nF
Polyester Film Cap.
Inductor
RT101
L201
L202
5uH
5uH
Wire 1.2mm
Wire 1.2mm
Resistor
R101
R102
R103
R104
R105
R201
R202
R203
R204
R205
560K
30K
56K
5
1W
1/4W
2W
1/4W
1/4W
1/4W
1/4W
1/4W
1/4W
1/4W
Diode
40K
1K
D101
D102
UF4007
TVR10G
1.2K
12K
5.6K
5.6K
D201
MBRF1045
MBRF10100
Zener Diode
Zener Diode
D202
ZD101
ZD102
22V
10V
Bridge Diode
BD101 2KBP06M 3N257
Bridge Diode
Capacitor
C101
C102
C103
C104
C105
C106
C201
C202
C203
C204
C205
220nF/275VAC
220nF/275VAC
100uF/400V
2.2nF/1kV
Box Capacitor
Line Filter
Box Capacitor
LF101
23mH
Wire 0.4mm
Electrolytic Capacitor
Ceramic Capacitor
Electrolytic Capacitor
Ceramic Capacitor
Electrolytic Capacitor
Electrolytic Capacitor
Electrolytic Capacitor
Electrolytic Capacitor
Ceramic Capacitor
IC
IC101
IC201
IC301
FSDM0465RB
KA431(TL431)
H11A817A
FPSTM(4A,650V)
Voltage Reference
Opto-Coupler
22uF/50V
47nF/50V
1000uF/25V
1000uF/25V
1000uF/10V
1000uF/10V
47nF/50V
15
FSDM0465RB
7. Layout
Figure 9. PCB Top Layout Considerations for FSDM0465RB
Figure 10. PCB Bottom Layout Considerations for FSDM0465RB
16
FSDM0465RB
Package Dimensions
TO-220F-6L(Forming)
17
FSDM0465RB
Ordering Information
Product Number
Package
TO-220F-6L(Forming)
Marking Code
BVdss
Rds(on) Max.
FSDM0465RBWDTU
WDTU: Forming Type
DM0465R
650V
2.6 Ω
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
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DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
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CORPORATION. As used herein:
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which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
10/14/05 0.0m 001
2005 Fairchild Semiconductor Corporation
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