FSDM1265RBWDTU [ONSEMI]
用于 90W 离线反激转换器的 650V 集成电源开关;
| 型号： | FSDM1265RBWDTU |
| 厂家： | 
ONSEMI |
| 描述： | 用于 90W 离线反激转换器的 650V 集成电源开关 局域网 开关 电源开关 转换器 |
| 文件： | 总22页 (文件大小：499K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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FSDM1265RB
TM
Green Mode Fairchild Power Switch (FPS )
Features
• Internal Avalanche Rugged Sense FET
• Advanced Burst-Mode operation that consumes less than
1 W at 240VAC and 0.5W load
• Precision Fixed Operating Frequency (66kHz)
• Internal Start-up Circuit
• Improved Pulse by Pulse Current Limiting
• Over-Voltage Protection (OVP)
• Over-Load Protection (OLP)
• Internal Thermal Shutdown Function (TSD)
• Auto-Restart Mode
• Under Voltage Lock Out (UVLO) with Hysteresis
• Low Operating Current (2.5mA)
• Built-in Soft Start
OUTPUT POWER TABLE(4)
(3)
230VAC ±15%
85-265VAC
PRODUCT
Adapt-
er
Open
Frame
Adapt- Open
er
(1)
(2)
(1)
(2)
Frame
FSDM0565RB
FSDM0565RBI
FSDM07652RB
FSDM1265RB
60W
60W
70W
90W
70W
70W
80W
110W
50W
50W
60W
80W
60W
60W
70W
90W
Table 1. Maximum Output Power
Notes:
1. Typical continuous power in a non-ventilated enclosed
adapter measured at 50°C ambient.
2. Maximum practical continuous power in an open- frame
design at 50°C ambient.
3. 230 VAC or 100/115 VAC with doubler.
Application
• SMPS (Switch Mode Power Supplies) for LCD monitor
and STB
4. The junction Temperature can limit the Maximum output power.
• Adapter
Description
The FSDM1265RB is an integrated Pulse-Width Modulator
(PWM) and a SenseFET which is specifically designed for
high performance offline SMPS with minimal external
components. This device is an integrated high-voltage power
switching regulator which combines a rugged avalanche
Sense FET with a current mode PWM control block. The
PWM controller includes integrated fixed frequency oscillator,
under-voltage lockout, leading edge blanking (LEB), optimized
gate driver, internal soft-start, and precise current sources that
are temperature compensated for loop compensation and self
protection circuitry. Compared with discrete MOSFET and
PWM controller solution, it can reduce total cost, component
count, size, and weight, while simultaneously increasing
efficiency, productivity, and system reliability. This device is a
basic platform which is well suited for cost effective designs
of flyback converters.
Typical Circuit
AC
IN
DC
OUT
Vstr
PWM
Drain
Vfb
Vcc
Source
Figure 1. Typical Flyback Application
FPSTM is a trademark of Fairchild Semiconductor Corporation.
©2005 Fairchild Semiconductor Corporation
Rev.1.0.0
FSDM1265RB
Internal Block Diagram
Vcc
3
Vstr
6
Drain
1
N.C 5
Istart
0.38/
+
Internal
Bias
0.49V
Vref
8V/12V
2.5R
Vcc good
-
Vcc
Vref
OSC
Idelay
IFB
PWM
R
S
Q
Q
FB 4
Gate
driver
R
Soft start
LEB
VSD
Vcc
Vovp
TSD
2 GND
S
Q
Q
R
Vcc good
VCL
Figure 2. Functional Block Diagram of FSDM1265RB
2
FSDM1265RB
Pin Definitions
Pin Number
Pin Name
Pin Function Description
This pin is the high voltage power Sense FET drain. It is designed to drive the
transformer directly.
1
2
Drain
GND
This pin is the control ground and the Sense FET source.
This pin is the positive supply voltage input. During startup, the power is supplied
by an internal high voltage current source that is connected to the Vstr pin.
When Vcc reaches 12V, the internal high voltage current source is disabled and
the power is supplied from the auxiliary transformer winding.
3
Vcc
This pin is internally connected to the inverting input of the PWM comparator.
The collector of an opto-coupler is typically tied to this pin. For stable operation,
a capacitor should be placed between this pin and GND. Once the pin reaches
4
5
6
Vfb
N.C
Vstr
6.0V, the overload protection is activated resulting in the shutdown of the FPSTM
.
This pin is connected directly to the high voltage DC link. At startup, the internal
high voltage current source supplies internal bias and charges the external ca-
pacitor that is connected to the Vcc pin. Once Vcc reaches 12V, the internal cur-
rent source is disabled.
Pin Configuration
TO-220F-6L
6.Vstr
5.N.C.
4.Vfb
3.Vcc
2.GND
1.Drain
Figure 3. Pin Configuration (Top View)
3
FSDM1265RB
Absolute Maximum Ratings
(Ta=25°C, unless otherwise specified)
Parameter
Symbol
Value
650
650
15.9
5.3
Unit
V
Drain-source Voltage
V
DSS
V
STR
I
DM
Vstr Max. Voltage
V
Pulsed Drain Current (Tc=25°C)(1)
Continuous Drain Current(Tc=25°C)
Continuous Drain Current(Tc=100°C)
Supply Voltage
A
DC
A
A
V
V
I
D
3.4
V
CC
20
Input Voltage Range
V
FB
-0.3 to V
CC
Total Power Dissipation
(Tc=25°C with Infinite Heat Sink)
P
50
W
D
Operating Junction Temperature
Operating Ambient Temperature
Storage Temperature Range
T
Internally limited
-25 to +85
°C
°C
°C
kV
j
T
A
T
-55 to +150
STG
-
ESD Capability, HBM Model (All Pins
except for Vstr and Vfb)
2.0
(GND-Vstr/Vfb=1.5kV)
ESD Capability, Machine Model (All Pins
except for Vstr and Vfb)
300
V
-
(GND-Vstr/Vfb=225V)
Notes:
1. Repetitive rating: Pulse width limited by maximum junction temperature
Thermal Impedance
Parameter
Symbol
Package
Value
Unit
(1)
Junction-to-Case Thermal
θJC
TO-220F-6L
2.5
°C/W
Notes:
1. Infinite cooling condition - Refer to the SEMI G30-88.
4
FSDM1265RB
Electrical Characteristics
(Ta = 25°C unless otherwise specified)
Parameter
Sense FET SECTION
Symbol
Condition
Min. Typ. Max. Unit
Drain-source breakdown voltage
BV
DSS
V
V
= 0V, I = 250µA
650
-
-
-
-
V
GS
D
= 650V, V
= 0V
500
µA
DS
GS
Zero gate voltage drain current
I
DSS
V
V
= 520V
DS
-
-
-
500
0.9
µA
= 0V, T = 125°C
GS
C
Ω
Static drain source on resistance
Output capacitance
R
V
GS
= 10V, I = 2.5A
0.75
DS(ON)
D
V
= 0V, V
= 25V,
DS
GS
f = 1MHz
C
-
78
-
pF
ns
OSS
Turn-on delay time
Rise time
T
-
-
-
-
42
-
-
-
-
D(ON)
T
R
106
330
110
V
DD
= 325V, I = 5A
D
Turn-off delay time
Fall time
T
D(OFF)
T
F
CONTROL SECTION
Initial frequency
F
V
= 3V
60
0
66
1
72
3
kHz
%
OSC
FB
Voltage stability
F
13V ≤ Vcc ≤ 18V
STABLE
Temperature stability (1)
Maximum duty cycle
Minimum duty cycle
Start threshold voltage
Stop threshold voltage
Feedback source current
Soft-start time
∆F
-25°C ≤ Ta ≤ 85°C
0
±5
82
-
±10
87
0
%
OSC
D
MAX
MIN
-
-
77
-
%
D
%
V
V
FB
V
FB
V
FB
=GND
=GND
=GND
11
7
12
8
13
9
V
START
V
V
STOP
I
0.7
-
0.9
10
250
1.1
15
-
mA
ms
ns
FB
T
Vfb=3
S
Leading edge blanking time
BURST MODE SECTION
T
-
-
LEB
V
Vcc=14V
Vcc=14V
0.3
0.38
0.46
0.59
V
V
BURH
Burst mode voltages(1)
V
0.39 0.49
BURL
5
FSDM1265RB
Electrical Characteristics (Continued)
(Ta = 25°C unless otherwise specified)
Parameter
PROTECTION SECTION
Peak current limit (2)
Symbol
Condition
Min. Typ. Max. Unit
I
V
=5V, V =14V
CC
3.0
18
3.4
19
3.8
20
A
V
OVER
FB
Over voltage protection (OVP)
Thermal shutdown temperature (1)
Shutdown feedback voltage
Shutdown delay current
V
-
OVP
T
SD
130
5.5
2.8
145
6.0
3.5
160
6.5
4.2
°C
V
V
V
V
≥ 5.5V
SD
FB
I
=5V
µA
DELAY
FB
TOTAL DEVICE SECTION
I
V
FB
V
FB
V
FB
=GND, V =14V
CC
OP
Operating supply current (3)
I
=GND, V =10V
CC
-
2.5
5
mA
OP(MIN)
I
=GND, V =18V
CC
OP(MAX)
Notes:
1. These parameters, although guaranteed at the design level, are not tested in mass production.
2. These parameters indicate the inductor current.
3. This parameter is the current flowing into the control IC.
6
FSDM1265RB
Comparison of FS6M12653RTC and FSDM1265RB
Function
FS6M12653RTC
FSDM1265RB
FSDM1265RB Advantages
Soft-Start
Adjustable soft-start Typical Internal soft- • Gradually increasing current limit
time using an
external capacitor
start of 10ms (fixed)
during soft-start reduces peak current
and voltage component stresses
• Eliminates external components used
for soft-start in most applications
• Reduces or eliminates output
overshoot
Burst Mode Operation • Built into controller • Built into controller • Improves ight-load efficiency
• Output voltage
• Output voltage fixed • Reduces no-load consumption
drops to about half
7
FSDM1265RB
Typical Performance Characteristics
(These Characteristic Graphs are Normalized at Ta= 25°C)
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-50 -25
0
25
50
75 100 125
-50 -25
0
25
50
75
100 125
Junction Temperature(℃)
Junction Temperature(℃)
Operating Current vs. Temperature
Operating Freqency vs. Temperature
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-50 -25
0
25
50
75 100 125
-50 -25
0
25
50
75
100 125
Junction Temperature(℃)
Junction Temperature(℃)
Start Threshold Voltage vs. Temperature
Stop Threshold Voltage vs. Temperature
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-50 -25
0
25
50
75
100 125
-50 -25
0
25
50
75
100 125
Junction Temperature(℃)
Junction Temperature(℃)
Maximum Duty vs. Temperature
Feedback Source Current vs. Temperature
8
FSDM1265RB
Typical Performance Characteristics (Continued)
(These Characteristic Graphs are Normalized at Ta= 25°C)
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-50 -25
0
25
50
75
100 125
-50 -25
0
25
50
75
100 125
Junction Temperature(℃)
Junction Temperature(℃)
ShutDown Feedback Voltage vs. Temperature
ShutDown Delay Current vs. Temperature
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-50 -25
0
25
50
75
100 125
-50 -25
0
25
50
75
100 125
Junction Temperature(℃)
Junction Temperature(℃)
Current Limit VS. Temperature
Over Voltage Protection vs. Temperature
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-50 -25
0
25
50
75
100 125
-50 -25
0
25
50
75
100 125
Junction Temperature(℃)
Junction Temperature(℃)
Burst Mode Enable Voltage vs. Temperature
Burst Mode Disable Voltage vs. Temperature
9
FSDM1265RB
Typical Performance Characteristics (Continued)
(These Characteristic Graphs are Normalized at Ta= 25°C)
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-50 -25
0
25
50
75
100 125
Junction Temperature(℃)
Soft-start Time vs. Temperature
10
FSDM1265RB
Functional Description
2.1 Pulse-by-pulse current limit: Because current mode
control is employed, the peak current through the Sense-FET
is limited by the inverting input of PWM comparator (Vfb*)
as shown in Figure 5. Assuming that the 0.9mA current
source flows only through the internal resistor (2.5R +R= 2.8
kΩ), the cathode voltage of diode D2 is about 2.5V. Since D1
is blocked when the feedback voltage (Vfb) exceeds 2.5V,
the maximum voltage of the cathode of D2 is clamped at this
voltage, thus clamping Vfb*. Therefore, the peak value of
the current through the Sense FET is limited.
1. Star-tup: In previous generations of Fairchild Power
Switches (FPSTM), the Vcc pin had an external start-up to
the DC input voltage line. In the newer switches, the startup
resistor is replaced by an internal high voltage current
source. At startup, an internal high voltage current source
supplies the internal bias and charges the external capacitor
(C ) that is connected to the Vcc pin as illustrated in
vcc
Figure 4. When the Vcc pin reaches 12V, the FSDM1265RB
begins switching and the internal high voltage current source
is disabled. Then, the FSDM1265RB continues its normal
switching operation and the power is supplied from the
auxiliary transformer winding unless Vcc goes below the
stop voltage of 8V.
2.2 Leading edge blanking (LEB): When the internal Sense
FET is turned on, usually the reverse recovery of the
primary-side capacitance and the secondary-side rectifier
causes a high current spike through the SenseFET. causes
Excessive voltage across the Rsense resistor can lead to
incorrect feedback operation in the current mode PWM
control. To counter this effect, the FSDM1265RB employs a
leading edge blanking (LEB) circuit. This circuit inhibits the
VDC
CVcc
PWM comparator for a short time (T
SenseFET is turned on.
) after the
LEB
Vcc
Vstr
3
6
Vcc
Idelay
Vref
IFB
Istart
Vfb
Vo
SenseFET
Vref
OSC
4
H11A817A
D1
D2
8V/12V
Vcc good
CB
2.5R
R
+
Gate
driver
V
*
Internal
Bias
fb
KA431
-
OLP
Rsense
VSD
Figure 4. Internal startup circuit
Figure 5. Pulse width modulation (PWM) circuit
3. Protection Circuit: The FSDM1265RB has several self
protective functions such as overload protection (OLP), over
voltage protection (OVP) and thermal shutdown (TSD). Because
these protection circuits are fully integrated into the IC without
external components, the reliability can be improved without
increasing cost. Once the fault condition occurs, switching is
terminated and the SenseFET remains off. This causes Vcc to fall.
When Vcc reaches the UVLO stop voltage (8V), the protection is
reset and the internal high voltage current source charges the Vcc
capacitor via the Vstr pin. When the Vcc reaches the UVLO start
voltage (12 V), the FSDM1265RB resumes its normal operation.
Thus, the auto-restart alternately enables and disables the switching
of the power SenseFET until the fault condition is eliminated
(see Figure 6).
2. Feedback Control: FSDM1265RB employs current mode
control, as shown in Figure 5. An opto-coupler (such as the
H11A817A) and shunt regulator (such as the KA431) are
typically used to implement the feedback network.
Comparing the feedback voltage with the voltage across the
Rsense resistor in addition to the offset voltage makes it possible
to control the switching duty cycle. When the reference pin voltage
of the KA431 exceeds the internal reference voltage of 2.5V, the
H11A817A LED current increases, thereby pulling down the
feedback voltage and reducing the duty cycle. Typically this
h
appens when the input voltage is increased or the output
load is decreased.
11
FSDM1265RB
VFB
Fault
occurs
Fault
Power
on
Over load protection
Vds
removed
6.0V
2.5V
Vcc
T12= Cfb*(6.0-2.5)/Idelay
T1
Figure 7. Ove
T2
t
12V
8V
r
Load Protection
t
3.2 Over voltage Protection (OVP): If the secondary side
Normal
operation
Fault
situation
Normal
operation
feedback circuit malfunctions or a solder defect causes an open in
the feedback path, the current through the opto-coupler transistor
becomes almost zero. Then, Vfb climbs up in a similar manner to
the over load situation forcing the pre-set maximum current to be
supplied to the SMPS until the OLP is activated. Because more
energy than required is provided to the output, the output voltage
may exceed the rated voltage before the OLP is activated, resulting
in the breakdown of the devices in the secondary side. In order to
prevent this situation, an OVP circuit is used. Generally, Vcc is
proportional to the output voltage and the FSDM1265RB uses Vcc
Figure 6. Auto Restart Operation
3.1 Over Load Protection (OLP): Overload occurs when
the load current exceeds a pre-set level due to an unexpected
event. The protection circuit (OLP) is activated to protect the
SMPS. However, even when the SMPS is operating normally, the
OLP circuit can become activate during the load transition. To
avoid this undesired operation, the OLP circuit is designed to
become activate after a specified time to determine whether it is in a
transient or an overload mode. Because of the pulse-by-pulse
current limit capability, the maximum peak current through the
SenseFET is limited, and therefore the maximum input power is
restricted with a given input voltage. If the output consumes beyond
this maximum power, the output voltage (Vo) decreases below the
set voltage. This reduces the current through the opto-coupler LED,
which also reduces the opto-coupler transistor current, thus
increasing the feedback voltage
instead of directly monitoring the output voltage. If V
exceeds
CC
19V, an OVP circuit is activated resulting in the termination
of the switching operation. In order to avoid undesired
activation of OVP during normal operation, Vcc should be
designed to be below 19V.
3.3 Thermal Shutdown (TSD): The SenseFET and the control
IC are built in one package making it easy for the control IC to
detect the heat generated by the SenseFET. When the temperature
exceeds approximately 150°C, the thermal shutdown is
activated.
(Vfb). If Vfb exceeds 2.5V, D1 is blocked and the 3.5uA current
source slowly starts to charge C up to Vcc. In this condition, Vfb
B
continues increasing until it reaches 6V. Then the switching
operation terminates as shown in Figure 7. The delay time for
shutdown is the time required to charge C from 2.5V to 6.0V
B
with 3.5uA. In general, a 10 ~ 50 ms delay is typical for most
applications.
4. Soft Start: The FSDM1265RB has an internal soft-start circuit,
which increases the PWM comparator and slowly inverts the input
voltage together with the SenseFET current, after it starts up. The
typical soft-start time is 10ms, The pulse width to the power
switching device is progressively increased to establish the correct
working conditions for transformers, inductors, and capacitors. The
voltage on the output capacitors is progressively increased to
smoothly establish the required output voltage. This also helps
prevent transformer saturation and reduce the stress on the
secondary diode during startup.
5. Burst operation: To minimize power dissipation in the
standby mode, the FSDM1265RB enters burst mode operation. As
the load decreases, the feedback voltage decreases. As shown
12
FSDM1265RB
in Figure 8, the device automatically enters burst mode when
the feedback voltage drops below V (380mV). At this
BURL
point switching stops and the output voltages start to drop at
a rate dependent on the standby current load. This causes the
feedback voltage to rise. Once it passes V
BURH
(490mV),
switching resumes. The feedback voltage then falls and the
process repeats. Burst mode operation alternately enables
and disables switching of the power SenseFET, thereby
reducing switching loss in the Standby mode.
Vo
Vose
t
VFB
0.49V
0.38V
Ids
Vds
time
Switching
Switching
disabled
T
4
T
2
T
3
disabled
T
1
Figure 8. Waveforms of BurstOperation
13
FSDM1265RB
Typical Application Circuit
Application
Output Power
Input Voltage
Universal input
(85-265Vac)
Output Voltage (Max. Current)
5V (4.0A)
LCD Monitor
62W
12V (3.5A)
Features
• High efficiency (>81% at 85Vac input)
• Low zero load power consumption (<300mW at 240Vac input)
• Low standby mode power consumption (<800mW at 240Vac input and 0.3W load)
-
-
• Low component count
• Enhanced system reliability through several protection functions
• Internal soft-start (10ms)
Key Design Notes
• Resistors R102 and R105 are employed to prevent start-up at low input voltage. After start-up, there is no power loss in
these resistors since the start up pin is internally disconnected after start-up.
-
• The delay time for OLP is designed to be about 50ms with C106 of 47nF. If you require a faster triggering of OLP , reduce
the C106 to 10nF.
• Zener diode ZD102 is used for a safety test such as UL. When the drain pin and feedback pin are shorted, the zener diode
fails and remains short, which causes the fuse (F1) to blow and prevents explosion of the opto-coupler (IC301). The zener
diode also increases immunity against a line surge.
1. Schematic
L20
1
D202
T1
EER3016
MBRF10100
12V,
3.5A
10
8
C202
1000u
F
1
2
C201
1000uF
25V
C104
2.2nF
1kV
25V
R103
56kΩ
2W
R102
30kΩ
D101
UF 4007
C103
200uF
400V
3
R105
40kΩ
BD101
2
IC1
2KBP06M3N257
FSDM1265R
B
6
5
Vstr
1
1
3
Drain
L20
2
D201
MBRF1045
NC
3
Vcc
5V, 4A
Vf
b
4
4
7
4
C204
1000u
F
ZD102
10V
D102
TVR10G
R104
5Ω
GND
2
C105
47uF
50V
C203
1000uF
10V
C102
220nF
275VA
C
C106
47nF
50V
ZD101
22V
10V
6
5
C301
4.7nF
LF101
23mH
R201
1kΩ
R101
560kΩ
1W
R204
10kΩ
R202
1.2kΩ
R203
12kΩ
C205
47nF
IC301
H11A817A
IC201
KA431
C101
220nF
275VA
C
F1
RT1
5D-9
FUSE
250V
2A
R205
10kΩ
14
FSDM1265RB
2. Transformer Schematic Diagram
EER3016
1
2
3
10
9
Np/2
Np/2
N12V
8
4
5
7
N5V
6
Na
3.Winding Specification
No
Pin (s→f)
4 → 5
Wire
0.2φ × 1
Turns
Winding Method
Na
8
Center Winding
Solenoid Winding
Center Winding
Center Winding
Solenoid Winding
Insulation: Polyester Tape t = 0.050mm, 2Layers
Np/2 2 → 1
0.4φ × 1
Insulation: Polyester Tape t = 0.050mm, 2Layers
10 → 8
0.3φ × 3
Insulation: Polyester Tape t = 0.050mm, 2Layers
N5V 7 → 6
0.3φ × 3
Insulation: Polyester Tape t = 0.050mm, 2Layers
Np/2 3 → 2
0.4φ × 1
18
7
N
12V
3
18
Outer Insulation: Polyester Tape t = 0.050mm, 2Layers
4.Electrical Characteristics
Pin
Specifications
420uH ± 10%
10uH Max.
Remarks
Inductance
1 - 3
1 - 3
100kHz, 1V
2
nd all short
Leakage Inductance
5. Core & Bobbin
Core: EER 3016
Bobbin: EER3016
Ae(mm2): 96
15
FSDM1265RB
6.Demo Circuit Part List
Part
F101
Value
2A/250V
5D-9
Note
Part
Value
Note
Fuse
NTC
C301
4.7nF
Polyester Film Cap.
Inductor
RT101
L201
L202
5uH
5uH
Wire 1.2mm
Wire 1.2mm
Resistor
R101
R102
R103
R104
R105
R201
R202
R203
R204
R205
560K
30K
56K
5
1W
1/4W
2W
1/4W
1/4W
1/4W
1/4W
1/4W
1/4W
1/4W
Diode
40K
1K
D101
D102
UF4007
TVR10G
1.2K
12K
10K
10K
D201
MBRF1045
MBRF10100
Zener Diode
Zener Diode
D202
ZD101
ZD102
22V
10V
Bridge Diode
BD101 2KBP06M 3N257
Bridge Diode
Capacitor
C101
C102
C103
C104
C105
C106
C201
C202
C203
C204
C205
220nF/275VAC
220nF/275VAC
200uF/400V
2.2nF/1kV
Box Capacitor
Line Filter
IC
Box Capacitor
LF101
23mH
Wire 0.4mm
Electrolytic Capacitor
Ceramic Capacitor
Electrolytic Capacitor
Ceramic Capacitor
Electrolytic Capacitor
Electrolytic Capacitor
Electrolytic Capacitor
Electrolytic Capacitor
Ceramic Capacitor
IC101
IC201
IC301
FSDM1265RB
KA431(TL431)
H11A817A
FPSTM(12A,650V)
Voltage reference
Opto-coupler
47uF/50V
47nF/50V
1000uF/25V
1000uF/25V
1000uF/10V
1000uF/10V
47nF/50V
16
FSDM1265RB
7. Layout
Figure 9. Layout Considerations for FSDM1265RB
Figure 10. Layout Considerations for FSDM1265RB
17
FSDM1265RB
Package Dimensions
TO-220F-6L(Forming)
18
FSDM1265RB
Ordering Information
Product Number
Package
TO-220F-6L(Forming)
Marking Code
BVdss
Rds(on)Max
0.9 Ω
FSDM1265RBWDTU
WDTu: Forming Type
DM1265RB
650V
19
FSDM1265RB
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
7/27/05 0.0m 001
2005 Fairchild Semiconductor Corporation
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