FSL137HNY [ONSEMI]
用于 19 W 离线反激式转换器的 700 V 集成电源开关，100 kHz，提供通电/欠压保护;
| 型号： | FSL137HNY |
| 厂家： | 
ONSEMI |
| 描述： | 用于 19 W 离线反激式转换器的 700 V 集成电源开关，100 kHz，提供通电/欠压保护 开关 信息通信管理 电源开关 光电二极管 转换器 |
| 文件： | 总15页 (文件大小：1192K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Green Mode Power Switch
FSL137H
Description
The highly integrated FSL137H consists of an integrated current
mode Pulse Width Modulator (PWM) and an avalanche−rugged 700 V
®
SENSEFET . It is specifically designed for high−performance offline
Switch Mode Power Supplies (SMPS) with minimal external
components.
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The integrated PWM controller features include a proprietary
green−mode function that provides off−time modulation to linearly
decrease the switching frequency at light−load conditions to minimize
standby power consumption. To avoid acoustic noise problems,
the minimum PWM frequency is set above 18 kHz. The green−mode
function enables the power supply to meet international power
conservation requirements. With the internal high−voltage startup
circuitry, the power loss due to bleeding resistors is also eliminated.
To further reduce power consumption, the PWM controller is
manufactured using the BiCMOS process, which allows an operating
current of only 3.5 mA.
PDIP8 9.59x6.6, 2.54P
CASE 646CM
MARKING DIAGRAM
The FSL137H built−in synchronized slope compensation achieves
stable peak−current−mode control. The proprietary external line
compensation ensures constant output power limit over a wide
$Y&Z&2&K
L137H
AC input voltage range, from 90 V to 264 V
.
AC
AC
The FSL137H provides many protection functions. In addition
to cycle−by−cycle current limiting, the internal open−loop protection
circuit ensures safety when an open−loop or output short−circuit
$Y
&Z
&2
&K
= ON Semiconductor Logo
= Assembly Plant Code
= 2−Digit Date code format
= 2−Digits Lot Run Traceability Code
= Specific Device Code Data
failure occurs. PWM output is disabled until V
drops below
DD
the UVLO lower limit, when the controller starts up again. As long as
exceeds ~28 V, the internal OVP circuit is triggered.
L137H
V
DD
Compared to a discrete MOSFET and controller or RCC switching
converter solution, the FSL137H reduces total component count,
design size, and weight while increasing efficiency, productivity,
and system reliability. These devices provide a basic platform well
suited for design of cost−effective flyback converters.
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
Features
• Built−in 5 ms Soft−Start Function
• Internal Avalanche Rugged 700 V SENSEFET
• Low Audio Noise
Applications
General−purpose switch−mode power
supplies and flyback power converters,
including:
• High−Voltage Startup
• Fixed PWM Frequency at 100 kHz
• Linearly Decreasing PWM Frequency to 18 kHz
• Peak−Current−Mode Control
• Cycle−by−Cycle Current Limiting
• Leading−Edge Blanking (LEB)
• Synchronized Slope Compensation
• Internal Open−loop Protection (OLP)
• SMPS for VCR, STB, DVD & VCD
Player, Printer, Facsimile, & Scaner
• Adapter for Camcorder
• V Under−Voltage Lockout (UVLO)
DD
• V Over−Voltage Protection (OVP)
DD
• Constant Power Limit (Full AC Input Range)
• Internal OTP Sensor with Hysteresis
© Semiconductor Components Industries, LLC, 2009
1
Publication Order Number:
June, 2020 − Rev. 2
FSL137H/D
FSL137H
Table 1. ORDERING INFORMATION
Part Number
Operating Temperature Range
−40°C to 105°C
SENSEFET
3.0 A 700 V
Package
Packing Method
FSL137HNY
8−Lead, Dual In−line Package (DIP)
Tube
APPLICATION DIAGRAM
Figure 1. Typical Flyback Application
Table 2. OUTPUT POWER TABLE (Note 1)
230 V + 15% (Note 2)
85−265 V
AC
AC
Adapter (Note 3)
17.5 W
Open Frame (Note 4)
Adapter (Note 3)
Open Frame (Note 4)
Product
FSL137H
25 W
13 W
19 W
1. The maximum output power can be limited by junction temperature.
2. 230 V or 100/115 V with doublers.
AC
AC
3. Typical continuous power in a non−ventilated enclosed adapter with sufficient drain pattern as a heat sink, at T = 50°C ambient.
A
4. Maximum practical continuous power in an open−frame design with sufficient drain pattern as a heat sink, at T = 50°C ambient.
A
INTERNAL BLOCK DIAGRAM
Figure 2. Internal Block Diagram
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2
FSL137H
PIN CONFIGURATION
GND
VDD
FB
Drain
Drain
8−DIP
Drain
HV
VIN
Figure 3. Pin Configuration
Table 3. PIN DEFINITIONS
Pin No.
Name
GND
VDD
FB
Description
1
2
3
Ground. SENSEFET source terminal on primary side and internal controller ground.
Power Supply. The internal protection circuit disables PWM output as long as V exceeds the OVP trigger point.
DD
Feedback. The signal from the external compensation circuit is fed into this pin. The PWM duty cycle is determined
in response to the signal on this pin and the internal current−sense signal.
4
VIN
Line−Voltage Detection. The line−voltage detection is used for brownout protection with hysteresis and constant
output power limit over universal AC input range. This pin has additional protections that are pull−HIGH latch and
pull−low auto recovery, depending on the application.
5
HV
Startup. For startup, this pin is pulled HIGH to the line input or bulk capacitor via resistors.
SENSEFET Drain. High−voltage power SENSEFET drain connection.
6, 7, 8
Drain
Table 4. ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Min
Max
700
12
Unit
V
V
DRAIN
Drain Pin Voltage (Note 5, 6)
Drain Current Pulsed (Note 7)
Single Pulsed Avalanche Energy (Note 8)
DC Supply Voltage
I
A
DM
E
AS
230
30
mJ
V
V
VDD
V
FB Pin Input Voltage
−0.3
−0.3
7.0
V
FB
V
VIN
VIN Pin Input Voltage
7.0
V
V
HV Pin Input Voltage
700
1.5
V
HV
P
Power Dissipation (T < 50°C)
W
D
A
q
Junction−to−Air Thermal Resistance
80
°C/W
°C/W
°C
°C
°C
kV
JA
Y
Junction−to−Top Thermal Resistance (Note 9)
Operating Junction Temperature
35
JT
T
+150
150
+260
4.5
J
T
STG
Storage Temperature Range
−55
T
Lead Temperature (Wave Soldering or IR, 10 Seconds)
L
ESD
Electrostatic Discharge Capability,
All Pins Except HV Pin (Note 10)
Human Body Model: JESD22−A114
Charged Device Model: JESD22−C101
1.5
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
5. All voltage values, except differential voltages, are given with respect to the network ground terminal.
6. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
7. Non−repetitive rating: Pulse width is limited by maximum junction temperature.
8. L = 51 mH, starting T = 25°C.
J
9. Measured on the package top surface.
10.All pins including HV pin: HBM = 1 kV, CDM = 1.25 kV
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3
FSL137H
Table 5. RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Operating Ambient Temperature
Min
Max
Unit
T
A
−40
+105
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
Table 6. ELECTRICAL CHARACTERISTICS (V = 15 V, T = 25°C unless otherwise noted)
DD
A
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
SENSEFET SECTION (Note 11)
BV
Drain−Source Breakdown Voltage
Zero−Gate−Voltage Drain Current
V
V
V
= 0 V
700
V
DSS
GS
DS
DS
I
= 700 V, V = 0 V
0.5
1
50.0
200
DSS
GS
mA
= 560 V, V = 0 V,
T = 125°C
GS
A
R
Drain−Source On−State Resistance
(Note 12)
V
GS
= 10 V, I = 0.5 A
4.00
4.75
W
DS(ON)
D
C
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn−on Delay Time
Rise Time
V
GS
V
GS
V
GS
V
DS
V
DS
V
DS
V
DS
= 0 V, V = 25 V, f = 1MHz
315
47
410
61
pF
pF
pF
ns
ns
ns
ns
ISS
DS
C
= 0 V, V = 25 V, f = 1MHz
DS
OSS
RSS
C
= 0 V, V = 25 V, f = 1MHz
9
14
DS
t
= 350 V, I = 1.0 A
11.2
34
33.0
78
d(on)
D
t
r
= 350 V, I = 1.0 A
D
t
Turn−off Delay Time
Fall Time
= 350 V, I = 1.0 A
28.2
32
67.0
74
d(off)
D
t
f
= 350 V, I = 1.0 A
D
V
DD
SECTION
V
Continuously Operating Voltage
Start Threshold Voltage
22
13
9
V
V
OP
V
11
7
12
8
DD−ON
V
Minimum Operating Voltage
Startup Current
V
DD−OFF
I
V
V
V
V
− 0.16 V
30
4.0
mA
mA
mA
mA
V
DD−ST
DD−OP
DD−BM
DD−OLP
DD−ON
I
I
Operating Supply Current
Green−Mode Operating Supply Current
Internal Sink Current
= 15 V, V = 3 V
3.0
3.5
2
DD
FB
FB
= V
FB−G
I
+ 0.1 V
30
5
60
6
90
7
TH−OLP
V
I
Off Voltage
TH−OLP
DD−OLP
V
V
Over−Voltage Protection
Over−Voltage Protection
27
75
28
130
29
200
V
DD−OVP
DD
DD
t
V
ms
D−VDDOVP
Debounce Time
HV SECTION
I
Maximum Current Drawn from HV Pin
Leakage Current After Startup
HV 120 V , V = 0 V with 10 mF
1.5
3.5
1
5.0
20
mA
HV
DC
DD
I
HV 700 V, V = V + 1 V
DD−OFF
mA
HV−LC
DD
OSCILLATOR SECTION
f
Frequency in Nominal Mode
Green−Mode Frequency
Maximum Duty Cycle
Center Frequency
94
14
100
18
106
22
kHz
kHz
%
OSC
f
OSC−G
D
85
MAX
f
Frequency Variation vs. V Deviation
V = 9 V to 22 V
DD
5
5
%
DV
DD
f
Frequency Variation vs. Temperature
Deviation (Note 11)
T = −40 to +105°C
A
%
DT
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4
FSL137H
Table 6. ELECTRICAL CHARACTERISTICS (V = 15 V, T = 25°C unless otherwise noted) (continued)
DD
A
Symbol
SECTION
Parameter
Test Condition
Min
Typ
Max
Unit
V
IN
V
PWM Turn−on Threshold Voltage
Release Latch Voltage
0.98
0.65
4.9
1.03
0.70
5.2
1.08
0.75
5.5
V
V
IN−ON
V
IN−RL
V
Pull HIGH Latch Trigger Level
Pull HIGH Latch Debounce Time
Pull LOW Auto Recovery Trigger Level
V
IN−H
IN−H
t
100
0.3
ms
V
V
0.2
0.4
IN−L
FEEDBACK INPUT SECTION
FB Voltage to Current−Sense Attenuation
A
V
1⁄4
V/V
kW
V
Z
Input Impedance
9.5
FB
FB−OPEN
V
Output High Voltage
FB Open−Loop Trigger Level
5
V
4.4
50
4.6
56
4.8
59
V
FB−OLP
t
Delay Time of FB Pin Open−loop
Protection
ms
D−OLP
V
Green−Mode Entry FB Voltage
Green−Mode Ending FB Voltage
2.3
2.5
2.7
V
V
FB−N
V
FB−G
V
FB−N
− 0.1
V
Zero Duty Cycle FB Voltage
1.9
2.1
2.3
V
FB−ZDC
PWM Frequency
f
OSC
f
OSC−G
V
FB−N
V
V
V
FB
FB−ZDC FB−G
Figure 4. VFB vs. PWM Frequency
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
CURRENT−SENSE SECTION
I
V
Peak Current Limit
V
V
= 1.2 V
= 3.6 V
0.74
0.64
4.5
0.84
0.74
5.0
0.94
0.84
5.5
A
A
LIM at IN
IN
= 1.2 V
I
V
Peak Current Limit
LIM at IN
IN
= 3.6 V
t
Period during Soft Startup Time (Note 11)
ms
SS
OVER−TEMPERATURE PROTECTION SECTION (OTP)
T
OTP
Protection Junction Temperature
(Notes 11, 13)
142
°C
11. These parameters, although guaranteed, are not 100% tested in production.
12.Pulse test: pulse width ≤ 300 ms, duty ≤ 2%.
13.When activated, the output is disabled and the latch is turned off.
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5
FSL137H
TYPICAL CHARACTERISTICS
Figure 6. IDD−OP vs. Temperature
Figure 5. IDD−ST vs. Temperature
Figure 7. VDD−ON vs. Temperature
Figure 8. VDD−OFF vs. Temperature
Figure 9. VTH−OLP vs. Temperature
Figure 10. VDD−OVP vs. Temperature
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6
FSL137H
TYPICAL CHARACTERISTICS (continued)
Figure 12. fOSC vs. Temperature
Figure 11. IHV vs. Temperature
Figure 14. VIN−ON vs. Temperature
Figure 13. fOSC−G vs. Temperature
Figure 16. VIN−H vs. Temperature
Figure 15. VIN−RL vs. Temperature
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7
FSL137H
TYPICAL CHARACTERISTICS (continued)
Figure 18. VFB−N vs. Temperature
Figure 17. VIN−L vs. Temperature
Figure 20. tD−OLP vs. Temperature
Figure 19. VFB−OLP vs. Temperature
Figure 21. VFB−ZDC vs. Temperature
Figure 22. IDD−BM vs. Temperature
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8
FSL137H
FUNCTIONAL DESCRIPTION
Startup Operation
For startup, the HV pin is connected to the line input or
frequency, as shown in Figure 25, such that the switching
frequency decreases as load decreases. In heavy load
bulk capacitor through the external resistor, R , as shown
HV
in Figure 23. Typical startup current drawn from the HV pin
conditions, the switching frequency is 100 kHz. Once V
FB
is 3.5 mA and it charges the V
capacitor through
decreases below V
(2.5 V), the PWM frequency starts
DD
FB−N
the resistor R . The startup current turns off when the V
to linearly decrease from 100 kHz to 18 kHz to reduce
the switching losses. As V decreases below V
HV
DD
capacitor voltage reaches V
. The V
capacitor
DD−ON
DD
FB
FB−G
maintains
V
until the auxiliary winding of
(2.4 V), the switching frequency is fixed at 18 kHz
and FSL137H enters into “deep” green mode to reduce
DD
the transformer provides the operating current.
the standby power consumption. As V decreases below
FB
V
(2.1 V), FSL137H enters into burst−mode
FB−ZDC
operation. When V drops below V
, FSL137H
FB−ZDC
FB
stops switching and the output voltage starts to drop, which
causes the feedback voltage to rise. Once V rises above
FB
V , switching resumes. Burst mode alternately
FB−ZDC
enables and disables switching, thereby reducing switching
loss to improve power saving, as shown in Figure 26.
Frequency
PWM
Frequency
100 kHz
Figure 23. Startup Circuit
Slope Compensation
FSL137H is designed for flyback power converters.
The peak−current−mode control is used to optimize system
performance. Slope compensation is added to stabilize
tcurrent loop. FSL137H inserts a synchronized, positively
sloped ramp at each switching cycle.
V
V
V
V
FB
FB−ZDC
FB−G
FB−N
Figure 25. PWM Frequency
Soft−Start
The FSL137H has internal soft−start circuit that slowly
increases the SENSEFET current after startup. The typical
soft−start time is 5 ms during which the V
level is
Limit
increased in six steps to smoothly establish the required
output voltage, as shown in Figure 24. It also helps to
prevent transformer saturation and reduce the stress on
the secondary diode during startup.
VLimit
0.89VLimit
0.79VLimit
0.68VLimit
0.58VLimit
0.26VLimit
Figure 26. Burst Mode Operation
1ms
2ms
3ms
4ms
5ms
Figure 24. Soft−Start Function
Constant Power Control
To limit the output power of the converter constantly,
high/low line compensation is included. Sensing
the converter input voltage through the VIN pin,
the high/low line compensation function generates a relative
Green−Mode Operation
The FSL137H uses feedback voltage (V
an indicator of the output load and modulates the PWM
)
FB
as
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9
FSL137H
peak−current−limit threshold voltage for constant power
control, as shown in Figure 27.
or over current or output short occurs. There is no current
flowing through the opto−coupler transistor, which pulls up
the feedback voltage to 6 V. When the feedback voltage is
above 4.6 V for longer than 56 ms, OLP is triggered. This
protection is also triggered when the SMPS output drops
below the nominal value longer than 56 ms due to
the overload condition.
6 V
V
FB
V
O
2
PWM
3R
R
KA431
Figure 27. Constant Power Control
56 ms
OLP
Feedback Open
Loop
Protections
4.6 V
The FSL137H provides full protection functions to
prevent the power supply and the load from being damaged.
The protection features include:
Latch/Auto Recovery Function
The FSL137H provides additional protections by the VIN
pin, such as pull−HIGH latch and pull−LOW auto recovery
that depend on the application. As shown in Figure 28, when
V
IN
is higher than 5.2 V, FSL137H is latched until the V
DD
is discharged. FSL137H is in auto recovery when V is
IN
lower than 0.3 V.
Figure 29. OLP Operation
VDD Over−Voltage Protection (OVP)
over−voltage protection prevents IC damage caused
V
DD
by over voltage on the V pin. The OVP is triggered when
DD
V
DD
reaches 28 V. It has a debounce time (typically 130 ms)
to prevent false trigger by switching noise.
Figure 28. VIN Pin Function
Over−Temperature Protection (OTP)
The SENSEFET and the control IC are integrated, making
it easier to detect the temperature of the SENSEFET. When
the temperature exceeds approximately 142°C, thermal
shutdown is activated.
Open−Loop/Overload Protection (OLP)
When the upper branch of the voltage divider for the shunt
regulator (KA431 shown) is broken, as shown in Figure 29,
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10
FSL137H
TYPICAL APPLICATION CIRCUIT
Table 7.
Application
Adapter
Devices
Input Voltage Range
90−264Vac
Output
FSL137H
12 V/1 A (12 W)
Features
• High efficiency (>77.76% at full load) meeting Energy Star V2.0 regulation with enough margin
• Standby power < 100mW at no−load condition
• Provides full protection functions:
Table 8.
OVP
OTP
OLP
VIN−H
VIN−L
Latch
Latch
Auto Restart
Latch
Auto Restart
Figure 30. Measured Standby Power and OCP
RSN2 CSN2
47 W
F1
BD1
DF06S
1 nF
L1
2 A
470 mH
R
RSN1 CSN1
110 kW 1 nF
DO
VZ1
470 V
3.3 kW
SB5100
CO1
RIN1
9.4 MW
CO2
CDC1
10 μF
CDC2
10 μF
470 mF
470 mF
DSN
FR107
RIN2
91 kW
CINF
01 mF
FSL137H
L2
4.7 mH
Drain
GND
RAUX
0 W
DDD
FR107
Drain
VDD
FB
Drain
HV
CFB
1nF
VIN
CDD
10 mF
R1
38.2 kW
RBIAS
82 W
RDB
3.3 kW
CF
10 nF
RF
20 kW
R2
10 kW
KA431
Figure 31. Schematic of Typical Application Circuit
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11
FSL137H
TYPICAL APPLICATION CIRCUIT (continued)
Transformer Specification
• Core: EE16
• Bobbin: EE16
Figure 32. Transformer Diagram
Table 9.
Terminal
F
S
5
2
4
8
NO.
W1
W2
W3
W4
Wire
Ts
13
75
1.2
13
3
4
1
2UEW 0.3*1
2UEW 0.26*1
−
Copper Shield
10
TEX−E 0.35*1
Core Rounding Tape
Primary−Side Inductance = 600 mH 5%
Primary−Side Effective Leakage < 20 mH 5%
SENSEFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States
and/or other countries.
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12
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP8 9.59x6.6, 2.54P
CASE 646CN
ISSUE O
DATE 31 JUL 2016
0.400 10.160
0.355
[
9.017
]
8
5
PIN 1 INDICATOR
0.280 7.112
0.240 6.096
[
]
1
4
HALF LEAD STYLE 4X
0.031 [0.786] MIN
FULL LEAD STYLE 4X
0.010 [0.252] MIN
0.325 8.263
0.300 7.628
[
]
0.195 4.965
MAX 0.210 [5.334]
0.115
2.933
[ ]
SEATING PLANE
0.150 3.811
0.115
2.922
[ ]
C
MIN 0.015 [0.381]
0.100 [2.540]
0.300 [7.618]
4X
(0.031 [0.786])
0.430 [10.922]
MAX
0.022 0.562
0.014
[ ]
0.358
4X FOR 1/2 LEAD STYLE
8X FOR FULL LEAD STYLE
0.070 1.778
0.045 1.143
0.10
C
[
]
NOTES:
A)THIS PACKAGE CONFORMS TJOEDEC MS−001 VARIATION BA WHICH DEFINES
2 VERSIONS OF THE PACKAGE TERMINAL STYLE WHICH ARE SHOWN HERE.
B) CONTROLING DIMS ARE IN INCHES
C)DIMENSIONS ARE EXCLUSIVE OF BURRSM,OLD FLASH, AND TIE BAR EXTRUSIONS.
D) DIMENSIONS AND TOLERANCES PER ASME Y14.5M−2009
98AON13470G
DOCUMENT NUMBER:
STATUS:
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accessed directly from the Document Repository. Printed
versions are uncontrolled except when stamped
“CONTROLLED COPY” in red.
ON SEMICONDUCTOR STANDARD
NEW STANDARD:
DESCRIPTION: PDIP8 9.59X6.6, 2.54P
PAGE 1 OF2
DOCUMENT NUMBER:
98AON13470G
PAGE 2 OF 2
ISSUE
REVISION
DATE
31 JUL 2016
O
RELEASED FOR PRODUCTION FROM FAIRCHILD N08M TO ON
SEMICONDUCTOR. REQ. BY I. CAMBALIZA.
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
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© Semiconductor Components Industries, LLC, 2016
Case Outline Number:
July, 2016 − Rev. O
646CN
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相关型号：
FSL13AOD1
9A, 100V, 0.18ohm, N-CHANNEL, Si, POWER, MOSFET, TO-205AF, HERMETIC SEALED, METAL CAN, TO-205AF, 3 PIN
RENESAS
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