FSQ510 [ONSEMI]

包含谷底开关控制的 700 V 集成电源开关,用于 6 W 离线反激式转换器;
FSQ510
型号: FSQ510
厂家: ONSEMI    ONSEMI
描述:

包含谷底开关控制的 700 V 集成电源开关,用于 6 W 离线反激式转换器

开关 电源开关 光电二极管 转换器
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January 2014  
FSQ510 / FSQ510MX  
Green Mode Fairchild Power Switch (FPS™)  
for Valley Switching Converter – Low EMI and High Efficiency  
Features  
Description  
A Valley Switching Converter (VSC) generally shows  
lower EMI and higher power conversion efficiency than  
a conventional hard-switched converter with a fixed  
switching frequency. The FSQ510 is an integrated  
Valley Switching Pulse Width Modulation (VS-PWM)  
controller and SenseFET specifically designed for  
offline Switch-Mode Power Supplies (SMPS) for valley  
switching with minimal external components. The VS-  
PWM controller includes an integrated oscillator, under-  
voltage lockout (UVLO), leading-edge blanking (LEB),  
optimized gate driver, internal soft-start, temperature-  
compensated precise current sources for loop  
compensation, and self-protection circuitry.  
. Uses an LDMOS Integrated Power Switch  
. Optimized for Valley Switching Converter (VSC)  
. Low EMI through Variable Frequency Control and  
Inherent Frequency Modulation  
. High Efficiency through Minimum Drain Voltage  
Switching  
. Extended Valley Switching for Wide Load Ranges  
. Small Frequency Variation for Wide Load Ranges  
. Advanced Burst-Mode Operation for Low Standby  
Power Consumption  
Compared with discrete MOSFET and PWM controller  
solutions, the FSQ510 can reduce total cost,  
component count, size and weight; while simultaneously  
increasing efficiency, productivity, and system reliability.  
This device provides a platform for cost-effective designs  
of a valley switching flyback converters.  
. Pulse-by-Pulse Current Limit  
. Protection Functions: Overload Protection (OLP),  
Internal Thermal Shutdown (TSD) with Hysteresis  
. Under-Voltage Lockout (UVLO) with Hysteresis  
. Internal Startup Circuit  
. Internal High-Voltage SenseFET: 700 V  
. Built-in Soft-Start: 5 ms  
Applications  
. Auxiliary Power Supplies for LCD TV, LCD Monitor,  
Personal Computer, and White Goods  
Ordering Information  
Output Power Table(1)  
Packing  
Operating  
Junction  
230 VAC ± 15%(2)  
85-265 VAC  
Part  
Number  
Current RDS(ON)  
Limit (Max.)  
Package  
Method  
Open  
Adapter(3)  
Open  
Adapter(3)  
Temperature  
Frame(4)  
Frame(4)  
FSQ510  
7-DIP  
Rail  
320 mA  
5.5 W  
9 W  
4 W  
6 W  
-40 to +130°C  
32 Ω  
Tape &  
Reel  
FSQ510MX 7-MLSOP  
For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.  
Notes:  
1. The junction temperature can limit the maximum output power.  
2. 230 VAC or 100/115 VAC with voltage doubler.  
3. Typical continuous power with a Fairchild charger evaluation board described in this datasheet in a non-  
ventilated, enclosed adapter housing, measured at 50°C ambient temperature.  
4. Maximum practical continuous power for auxiliary power supplies in an open-frame design at 50°C ambient temperature.  
© 2009 Fairchild Semiconductor Corporation  
FSQ510 / FSQ510MX • Rev. 1.4.0  
www.fairchildsemi.com  
 
 
 
 
Application Circuit  
Vo  
AC  
IN  
Vstr  
D
VS  
-PWM  
Sync  
GND  
Vfb  
Vcc  
Figure 1. Typical Application Circuit  
Internal Block Diagram  
Sync  
4
Vcc  
5
Vstr  
8
D
7
200ns  
delay  
UVLO  
VREF  
0.7V / 0.1V  
8.7V / 6.7V  
VREF  
VREF  
I
delay  
IFB  
OSC  
3
Vfb  
S
R
Q
6R  
R
360ns  
LEB  
R
sense  
(0.4V)  
0.85V / 0.75V  
S/S  
5msec  
OLP  
S
R
TSD  
Q
4.7V  
A/R  
1,2  
GND  
Figure 2. Internal Block Diagram  
© 2009 Fairchild Semiconductor Corporation  
FSQ510 / FSQ510MX • Rev. 1.4.0  
www.fairchildsemi.com  
2
Pin Configuration  
GND  
GND  
V
str  
D
FSQ510  
V
fb  
Sync  
V
cc  
Figure 3. Pin Assignments  
Pin Definitions  
Pin #  
1, 2  
Name  
Description  
GND This pin is the control ground and the SenseFET source.  
This pin is internally connected to the inverting input of the PWM comparator. The collector of  
an opto-coupler is typically tied to this pin. For stable operation, a capacitor should be placed  
between this pin and GND. If the voltage of this pin reaches 4.7 V, the overload protection  
triggers, which shuts down the FPS.  
3
4
Vfb  
This pin is internally connected to the sync-detect comparator for valley switching. In normal  
valley-switching operation, the threshold of the sync comparator is 0.7 V/0.1 V.  
Sync  
This pin is the positive supply input. This pin provides internal operating current for both startup  
and steady-state operation.  
5
7
VCC  
D
High-voltage power SenseFET drain connection.  
This pin is connected directly, or through a resistor, to the high-voltage DC link. At startup, the  
internal high-voltage current source supplies internal bias and charges the external capacitor  
connected to the VCC pin. Once VCC reaches 8.7 V, the internal current source is disabled.  
8
Vstr  
© 2009 Fairchild Semiconductor Corporation  
FSQ510 / FSQ510MX • Rev. 1.4.0  
www.fairchildsemi.com  
3
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be  
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.  
In addition, extended exposure to stresses above the recommended operating conditions may affect device  
reliability. The absolute maximum ratings are stress ratings only.  
Symbol  
VSTR  
Parameter  
Min.  
Max.  
500  
700  
20  
Unit  
V
Vstr Pin Voltage  
Drain Pin Voltage  
Supply Voltage  
VDS  
V
VCC  
V
Internally  
Feedback Voltage Range  
VFB  
-0.3  
-0.3  
V
V
Clamped(5)  
VSync  
Sync Pin Voltage  
6.5  
7-DIP  
1.38  
PD  
Total Power Dissipation  
W
7-MLSOP  
Maximum Junction Temperature  
+150  
+140  
+150  
TJ  
°C  
°C  
Recommended Operating Junction Temperature(6)  
Storage Temperature  
-40  
-55  
TSTG  
Notes:  
5. VFB is internally clamped at 6.5 V (ICLAMP_MAX<100 µA) which has a tolerance between 6.2 V and 7.2 V.  
6. The maximum value of the recommended operating junction temperature is limited by thermal shutdown.  
Thermal Impedance  
TA=25°C unless otherwise specified. Items are tested with the standards JESD 51-2 and 51-10 (DIP).  
Symbol  
Parameter  
Value  
Unit  
7-DIP, 7-MLSOP  
θJA  
θJC  
Junction-to-Ambient Thermal Impedance(7)  
Junction-to-Case Thermal Impedance(8)  
90  
13  
°C/W  
°C/W  
Notes:  
7. Free-standing with no heatsink; without copper clad; measurement condition - just before junction temperature  
TJ enters into TSD.  
8. Measured on the DRAIN pin close to plastic interface.  
© 2009 Fairchild Semiconductor Corporation  
FSQ510 / FSQ510MX • Rev. 1.4.0  
www.fairchildsemi.com  
4
 
 
 
 
Electrical Characteristics  
TJ=25°C unless otherwise specified.  
Symbol  
Parameter  
Conditions  
Min. Typ. Max.  
Unit  
SenseFET Section  
BVDSS  
IDSS  
Drain-Source Breakdown Voltage  
Zero-Gate-Voltage Drain Current  
700  
V
µA  
V
CC=0 V, ID=100 µA  
VDS=700 V  
150  
TJ=25°C, ID=180 mA  
TJ=100°C, ID=180 mA  
VGS=11 V  
28  
42  
32  
48  
RDS(ON)  
Drain-Source On-State Resistance  
Input Capacitance(9)  
Output Capacitance(9)  
Rise Time(9)  
CISS  
COSS  
tr  
96  
pF  
pF  
ns  
ns  
VDS=40 V  
28  
VDS=350 V, ID=25 mA  
VDS=350 V, lD=25 mA  
100  
50  
Fall Time(9)  
tf  
Control Section  
Initial Switching Frequency  
Switching Frequency Variation(9)  
VCC=11 V, VFB=5 V, Vsync=0 V  
-25°C < TJ < 125°C  
fS  
87.7  
94.3  
±5  
100.0  
±8  
kHz  
%
fS  
IFB  
Feedback Source Current  
VCC=11 V, VFB=0 V  
200  
7.2  
225  
250  
µA  
VCC=11 V, VFB=1 V,  
Vsync Frequency Sweep  
tB  
Switching Blanking Time  
7.6  
8.2  
µs  
Valley Detection Window Time(9)  
Maximum Duty Ratio  
tW  
3.0  
60  
µs  
%
%
V
VCC=11 V, VFB=3 V  
VCC=11 V, VFB=0 V  
VFB=0 V, VCC Sweep  
After Turn-on, VFB=0 V  
VSTR=40 V, VCC Sweep  
DMAX  
DMIN  
VSTART  
VSTOP  
tS/S  
54  
66  
0
Minimum Duty Ratio  
8.0  
6.0  
3
8.7  
6.7  
5
9.4  
7.4  
7
UVLO Threshold Voltage  
Internal Soft-Start Time  
V
ms  
Burst-Mode Section  
VBURH  
0.75  
0.65  
0.85  
0.75  
100  
0.95  
0.85  
V
V
Burst-Mode Voltage  
VCC=11 V, VFB Sweep  
di/dt=90 mA/µs  
VBURL  
HYS  
mV  
Protection Section  
Peak Current Limit  
ILIM  
280  
4.2  
320  
4.7  
360  
5.2  
mA  
V
VDS=40 V, VCC=11 V,  
VFB Sweep  
VSD  
Shutdown Feedback Voltage  
IDELAY  
Shutdown Delay Current  
VCC=11 V, VFB=5 V  
3.5  
4.5  
5.5  
µA  
ns  
°C  
°C  
Leading-Edge Blanking Time(9)  
tLEB  
TSD  
360  
140  
60  
130  
150  
Thermal Shutdown Temperature(9)  
HYS  
Synchronous Section  
V
CC=11 V, VFB=1 V  
VSH  
0.55  
0.05  
180  
0.70  
0.10  
200  
0.85  
0.15  
220  
V
V
Synchronous Threshold Voltage  
VCC=11 V, VFB=1 V  
VSL  
Synchronous Delay Time  
tSync  
ns  
Total Device Section  
Operating Supply Current  
IOP  
VCC=11 V, VFB=5.5 V  
0.8  
1.0  
1.2  
mA  
(Control Part Only)  
Startup Charging Current  
Supply Voltage  
VCC=VFB=0 V,VSTR=40 V  
VCC=VFB=0 V, VSTR Sweep  
ICH  
1.0  
27  
mA  
V
VSTR  
Note:  
9. These parameters, although guaranteed, are not 100% tested in production.  
© 2009 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FSQ510 / FSQ510MX • Rev. 1.4.0  
5
 
Comparison between FSD210B and FSQ510  
Function  
FSD210B  
FSQ510  
Advantages of FSQ510  
Fast Response  
Easy-to-Design Control Loop  
Control Mode  
Voltage Mode  
Current Mode  
Constant Frequency  
PWM  
Valley Switching  
Operation  
Turn-on at Minimum Drain Voltage  
High Efficiency and Low EMI  
Operation Method  
Frequency Variation Depending on the Ripple  
of DC Link Voltage  
High Efficiency and Low EMI  
EMI Reduction  
Method  
Frequency  
Modulation  
Valley Switching  
Soft-Start  
Protection  
3 ms (Built-in)  
TSD  
5ms (Built-in)  
Longer Soft-Start Time  
TSD with Hysteresis Enhanced Thermal Shutdown Protection  
Small Difference of Input Power between the  
Short TCLD  
Power Balance  
Long TCLD  
Low and High Input Voltage Cases  
Less than 5 W  
Under Open-Frame  
Condition at the  
More than 6 W  
Under Open-Frame More Output Power Rating Available due to the  
Condition at the  
Power Ratings  
Valley Switching  
Universal Line Input Universal Line Input  
© 2009 Fairchild Semiconductor Corporation  
FSQ510 / FSQ510MX • Rev. 1.4.0  
www.fairchildsemi.com  
6
Typical Performance Characteristics  
Characteristic graphs are normalized at TA=25°C.  
1.20  
1.15  
1.10  
1.05  
1.00  
0.95  
0.90  
0.85  
0.80  
1.20  
1.15  
1.10  
1.05  
1.00  
0.95  
0.90  
0.85  
0.80  
-40  
-25  
0
25  
50  
75  
100  
125  
-40  
-25  
0
25  
50  
75  
100  
125  
Temperature []  
Temperature []  
Figure 4. Operating Frequency (fOSC) vs. TA  
Figure 5. Peak Current Limit (ILIM) vs. TA  
1.20  
1.15  
1.10  
1.05  
1.00  
0.95  
0.90  
0.85  
0.80  
1.20  
1.15  
1.10  
1.05  
1.00  
0.95  
0.90  
0.85  
0.80  
-40  
-25  
0
25  
50  
75  
100  
125  
-40  
-25  
0
25  
50  
75  
100  
125  
Temperature []  
Temperature []  
Figure 6. Start Threshold Voltage (VSTART) vs. TA  
Figure 7. Stop Threshold Voltage (VSTOP) vs. TA  
1.20  
1.15  
1.10  
1.05  
1.00  
0.95  
0.90  
0.85  
0.80  
1.20  
1.15  
1.10  
1.05  
1.00  
0.95  
0.90  
0.85  
0.80  
-40  
-25  
0
25  
50  
75  
100  
125  
-40  
-25  
0
25  
50  
75  
100  
125  
Temperature []  
Temperature []  
Figure 8. Shutdown Feedback Voltage (VSD) vs. TA  
Figure 9. Maximum Duty Cycle (DMAX) vs. TA  
© 2009 Fairchild Semiconductor Corporation  
FSQ510 / FSQ510MX • Rev. 1.4.0  
www.fairchildsemi.com  
7
Typical Performance Characteristics (Continued)  
1.20  
1.15  
1.10  
1.05  
1.00  
0.95  
0.90  
0.85  
0.80  
1.20  
1.15  
1.10  
1.05  
1.00  
0.95  
0.90  
0.85  
0.80  
-40  
-25  
0
25  
50  
75  
100  
125  
-40  
-25  
0
25  
50  
75  
100  
125  
Temperature []  
Temperature []  
Figure 10. Feedback Source Current (IFB) vs. TA  
Figure 11. Shutdown Delay Current (IDELAY) vs. TA  
1.20  
1.15  
1.10  
1.05  
1.00  
0.95  
0.90  
0.85  
0.80  
-40  
-25  
0
25  
50  
75  
100  
125  
Temperature []  
Figure 12. Operating Supply Current (IOP) vs. TA  
© 2009 Fairchild Semiconductor Corporation  
FSQ510 / FSQ510MX • Rev. 1.4.0  
www.fairchildsemi.com  
8
Functional Description  
1. Startup: At startup, an internal high-voltage current  
source supplies the internal bias and charges the  
external capacitor (Ca) connected to the VCC pin, as  
illustrated in Figure 13. When VCC reaches 8.7 V, the  
FPS begins switching and the internal high-voltage  
current source is disabled. The FPS continues normal  
switching operation and the power is supplied from the  
auxiliary transformer winding unless VCC goes below the  
stop voltage of 6.7 V.  
2.2 Leading-Edge Blanking (LEB): At the instant the  
internal SenseFET is turned on, a high-current spike  
usually occurs through the SenseFET, caused by  
primary-side capacitance and secondary-side rectifier  
reverse recovery. Excessive voltage across the Rsense  
resistor would lead to incorrect feedback operation in  
the current mode VS-PWM control. To counter this  
effect, the FPS employs a leading-edge blanking  
(LEB) circuit to inhibit the VS-PWM comparator for a  
short time (tLEB) after the SenseFET is turned on.  
VDC  
Vref Vref  
Ca  
Idelay  
VS signal  
OSC  
IFB  
V
VO  
SenseFET  
FOD817  
KA431  
fb  
3
D1  
D2  
OB  
6R  
+
Vfb  
Gate  
driver  
VCC  
Vstr  
*
R
5
8
-
ICH  
OLP  
Rsense  
VSD  
Vref  
6.7V/  
8.7V  
VCC good  
Figure 14. Valley Switching Pulse-Width  
Modulation (VS-PWM) Circuit  
Internal  
Bias  
3. Synchronization: The FSQ510 employs a valley-  
switching technique to minimize the switching noise and  
loss. The basic waveforms of the valley switching  
converter are shown in Figure 15. To minimize the  
MOSFET switching loss, the MOSFET should be turned  
on when the drain voltage reaches its minimum value,  
as shown in Figure 15. The minimum drain voltage is  
indirectly detected by monitoring the VCC winding  
voltage, as shown in Figure 15.  
Figure 13. Startup Block  
2. Feedback Control: This device employs current-  
mode control, as shown in Figure 14. An opto-coupler  
(such as the FOD817) and shunt regulator (such as the  
KA431) are typically used to implement the feedback  
network. Comparing the feedback voltage with the  
voltage across the Rsense resistor makes it possible to  
control the switching duty cycle. When the reference pin  
voltage of the shunt regulator exceeds the internal  
reference voltage of 2.5 V, the opto-coupler LED current  
increases, pulling down the feedback voltage and  
reducing the drain current. This typically occurs when the  
input voltage is increased or the output load is decreased.  
VDS  
VRO  
VRO  
VDC  
2.1 Pulse-by-Pulse Current Limit: Because current-  
mode control is employed, the peak current through the  
SenseFET is limited by the inverting input of PWM  
comparator (VFB*), as shown in Figure 14. Assuming  
that the 225 µA current source flows only through the  
internal resistor (6R + R=12.6k), the cathode voltage  
of diode D2 is about 2.8 V. Since D1 is blocked when  
the feedback voltage (VFB) exceeds 2.8 V, the maximum  
voltage of the cathode of D2 is clamped at this voltage,  
clamping VFB*. Therefore, the peak value of the current  
through the SenseFET is limited.  
tF  
VSync  
0.7V  
0.1V  
200ns Delay  
MOSFET  
Gate  
ON  
ON  
Figure 15. Valley Switching Waveforms  
© 2009 Fairchild Semiconductor Corporation  
FSQ510 / FSQ510MX • Rev. 1.4.0  
www.fairchildsemi.com  
9
 
 
 
most applications. This protection is implemented in  
auto-restart mode.  
4. Protection Circuits: The FSQ510 has two self-  
protective functions, overload protection (OLP) and  
thermal shutdown (TSD). The protections are  
implemented as auto-restart mode. Once the fault  
condition is detected, switching is terminated and the  
SenseFET remains off. This causes VCC to fall. When  
VFB  
Overload Protection  
4.7V  
V
CC falls down to the under-voltage lockout (UVLO) stop  
voltage of 6.7 V, the protection is reset and the startup  
circuit charges the VCC capacitor. When VCC reaches  
the start voltage of 8.7 V, the FSQ510 resumes normal  
operation. If the fault condition is not removed, the  
SenseFET remains off and VCC drops to stop voltage  
again. In this manner, the auto-restart can alternately  
enable and disable the switching of the power  
SenseFET until the fault condition is eliminated.  
Because these protection circuits are fully integrated  
into the IC without external components, reliability is  
improved without increasing cost.  
2.8V  
t12= CB•(4.7-2.8)/Idelay  
t1  
Figure 17. Overload Protection  
t2  
t
Fault  
occurs  
Fault  
removed  
Power  
on  
Vds  
4.2 Thermal Shutdown (TSD): The SenseFET and the  
control IC on a die in one package make it easy for the  
control IC to detect the abnormal over temperature of  
the SenseFET. If the temperature exceeds  
approximately 140°C, the thermal shutdown triggers  
and the FPS stops operation. The FPS operates in  
auto-restart mode until the temperature decreases to  
around 80°C, when normal operation resumes.  
VCC  
5. Soft-Start: The FPS has an internal soft-start circuit  
that increases the VS-PWM comparator inverting input  
voltage, together with the SenseFET current, slowly  
after it starts up. The typical soft-start time is 5 ms. The  
pulse width to the power switching device is  
progressively increased to establish the correct working  
conditions for transformers, inductors, and capacitors.  
The voltage on the output capacitors is progressively  
increased with the intention of smoothly establishing the  
required output voltage. This helps prevent transformer  
saturation and reduces stress on the secondary diode  
during startup.  
8.7V  
6.7V  
t
Normal  
operation  
Fault  
situation  
Normal  
operation  
Figure 16. Auto Restart Protection Waveforms  
4.1 Overload Protection (OLP): Overload is defined as  
the load current exceeding its normal level due to an  
unexpected event. In this situation, the protection circuit  
should trigger to protect the SMPS. However, even  
when the SMPS is in the normal operation, the overload  
protection circuit can be triggered during the load  
transition. To avoid this undesired operation, the  
overload protection circuit is designed to trigger only  
after a specified time to determine whether it is a  
transient situation or a true overload situation. Because  
of the pulse-by-pulse current limit capability, the  
maximum peak current through the SenseFET is limited  
and, therefore, the maximum input power is restricted  
with a given input voltage. If the output consumes more  
than this maximum power, the output voltage (Vo)  
decreases below the set voltage. This reduces the  
current through the opto-coupler LED, which also  
reduces the opto-coupler transistor current, increasing  
the feedback voltage (VFB). If VFB exceeds 2.8 V, D1 is  
blocked and the 5 µA current source starts to charge CB  
slowly up. In this condition, VFB continues increasing  
until it reaches 4.7 V, when the switching operation is  
terminated, as shown in Figure 17. The delay time for  
shutdown is the time required to charge CB from 2.8 V  
to 4.7 V with 5 µA. A 20 ~ 50 ms delay time is typical for  
6. Burst-Mode Operation: To minimize power  
dissipation in standby mode, the FPS enters burst-  
mode operation. As the load decreases, the feedback  
voltage decreases. As shown in Figure 18, the device  
automatically enters burst mode when the feedback  
voltage drops below VBURL (750 mV). At this point,  
switching stops and the output voltages start to drop at  
a rate dependent on standby current load. This causes  
the feedback voltage to rise. Once it passes VBURH  
(850 mV), switching resumes. The feedback voltage  
then falls and the process repeats. Burst mode  
alternately enables and disables switching of the  
SenseFET, reducing switching loss in standby mode.  
© 2009 Fairchild Semiconductor Corporation  
FSQ510 / FSQ510MX • Rev. 1.4.0  
www.fairchildsemi.com  
10  
 
Once the SenseFET is enabled, the next start is  
prohibited during the blanking time (tB). After the  
blanking time, the controller finds the first valley within  
the duration of the valley detection window time (tW)  
(case A, B, and C). If no valley is found in tW, the  
internal SenseFET is forced to turn on at the end of tW  
(case D). Therefore, FSQ510 has minimum switching  
frequency of 94.3 kHz and maximum switching  
frequency of 132 kHz, typically, as shown in Figure 20.  
Vo  
Voset  
VFB  
0.85V  
0.75V  
Tsmax=10.6µs  
IDS  
Ids  
Ids  
A
B
tB=7.6µs  
Ts_A  
IDS  
IDS  
Vds  
tB=7.6µs  
Ts_B  
time  
Switching  
disabled  
Switching  
disabled  
t1  
t2 t3  
t4  
IDS  
IDS  
Figure 18. Burst-Mode Operation  
7. Advanced Valley Switching Operation: To  
C
tB=7.6µs  
Ts_C  
minimize switching loss and Electromagnetic  
Interference (EMI), the MOSFET turns on when the  
drain voltage reaches its minimum value in VS  
converters. Due to the Discontinuous Conduction Mode  
(DCM) operation, the feedback voltage is not changed,  
despite the DC link voltage ripples, if the load condition  
is not changed. Since the slope of the drain current is  
changed depending on the DC link voltage, the turn-on  
duration of MOSFET is variable with the DC link voltage  
ripples. The switching period is changed continuously  
with the DC link voltage ripples. Not only the switching  
at the instant of the minimum drain voltage, but also the  
continuous change of the switching period, reduces  
EMI. VS converters inherently scatter the EMI spectrum.  
IDS  
IDS  
D
tB=7.6µs  
tW=3µs  
Tsmax=10.6µs  
Figure 19. Advanced VS Operation  
Typical products for VSC turn the MOSFET on when the  
first valley is detected. In this case, the range of the  
switching frequency is very wide as a result of the load  
When the resonant period is 2µs  
132kHz  
C
Con stant  
frequency  
A
B
variations. At  
a very light-load, for example, the  
104kHz  
94.3kHz  
switching frequency can be as high as several hundred  
kHz. Some products for VSC, such as Fairchild’s  
FSCQ-series, define the turn-on instant of SenseFET  
change at the first valley into at the second valley, when  
the load condition decreases under its predetermined  
level. The range of switching frequency narrows  
somewhat. For details, consult an FSCQ-series  
datasheet, such as:  
D
Burst  
mode  
http://www.fairchildsemi.com/pf/FS/FSCQ1265RT.html  
The range of the switching frequency can be limited  
tightly in FSQ-series. Because a kind of blanking time  
(tB) is adopted, as shown in Figure 19, the switching  
frequency has minimum and maximum values.  
Po  
Figure 20. Switching Frequency Range of the  
Advanced Valley Switching  
© 2009 Fairchild Semiconductor Corporation  
FSQ510 / FSQ510MX • Rev. 1.4.0  
www.fairchildsemi.com  
11  
 
 
 
10.00  
9.10  
A
B
7.62  
0.56  
0.36  
2.54  
2.00  
10.70  
1.252  
7
5
6.60 9.90  
6.20 9.30  
6.70  
1
4
1.09  
0.94  
0.56  
0.10  
1.784  
1.62  
1.47  
M
0.10  
C B A  
0.56  
0.36  
M
C B A  
LAND PATTERN RECOMMENDATION  
TOP VIEW  
7.62  
A
3.60  
3.20  
3.70 MAX  
0.10 C  
2.54  
7.62  
0.35  
0.20  
C
0.10 MIN  
SIDE VIEW  
FRONT VIEW  
NOTES: UNLESS OTHERWISE SPECIFIED  
A. NO INDUSTRY STANDARD APPLIES TO  
THIS PACKAGE  
9°  
R0.20  
R0.20  
B. ALL DIMENSIONS ARE IN MILLIMETERS  
C. DIMENSIONS ARE EXCLUSIVE OF BURRS,  
MOLD FLASH, AND TIE BAR EXTRUSIONS  
D. DIMENSIONS AND TOLERANCES PER  
ASME Y14.5M-2009  
GAGE PLANE  
0.25  
8°  
0°  
E. DRAWING FILENAME: MKT-MLSOP07Arev2  
1.12  
0.72  
SEATING  
PLANE  
3°  
1.60 REF  
DETAIL A  
SCALE 2:1  
10.00  
9.10  
7
5
6.60  
6.20  
1
4
0.56  
TOP VIEW  
7.62  
3.60  
3.20  
5.08 MAX  
3.60  
3.00  
0.35  
0.20  
0.33 MIN  
15°  
0°  
1.62  
1.42  
0.56  
0.36  
9.91  
7.62  
2.54  
7.62  
FRONT VIEW  
SIDE VIEW  
NOTES: UNLESS OTHERWISE SPECIFIED  
A. THIS PACKAGE COMPLIES TO JEDEC MS-001,  
VARIATION BA, EXCEPT FOR TERMINAL COUNT  
(7 RATHER THAN 8)  
B. ALL DIMENSIONS ARE IN MILLIMETERS  
C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD  
FLASH, AND TIE BAR PROTRUSIONS.  
D. DIMENSIONS AND TOLERANCES PER  
ASME Y14.5M-2009  
E. DRAWING FILENAME: MKT-NA07BArev3  
ON Semiconductor and  
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