FT7521FHX [ONSEMI]

重置计时器,带固定延迟和重置脉冲;
FT7521FHX
型号: FT7521FHX
厂家: ONSEMI    ONSEMI
描述:

重置计时器,带固定延迟和重置脉冲

脉冲 光电二极管 外围集成电路
文件: 总11页 (文件大小:1067K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
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20134月  
FT7521  
带固定延迟和复位脉冲的复位定时器  
说明  
特性  
FT7521是定时器,用于复位那些复位时间较长的移动设备  
。 长时延迟可避免因意外按键所引起的非预期复位。 它  
有7.5 ±20%秒的固定延迟。 DSR引脚通过直接强制/RST1  
LOW以便进行出厂测试实现了测试模式操作。  
. 固定复位延迟: 7.5 秒  
. 一个输入复位引脚  
. 漏极开路输出引脚,带固定400ms脉冲  
FT7521具有一个用于单按钮复位功能的输入。 该器件有  
一个单漏极开路输出,具备0.5mA的下拉驱动能力。  
.
.
.
.
1.8 V5.0 V的操作(TA=-40°C到+85°C)  
1.7 V5.0 V的操作(TA=-25°C到+85°C)  
1.65 V5.00 V的操作(TA=-0°C到+85°C)  
<1 µAICCQ耗电量  
FT7521工作时消耗的ICC流最少,它可在1.65 V到  
5.0 V的电源电压范围下工作。  
. 零秒测试模式使能  
/SRO上的集成式上拉电阻  
VCC  
Voltage  
Reference  
.
应用  
TEST  
RPU  
. 手机  
Oscillator  
Open-Drain Output  
/RST1  
. 便携式媒体播放器  
. 平板电脑  
/SR0  
Digital Logic &  
Counter  
. 移动设备  
DSR  
. 消费类医疗器械  
1. 框图  
订购信息  
工作温度范围  
部件编号  
封装  
包装方法  
FT7521L6X  
6引脚,MicroPak1.0 x 1.45 mmJEDEC MO-252  
6引脚,MicroPak21.0 x 1.0 mm尺寸,0.35 mm间距  
卷带和卷盘  
(每卷5000  
装)  
-40C +85C  
FT7521FHX  
© 2009飞兆半导体公司  
FT7521 修订版 1.0.8  
www.fairchildsemi.com  
推荐应用框图  
VCC  
100nF  
Voltage  
Reference  
50kΩ  
RPU  
10kΩ  
Oscillator  
Baseband or PMIC  
Open-Drain Output  
/RST1  
/SR0  
Digital Logic &  
Counter  
DSR  
TEST  
2.  
推荐应用框图  
引脚布局  
3.  
焊盘分配(顶视图)  
引脚说明  
说明  
引脚  
名称  
正常运行  
零秒出厂测试模式  
1
2
3
4
/RST1 漏极开路输出,低电平有效  
GND GND  
/SR0 带集成式上拉的复位输入,低电平有效  
漏极开路输出,低电平有效  
GND  
带集成式上拉的复位输入,低电平有效  
电源  
Vcc  
DSR  
电源  
延迟选择输入。 拉至高电平使能零秒延迟,以进  
行出厂测试。  
5
延迟选择输入;正常操作时连接到GND(1)  
6
测试 用于器件测试,正常操作时连接到GND。  
用于器件测试,正常操作时连接到GND。  
注意:  
1. 该引脚必须始终连接至 GND VCC。 该引脚不可浮置。  
© 2009飞兆半导体公司  
FT7521 修订版 1.0.8  
www.fairchildsemi.com  
2
 
绝对最大额定值  
应力超过绝对最大额定值,可能会损坏设备。 在超出推荐的工作条件的情况下,该器件可能无法正常运行或操作,且  
不建议让器件在这些条件下长期工作。 此外,过度暴露在高于推荐的工作条件下,会影响器件的可靠性。 绝对最大额  
定值仅是额定应力值。  
最小 最大  
符号  
参数  
条件  
单位  
7.0  
7.0  
7.0  
-50  
-50  
+50  
100  
+150  
+150  
+260  
5
VCC  
VIN  
VOUT  
IIK  
IOK  
IOL  
ICC  
TSTG  
TJ  
电源电压  
-0.5  
-0.5  
-0.5  
V
DC输入电压  
输出电压(2)  
/SR0DSR  
/RST1  
V
V
直流输入二极管电流  
DC输出二极管电流  
DC输出灌电流  
VIN < 0V  
VOUT < 0V  
mA  
mA  
mA  
mA  
C  
C  
C  
mW  
每个电源引脚的DC VCC或接地电流  
存储温度范围  
-65  
偏压下结温  
TL  
结点焊接温度,焊接10秒  
功耗  
PD  
人体模式,JESD22-A114  
4
ESD  
静电放电能力  
kV  
充电器件模式,JESD22-C101  
2
注意:  
2. 必须遵守所有输出电流的绝对最大额定值。  
推荐工作条件  
推荐的操作条件表定义了器件的真实工作条件。 指定推荐的工作条件,以确保设备的最佳性能达到数据表中的规格。  
飞兆半导体建议不要超过推荐工作条件,也不能按照绝对最大额定值进行设计。  
最小 最大  
符号  
参数  
条件  
单位  
1.8  
1.7  
1.65  
5
5.0  
5.0  
5.00  
-40C+85C  
-25C+85C  
0C+85C  
)
电源电压(3  
VCC  
V
tRFC  
VIN  
VCC=0 V 电源关断后上升到0.5 V  
ms  
V
断电后,VCC 恢复时间  
输入电压(3)  
/SR0  
0
0
5
VOUT  
IOL  
输出电压  
/RST1  
5
V
mA  
DC输出灌电流  
常压工作温度  
热阻  
/RST1VCC=1.8 V5.0 V  
+3  
TA  
-40  
+85  
350  
C  
JA  
°C/W  
注意:  
3. 输入引脚被驱动时,VCC电源不可浮动。  
© 2009飞兆半导体公司  
FT7521 修订版 1.0.8  
www.fairchildsemi.com  
3
 
 
直流电气特性  
TA=-40到80°C且VCC=1.8 - 5.0 VTA=-25到85°C且VCC=1.7 5 VTA=0到85°C且VCC=1.65 5 V的条件下会产生  
以下性能特性。  
典型  
符号  
参数  
条件  
最小值  
最大值  
VIH  
VIL  
输入高电平  
输入低电平  
DSR/SR0  
DSR/SR0  
0.65 x VCC  
V
V
0.25 x VCC  
0.3  
RSTIOL=500 µA  
VOL  
RPU  
IIN  
低电平输出电压  
V
RSTIOL=3 mAVCC=3.0 V  
0.3  
50  
/SR0上的集成式上拉电阻  
输入漏电流/SR0  
k  
µA  
VIN= VCC  
1.0  
1.0  
1
输入漏电流DSR  
0V VIN 5.0 V  
/SR0=VCC  
静态电源电流(定时器关闭)  
动态电源电流(定时器运行)  
ICC  
µA  
/SR0=0 V  
200  
交流电气特性  
TA=-40到80°C且VCC=1.8 - 5.0 VTA=-25到85°C且VCC=1.7 5 VTA=0到85°C且VCC=1.65 5 V的条件下会产生  
以下性能特性。  
最小 典型 最大  
符号  
参数  
条件  
单位  
tPHL1  
tREC  
定时器延迟,/SR0 RST (DSR = 0)  
6.0  
320  
7.5  
400  
9.0  
480  
S
CL=5 pFRL=5 K,  
参见 4.  
复位超时延迟  
ms  
电容规格  
TA=+25C。  
符号  
CIN  
参数  
输入电容  
条件  
典型值 单位  
VCC=GND  
4
5
pF  
pF  
COUT  
输出电容  
VCC=5.0 V  
© 2009飞兆半导体公司  
www.fairchildsemi.com  
FT7521 修订版 1.0.8  
4
功能说明  
默认运行时间N7.5 s。 如果DSR引脚在VCC斜坡前被拉至  
高电平,则FT7521会进入测试模式并且复位输出/RST1会  
被立即拉至低电平以进行出厂测试。 正常工作时,DSR  
引脚必须被强制接到 GND。 正常工作时,DSR 引脚不能  
被驱高或悬置。 设备运行时,DSR 引脚的状态不能改变  
;它必须在为 VCC 供电前被偏置。 如果需要使用 DSR =  
VCC 测试模式,在 DSR 引脚由低电平变成高电平以进入  
零秒出厂测试模式时,/SR0 必须处在高电平。 要恢复到  
标准的 7.5 秒复位时间,必须对 DSR = GND 进行同样的  
操作。 当 /SR0 引脚处于低电平时, DSR 引脚的状态不  
能改变。 其他输入引脚被驱动时,VCC电源引脚不可浮动  
。 如果VCC引脚可以浮动,则应当注意确保/SR0被驱动至  
的电压不得大于GND。  
在超过时间tREC后的400ms/RST1输出会返回其初始的高  
电平状态。 /RST1输出为一个开漏驱动器。 计数时间超  
7.5 s时,/RST1输出会被拉至低电平。  
短时(tW < 7.5 s)  
/SR0输入变为低电平时,内部定时器会开始计数。 如果  
7.5 s过去之前/SR0输入变为高电平,则定时器会停止  
计数并复位,并且输出上无变化。  
长时(tW < 7.5 s)  
/SR0输入变为低电平时,内部定时器会开始计数。 如果  
/SR0输入保持为低电平的时间不少于7.5 s,则RST输出会  
被使能并被拉至低电平。 无论/SR0引脚的状态如何,只  
要满足7.5 s的复位时间,输出RST就会保持为低电平,持  
续时间为400 MStREC/SR0输入返回到高电平且tREC超  
时时,内部定时器会复位并等待下一复位事件。  
工作模式  
/SR0 的输入信号为低电平时,振荡器启动。 计数方式有  
两种: 短时持续和长时持续。 短时情况下,输出/RST1  
不会受到影响。 长时情况下,输出/RST1会在/SR0保持为  
低电平的7.5 S后变为低电平。 无论/SR0的状态如何,  
零秒测试模式  
/SR0 变 低 后,RST1 立即变 低。  
N=7.5s  
Short-Duration,  
Normal Operation  
/SR0  
/RST1 never goes LOW because  
/SR0 LOW duration does not meet  
requirement: Reset Time N=7.5s  
RST1  
/SR0  
Long-Duration,  
Normal Operation  
/RST1 goes LOW because  
/SR0 LOW duration exceeded  
requirement: Reset Time N=7.5s  
RST1  
tREC=400ms  
/SR0  
Zero-Second Factory-Test Mode  
/RST1 goes LOW immediately  
after /SR0 goes LOW  
RST1  
tREC=400ms  
4.  
复位计时波形  
© 2009飞兆半导体公司  
FT7521 修订版 1.0.8  
www.fairchildsemi.com  
5
交流测试电路与波形  
5. /RST1输出的AC测试电路和波形ST输出  
© 2009兆半体公司  
FT7521 • 1.0.8  
www.fairchildsemi.com  
6
物理尺寸测试  
2X  
0.05 C  
1.45  
B
(1)  
2X  
0.05 C  
(0.49)  
5X  
(0.254)  
1.00  
(0.75)  
(0.52)  
1X  
A
TOP VIEW  
PIN 1 IDENTIFIER  
5
0.55MAX  
(0.30)  
6X  
PIN 1  
0.05 C  
0.05  
0.00  
RECOMMENED  
LAND PATTERN  
0.05 C  
C
0.45  
0.35  
0.10  
6X  
0.00  
0.25  
6X  
0.15  
1.0  
DETAIL A  
0.10  
C B A  
0.40  
0.30  
0.05  
C
0.35  
0.25  
5X  
5X  
0.40  
0.30  
DETAIL A  
PIN 1 TERMINAL  
0.075 X 45  
CHAMFER  
0.5  
BOTTOM VIEW  
(0.05)  
6X  
(0.13)  
4X  
Notes:  
1. CONFORMS TO JEDEC STANDARD M0-252 VARIATION UAAD  
2. DIMENSIONS ARE IN MILLIMETERS  
3. DRAWING CONFORMS TO ASME Y14.5M-1994  
4. FILENAME AND REVISION: MAC06AREV4  
5. PIN ONE IDENTIFIER IS 2X LENGTH OF ANY  
OTHER LINE IN THE MARK CODE LAYOUT.  
6. 6引脚,MicroPak1.0 x 1.45 mmJEDEC MO-252  
封装图纸是作为一项服务而提供给考虑选用飞兆半导体产品的客户。 具体参数可进行改动,且无需做出相应通知。 请注意图纸上的  
版本和/或日期,并联系飞兆半导体代表核实或获得最新版本。 封装规格并不超出飞兆公司全球范围内的条款与条件,尤其指保修,保  
修涉及飞兆半导体的全部产品。  
随时访问飞兆半导体在线封装网页,可以获得最新的封装图:  
http://www.fairchildsemi.com/packaging/.  
© 2009兆半体公司  
FT7521 • 1.0.8  
www.fairchildsemi.com  
7
物理尺寸测试  
0.89  
0.35  
0.05 C  
1.00  
B
A
2X  
5X 0.40  
1X 0.45  
PIN 1  
0.66  
MIN 250uM  
1.00  
6X 0.19  
0.05 C  
TOP VIEW  
RECOMMENDED LAND PATTERN  
FOR SPACE CONSTRAINED PCB  
2X  
0.90  
0.35  
0.05 C  
0.55MAX  
C
5X 0.52  
SIDE VIEW  
0.73  
0.57  
1X  
(0.08) 4X  
DETAIL A  
0.09  
0.19  
6X  
1
2
3
0.20 6X  
ALTERNATIVE LAND PATTERN  
FOR UNIVERSAL APPLICATION  
(0.05) 6X  
0.35  
5X  
0.25  
0.60  
6
5
4
0.10  
.05 C  
C B A  
0.40  
0.30  
0.35  
(0.08)  
4X  
BOTTOM VIEW  
NOTES:  
A. COMPLIES TO JEDEC MO-252 STANDARD  
B. DIMENSIONS ARE IN MILLIMETERS.  
0.075X45°  
CHAMFER  
C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994  
D. LANDPATTERN RECOMMENDATION IS BASED ON FSC  
DESIGN.  
DETAIL A  
PIN 1 LEAD SCALE: 2X  
E. DRAWING FILENAME AND REVISION: MGF06AREV3  
7. 6引脚,MicroPak21.0 x 1.0 mm尺寸,0.35 mm间距  
封装图纸是作为一项服务而提供给考虑选用飞兆半导体产品的客户。 具体参数可进行改动,且无需做出相应通知。 请注意图纸上的  
版本和/或日期,并联系飞兆半导体代表核实或获得最新版本。 封装规格并不超出飞兆公司全球范围内的条款与条件,尤其指保修,保  
修涉及飞兆半导体的全部产品。  
随时访问飞兆半导体在线封装网页,可以获得最新的封装图:  
http://www.fairchildsemi.com/packaging/.  
© 2009兆半体公司  
FT7521 • 1.0.8  
www.fairchildsemi.com  
8
© 2009兆半体公司  
FT7521 • 1.0.8  
www.fairchildsemi.com  
9
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent  
coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.  
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,  
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not  
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification  
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