FTCO3V85A1 [ONSEMI]
汽车功率集成模块 （PIM）三相1.5kW 48V-12V 交错式DC-DC转换器;
| 型号： | FTCO3V85A1 |
| 厂家： | 
ONSEMI |
| 描述： | 汽车功率集成模块 （PIM）三相1.5kW 48V-12V 交错式DC-DC转换器 DC-DC转换器 |
| 文件： | 总15页 (文件大小：535K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FTCO3V85A1
3-Phase Automotive Power
Module for DC-DC
Converter
General Description
The FTCO3V85A1 is an 80 V low Rds(on) automotive qualified
power module, featuring a 3−phase MOSFET bridge optimized for
Automotive 48 V−12 V interleaved DC−DC converter system, it
includes a precision shunt resistor for current sensing, an NTC for
temperature sensing, and an RC snubber circuit.
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The module utilizes ON’s trench MOSFET technology and it is
designed to provide a very compact and high efficiency solution for
DC−DC converter system. The Power module is 100% lead free,
RoHS and UL compliant.
19LD, APM, PDD STD 9
(APM19−CBC)
Features
CASE MODCD
• 3−Phase 1.5 kW 48 V−12 V Interleaved DC−DC Converter
MARKING DIAGRAM
• 80 V−125 A Trench MOSFET’s for High−Side
80 V−160 A Trench MOSFET for Low−Side
• Precise Shunt Current Sensing
$Y&Z&3&K
FTCO
3V85A1
• Temperature Sensing
• DBC Substrate
• 100% Lead Free and RoHS Compliant 2000/53/C Directive
• UL94V−0 Compliant
• Isolation Rating of 2500 Vrms/min
• Mounting Through Screws
• Automotive Qualified
$Y
&Z
&3
&K
= ON Semiconductor Logo
= Assembly Plant Code
= Data Code (Year & Week)
= Lot
FTCO3V85A1
= Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 13 of
this data sheet.
Benefits
• Low Junction−Sink Thermal Resistance
• Low Power Loss for High Efficiency in DC−DC System Design
• Low Electrical Resistance
• Compact DC−DC Converter Design
• Highly Integrated Compact Design
• Better EMI and Electrical Isolation
• Easy and Reliable Installation
• High Current Handling
• Improved Overall System Reliability
Applications
• DC−DC Converter
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
February, 2019 − Rev. 4
FTCO3V85A1/D
FTCO3V85A1
Figure 1. Pin Configuration
Table 1. PIN DESC
Pin No.
1
Pin Number
Pin Description
TEMP 1
TEMP 2
NTC Thermistor Terminal 1
2
NTC Thermistor Terminal 2
3
PHASE 3 SENSE
GATE 3
Source of Q3 and Drain of Q6
4
Gate of Q3, high side Phase 3 MOSFET
Gate of Q6, low side Phase 3 MOSFET
Source of Q2 and Drain of Q5
5
GATE 6
6
PHASE 2 SENSE
GATE 2
7
Gate of Q2, high side Phase 2 MOSFET
Gate of Q5, low side Phase 2 MOSFET
Source of Q1 and Drain of Q4
8
GATE 5
9
PHASE 1 SENSE
GATE 1
10
11
12
13
14
15
16
17
18
19
Gate of Q1, high side Phase 1 MOSFET
VBAT SENSE
GATE 4
Sense pin for battery voltage and Drain of high side MOSFETs
Gate of Q4, low side Phase 1 MOSFET
Positive CSR sense pin and source connection for low side MOSFETs
Negative CSR sense pin and sense pin for battery return
Battery voltage power lead
SHUNT P
SHUNT N
VBAT
GND
Battery return power lead
PHASE 1
PHASE 2
PHASE 3
Phase 1 power lead
Phase 2 power lead
Phase 3 power lead
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2
FTCO3V85A1
Figure 2. Internal Equivalent Circuit
Flammability Information
Compliance to RoHS
All materials present in the power module meet UL
flammability rating class 94V−0 or higher.
The Power Module is 100% lead free and RoHS
compliant with the 2000/53/C directive.
Solder
Solder used is a lead free SnAgCu alloy.
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3
FTCO3V85A1
ABSOLUTE MAXIMUM RATINGS (T = 25°C, Unless otherwise specified)
C
Symbol
Parameter
FTCO3V85A1
Unit
V
V
V
(Q1∼Q6) Drain to Source Voltage
(Q1∼Q6) Gate to Source Voltage
80
DS
20
V
GS
I (high−side) Drain Current Continuous (T = 25°C, T = 175°C, V = 10 V) (Note 1)
125
160
190
324
115
135
175
125
A
D
C
J
GS
I (low−side)
D
Drain Current Continuous (T = 25°C, T = 175°C, V = 10 V) (Note 1)
A
C
J
GS
E
AS
E
AS
(Q1∼Q3)
(Q4∼Q6)
Single Pulse Avalanche Energy (Note 2)
Single Pulse Avalanche Energy (Note 2)
mJ
mJ
W
W
°C
°C
P (high−side) Power dissipation (T = 25°C, T = 175°C)
D
C
J
P (low−side) Power dissipation (T = 25°C, T = 175°C)
D
C
J
T
Maximum Junction Temperature
Storage Temperature
J
T
STG
THERMAL RESISTANCE
Symbol
Parameter
Min.
−
Typ.
1.0
1.0
1.0
0.8
0.8
0.8
Max.
1.3
Unit
Q1 Thermal Resistance J −C
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C
Rthjc Thermal
Resistance
Junction to
Q2 Thermal Resistance J −C
Q3 Thermal Resistance J −C
−
1.3
−
1.3
case, Single
FET, (Note 3) Q4 Thermal Resistance J −C
Q5 Thermal Resistance J −C
−
1.1
−
1.1
Q6 Thermal Resistance J −C
−
1.1
T
Maximum Junction Temperature
Operating Sink Temperature
Storage Temperature
−
175
120
125
J
T
S
−40
−40
°C
TSTG
°C
1. Max value not to exceed Tj=175°C based on max limitation of Rthjc thermal limitation and Rdson. Defined by design, not subject production
testing.
2. For Q1−Q3: Starting TJ = 25°C, L = 0.08mH, IAS = 69 A, VDD = 80 V during inductor charging and VDD = 0 V during time in avalanche. For
Q4−Q6: Starting TJ = 25°C, L = 0.08 mH, IAS = 90 A, VDD = 80 V during inductor charging and VDD = 0 V during time in avalanche.
3. Test method compliant with MIL STD 883−1012.1.
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4
FTCO3V85A1
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
D−S Breakdown Voltage
(Inverter MOSFETs)
V
GS
= 0V, I = 250 mA
BV
80
−
−
V
D
DSS
V
GS
Gate to Source Voltage
(Inverter MOSFETs)
Gate−to−Source Voltage
−20
−
20
V
Threshold Voltage (Q1−Q6)
V
= V , I = 250 mA, T = 25°C
V
2
3
4
1
V
V
GS
DS
D
J
TH
VSD
MOSFET Body Diode Forward Voltage
V
= 0 V, I = 80 A, T = 25°C
−
−
GS
S
J
Inverter High Side MOSFETs Q1
(See Note 4)
RDS(ON)Q1
V
= 10 V, I = 80 A, T = 25°C
−
−
2.4
2.4
3.5
3.5
mW
mW
GS
GS
D
J
RDS(ON)Q2
Inverter High Side MOSFETs Q2
(See Note 4)
V
= 10 V, I = 80 A, T = 25°C
D J
Inverter High Side MOSFETs Q3
(See Note 4)
RDS(ON)Q3
RDS(ON)Q4
RDS(ON)Q5
V
GS
V
GS
V
GS
= 10 V, I = 80 A, T = 25°C
−
−
−
2.5
1.9
2.1
3.7
2.6
2.8
mW
mW
mW
D
J
Inverter Low Side MOSFETs Q4
(See Note 4)
= 10 V, I = 80 A, T = 25°C
D
J
Inverter Low Side MOSFETs Q5
(See Note 4)
= 10 V, I = 80 A, T = 25°C
D J
Inverter Low Side MOSFETs Q6
(See Note 4)
RDS(ON)Q6
IGSS
V
= 10 V, I = 80 A, T = 25°C
−
−
2.4
3.1
mW
GS
D
J
Inverter MOSFETs
(UH,UL,VH,VL,WH,WL)
V
GS
=
20 V, V = 0 V, T = 25°C
−
100
nA
DS
J
Inverter MOSFETs
mA
IDSS
V
= 0 V, V = 80 V, T = 25°C
−
−
−
2
GS
DS
J
Drain to Source Leakage Current
Total loop resistance VLINK(+) − V0 (−)
V
= 10 V, I = 80 A, T = 25°C
5.9
7.5
mW
GS
D
J
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. High side Q1,Q2,Q3 have same die size and Rdson, Low side Q4,Q5,Q6 have same die size and Rdson. For lowest power loss, High and
Low side MOSFETs have different die size and Rdson. The different Rdson values listed in the datasheet are due to the different access
points available inside the module for Rdson measurement. While the high side MOSFETs (Q1, Q2, Q3) have source sense wire bonds, the
low side MOSFETs (Q4, Q5, Q6) do not have source sense wire bonds, thus resulting in higher Rdson values.
TEMPERATURE SENSE (NTC THERMISTOR)
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Voltage
Current = 1 mA, Temperature = 25°C
7.5
−
12
V
CURRENT SENSE RESISTOR
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Voltage
Current sense resistor current = 80 A (Note 5)
0.47
−
0.51
mW
Components
Spec
Quantity
Size
PT7 80 V,bare die Rdson 2.25 mW typical
PT7 80 V,bare die Rdson 1.35 mW typical
1
MOSFET
3ea (Q1−Q3)
195 mil x 95 mil
2
3
4
5
6
MOSFET
Resistor
Capacitor
CSR
3ea (Q4−Q6)
200 mil x 145 mil
142 mil x 55 mil
79 mil x 49 mil
250 mil x 120 mil
63 mil x 32 mil
1 W 0.5 W
1ea
1ea
1ea
1ea
0.022 mF 100 V
1% tolerance, 0.5 mW
1% tolerance, 10 kW
NTC
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5
FTCO3V85A1
DYNAMIC CHARACTERISTIC
Symbol
Parameter
Min
Test Conditions
Min.
−
Typ.
6320
1030
32
Max.
Unit
pF
pF
pF
pF
pF
pF
VDS = 40 V, VGS = 0 V,
C
C
Input Capacitance
Output Capacitance
−
−
−
−
−
−
iss
f = 1 MHZ for Q1−Q3
−
(High side MOSFET)
oss
C
Reverse Transfer Capacitance
Input Capacitance
−
rss
C
−
10000
1400
95
iss
VDS = 40 V, VGS = 0 V,
f = 1 MHZ for Q4−Q6
(Low side MOSFET)
C
Output Capacitance
−
oss
C
Reverse Transfer Capacitance
−
rss
VGS = 0V, f = 1MHZ for Q1−Q3
R
Gate Resistance
Gate Resistance
−
−
2.1
3.3
−
−
W
W
G
G
(High side MOSFET)
VGS = 0V, f = 1MHZ for Q4−Q6
R
(Low side MOSFET)
VGS = 0 to 10 V
Q
Q
Total Gate Charge at 10 V
Threshold Gate Charge
−
−
−
−
86
12
30
18
112
18
−
nC
nC
nC
nC
g(TOT)
V
= 64 V
DD
D
g
I
= 80 A
Q
VGS = 0 to 2 V
g(TH)
I = 1 mA
Q
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
For Q1−Q3
(High side
MOSFET)
gs
gd
Q
−
V
= 0 to 10 V
= 0 to 2 V
Total Gate Charge at 10 V
Threshold Gate Charge
−
−
−
131
18
150
21
−
nC
nC
nC
GS
g(TOT)
Q
V
GS
V
= 64 V
= 80 A
g(TH)
DD
I
D
g
Q
Gate to Source Gate Charge
For Q4−Q6
(Low side
MOSFET)
47
gs
gd
I = 1 mA
Q
Gate to Drain “Miller” Charge
−
24
−
nC
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6
FTCO3V85A1
TYPICAL CHARACTERISTICS
(The dynamic, switching characteristics and Graphs are in reference to the FDBL86366_F085 (TOLL) Datasheet (High side MOSFET)
1.2
1.0
0.8
0.6
0.4
0.2
0.0
250
200
150
100
50
CURRENT LIMITED
BY SILICON
V
= 10V
GS
0
0
25
50
75
100 125 150 175
25
50
75
100 125 150 175 200
TC, CASE TEMPERATURE(oC)
TC, CASE TEMPERATURE(oC)
Figure 3. Normalized Power Dissipation vs.
Case Temperature
Figure 4. Maximum Continuous Drain
Current vs. Case Temperature
2
DUTY CYCLE − DESCENDING ORDER
1
D = 0.50
0.20
0.10
P
DM
0.05
0.02
t
1
0.01
0.1
t
2
NOTES:
DUTY FACTOR: D = t /t
1
2
PEAK T = P x Z
x R
+ T
J
DM
qJA
qJA A
SINGLE PULSE
0.01
10−5
10−4
10−3
10−2
10−1
100
101
t, RECTANGULAR PULSE DURATION(s)
Figure 5. Normalized Maximum Transient Thermal Impedance
10000
o
VGS= 10V
T
= 25
C
C
FOR TEMPERATURES
o
ABOVE 25 C DERATE PEAK
CURRENT AS FOLLOWS:
1000
100
10
175 − T
C
I = I
2
150
SINGLE PULSE
10−5
10−4
10−3
10−2
10−1
100
101
t, RECTANGULAR PULSE DURATION(s)
Figure 6. Peak Current Capability
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7
FTCO3V85A1
TYPICAL CHARACTERISTICS
(The dynamic, switching characteristics and Graphs are in reference to the FDBL86366_F085 (TOLL) Datasheet (High side MOSFET)
(Continued)
1000
100
10
1000
100
10
If R = 0
tAV = (L)(IAS)/(1.3*RATED BVDSS − V
)
DD
If R ! 0
tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS − VDD) +1]
100us
1ms
o
OPERATION IN THIS
AREA MAY BE
STARTING T = 25 C
J
LIMITED BY r
DS(on)
1
SINGLE PULSE
o
T
= MAX RATED
STARTING T = 150 C
J
J
10ms
100ms
o
T
= 25 C
C
0.1
1
0.001 0.01
0.1
1
10
100 1000
0.1
1
10
100
500
t
, TIME IN AVALANCHE (ms)
AV
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Forward Bias Safe Operating Area
Figure 8. Unclamped Inductive Switching
Capability
300
300
100
m
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX
V
GS
= 0 V
250
200
150
100
50
V
= 5V
DD
o
T = 175 C
10
1
J
o
o
T = 25 C
J
TJ = 25 C
o
TJ = 175 C
o
TJ = −55 C
0
0.1
2
3
4
5
6
7
8
0.0
0.4
0.6
0.8
1.0
1.2
0.2
VGS, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 9. Transfer Characteristics
Figure 10. Forward Diode Characteristics
300
300
V
15V Top
V
GS
15V Top
GS
250
200
150
100
50
250
200
150
100
50
10V
8V
10V
8V
7V
6V
5.5V
7V
6V
5.5V
80ms PULSE WIDTH
Tj=25 C
5V Bottom
5V Bottom
o
80ms PULSE WIDTH
o
Tj=175 C
0
0
0
1
2
3
4
5
0
1
2
3
4
5
VDS, DRAIN TO SOURCE VOLTAGE (V)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 11. Saturation Characteristics
Figure 12. Saturation Characteristics
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8
FTCO3V85A1
TYPICAL CHARACTERISTICS
(The dynamic, switching characteristics and Graphs are in reference to the FDBL86366_F085 (TOLL) Datasheet (High side MOSFET)
(Continued)
50
40
30
20
10
0
2.4
2.0
1.6
1.2
0.8
0.4
m
PULSE DURATION = 80 s
I
= 80A
PULSE DURATION = 80ms
DUTY CYCLE = 0.5% MAX
D
DUTY CYCLE = 0.5% MAX
o
T
= 25 C
J
o
T
= 175 C
J
I
V
= 80A
D
= 10V
GS
−80 −40
0
40
80
120 160 200
(
4
6
8
10
TJ, JUNCTION TEMPERATURE oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 13. RDSON vs. Gate Voltage
Figure 14. Normalized RDSON vs.
Junction Temperature
1.5
1.10
1.05
1.00
0.95
0.90
V
= V
DS
GS
I
D
= 5mA
I
D
= 250mA
1.2
0.9
0.6
0.3
0.0
−80 −40
0
40
80
120 160 200
TJ, JUNCTION TEMPERATURE(C)
−80
−40
0
40
80
120
160
20
TJ, JUNCTION TEMPERATUREo(C)
o
Figure 15. Normalized Gate Threshold
Voltage vs. Temperature
Figure 16. Normalized Drain to Source
Breakdown Voltage vs. Junction Temperature
10000
1000
100
10
ID = 80A
C
iss
VDD = 40V
VDD =32V
8
VDD = 48V
6
4
2
0
C
oss
C
rss
f = 1MHz
= 0V
V
GS
10
0.1
1
10
100
0
20
40
60
80
100
VDS, DRAIN TO SOURCE VOLTAGE(V)
Qg, GATE CHARGE(nC)
Figure 17. Capacitance vs. Drain to Source
Voltage
Figure 18. Gate Charge vs. Gate to Source
Voltage
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FTCO3V85A1
TYPICAL CHARACTERISTICS
(The dynamic, switching characteristics and Graphs are in reference to the FDBL86363_F085 (TOLL) Datasheet (Low side MOSFET)
(Continued)
1.2
1.0
0.8
0.6
0.4
0.2
0.0
350
280
210
140
70
CURRENT LIMITED
BY SILICON
V
= 10V
GS
0
25 50
75
100 125 150 175 200
0
25 50
75
100 125 150 175
TC, CASE TEMPERATURE(oC)
TC, CASE TEMPERATURE(oC)
Figure 19. Normalized Power Dissipation vs.
Case Temperature
Figure 20. Maximum Continuous Drain
Current vs. Case Temperature
2
DUTY CYCLE − DESCENDING ORDER
1
D = 0.50
0.20
0.10
P
DM
0.05
0.02
t
1
0.01
0.1
t
2
NOTES:
DUTY FACTOR: D = t /t
1
2
PEAK T = P
J
x Z
x R
+ T
qJA A
DM
qJA
SINGLE PULSE
0.01
10−5
10−4
10−3
10−2
10−1
100
101
t, RECTANGULAR PULSE DURATION(s)
Figure 21. Normalized Maximum Transient Thermal Impedance
10000
o
TC = 25 C
VGS= 10V
FOR TEMPERATURES
o
ABOVE 25 C DERATE PEAK
CURRENT AS FOLLOWS:
1000
100
10
175 − TC
I = I 2
150
SINGLE PULSE
10−5
10−4
10−3
10−2
10−1
100
101
t, RECTANGULAR PULSE DURATION(s)
Figure 22. Peak Current Capability
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10
FTCO3V85A1
TYPICAL CHARACTERISTICS
(The dynamic, switching characteristics and Graphs are in reference to the FDBL86363_F085 (TOLL) Datasheet (Low side MOSFET)
(Continued)
1000
100
10
2000
1000
If R = 0
= (L)(I )/(1.3*RATED BV
t
AV
− V )
DD
AS
DSS
If R ! 0
t
= (L/R)ln[(I *R)/(1.3*RATED BV
− V ) +1]
AV
AS
DSS
DD
100
10
1
100us
1ms
o
STARTING T = 25 C
J
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(on)
1
SINGLE PULSE
o
T
= MAX RATED
J
STARTING T = 150 C
J
10ms
100ms
o
T
= 25 C
C
0.1
0.001 0.01
0.1
1
10
100 1000
0.1
1
10
100
500
t
, TIME IN AVALANCHE (ms)
AV
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 23. Forward Bias Safe Operating Area
Figure 24. Unclamped Inductive Switching
Capability
350
400
PULSE DURATION = 80ms
DUTY CYCLE = 0.5% MAX
V
GS
= 0 V
300
100
10
1
V
= 5V
DD
250
200
150
100
50
o
T = 175 C
J
o
TJ = 25 C
o
T
J
= 25 C
o
o
TJ = 175 C
TJ = −55 C
0
0.1
2
3
4
5
6
7
8
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
V
, BODY DIODE FORWARD VOLTAGE (V)
SD
Figure 25. Transfer Characteristics
Figure 26. Forward Diode Characteristics
350
350
V
15V Top
V
GS
15V Top
GS
300
250
200
150
100
50
300
250
200
150
100
50
10V
8V
10V
8V
7V
7V
6V
5.5V
6V
5.5V
5V Bottom
5V Bottom
m
80 s PULSE WIDTH
o
Tj=25 C
80ms PULSE WIDTH
o
Tj=175 C
0
0
0
1
2
3
4
5
0
1
2
3
4
5
VDS, DRAIN TO SOURCE VOLTAGE (V)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 27. Saturation Characteristics
Figure 28. Saturation Characteristics
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FTCO3V85A1
TYPICAL PERFORMANCE CHARACTERISTICS
(The dynamic, switching characteristics and Graphs are in reference to the FDBL86363_F085 (TOLL) Datasheet (Low side MOSFET)
(Continued)
2.4
2.0
1.6
1.2
0.8
0.4
50
40
30
20
PULSE DURATION = 80 s
m
m
I
D
= 80A
PULSE DURATION = 80 s
DUTY CYCLE = 0.5% MAX
DUTY CYCLE = 0.5% MAX
o
o
T
= 175 C
T
J
= 25 C
J
I
= 80A
10
0
D
V
= 10V
GS
−80 −40
0
40
80
120 160 200
(
2
4
6
8
10
TJ , JUNCTION TEMPERATURE oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 29. RDSON vs. Gate Voltage
Figure 30. Normalized RDSON vs.
Junction Temperature
1.5
1.2
0.9
0.6
0.3
0.0
1.10
1.05
1.00
0.95
0.90
V
= V
DS
GS
I
D
= 5mA
m
I
D
= 250 A
−80 −40
0
40
80
120 160 200
−80
−40
0
40
80
120
160
200
TJ, JUNCTION TEMPERATURE(oC)
TJ , JUNCTION TEMPERATURE o(C)
Figure 31. Normalized Gate Threshold
Voltage vs. Temperature
Figure 32. Normalized Drain to Source
Breakdown Voltage vs. Junction Temperature
100000
10000
1000
100
10
ID = 80A
C
iss
VDD = 32V
40V
48V
8
6
4
2
0
C
oss
C
rss
f = 1MHz
= 0V
V
GS
10
0.1
1
10
100
0
30
60
90
120
150
, GATE CHARGE(nC)
Qg
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 33. Capacitance vs. Drain to Source
Voltage
Figure 34. Gate Charge vs. Gate to Source
Voltage
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12
FTCO3V85A1
Table 2. MECHANICAL CHARACTERISTICS AND RATINGS
Limits
Typ.
−
Units
Min.
0
Max.
+150
0.8
Parameter
Device Flatness
Mounting Torque
Weight
Condition
Note Fig. 15
Mounting Screw: −M3, Recommended 0.7N.m
mm
N.m
g
0.4
−
−
20
−
Table 3. PACKAGE MARKING AND ORDERING INFORMATION
Device Marking
Packing Type
Quantity
11
FTCO3V85A1
Tube
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13
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
19LD, APM, PDD STD (APM19−CBC)
CASE MODCD
ISSUE O
DATE 30 NOV 2016
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19LD, APM, PDD STD (APM19−CBC)
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