FXL2T245L10X [ONSEMI]
低电压双电源 2 位信号转换器，带可配置电压供应和信号电平，以及 3 态输出;
| 型号： | FXL2T245L10X |
| 厂家： | 
ONSEMI |
| 描述： | 低电压双电源 2 位信号转换器，带可配置电压供应和信号电平，以及 3 态输出 PC 接口集成电路 转换器 |
| 文件： | 总13页 (文件大小：1123K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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April 2014
FXL2T245
Low-Voltage, Dual-Supply, 2-Bit, Signal Translator
with Configurable Voltage Supplies and Signal Levels
and 3-State Outputs
Description
Features
The FXL2T245 is a configurable, dual-voltage-supply
translator designed for uni-directional and bi-directional
voltage translation between two logic levels. The device
allows translation between voltages as high as 3.6 V to
as low as 1.1 V. The A port tracks the VCCA level and the
B port tracks the VCCB level. This allows for bi-directional
voltage translation over a variety of voltage levels:
1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V.
.
Bi-Directional Interface between any 2 Levels from
1.1 V to 3.6 V
.
.
Fully Configurable, Inputs Track VCC Level
Non-Preferential Power-up Sequencing; either VCC
maybe Powered-up First
.
Outputs Remain in 3-State until Active VCC Level is
Reached
The device remains in 3-state until both VCCs reach
active levels, allowing either VCC to be powered-up first.
Internal power-down control circuits place the device in
3-state if either VCC is removed.
.
.
.
Outputs Switch to 3-State if either VCC is at GND
Power-Off Protection
Control Inputs (T/R, OE) Levels are Referenced to
VCCA Voltage
The Transmit / Receive (T/R) input determines the
direction of data flow through the device. The OE input,
when HIGH, disables both the A and B ports by placing
them in a 3-state condition. The FXL2T245 is designed
.
.
Packaged in 10-Lead MicroPak
(1.6 mm x 2.1 mm) Package
so control pins T/R and OE are supplied by VCCA
.
ESD Protection Exceeds:
4 kV HBM ESD JESD22-A114 & Mil Std 883e
3015.7)
8kV HBM I/O to GND ESD (per JESD22-A114 &
Mil Std 883e 3015.7)
1 kV CDM ESD (per ESD STM 5.3)
200 V MM ESD (per JESD22-A115 & ESD
STM5.2)
Ordering Information
Operating
Temperature Range
Packing
Method
Part Number
Package
FXL2T245L10X
-40°C to +85°C
10-Lead, MicroPak™, JEDEC MO255,1.6 x 2.1 mm
Tape and Reel
© 2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FXL2T245 • Rev. 1.0.2
Pin Configuration
Figure 1.
Pin Assignments
Pin Descriptions
Pin#
Pin Name
Description
1
2
VCCA
A0
Side A Power Supply
Side A Inputs or 3-State Outputs
Side A Inputs or 3-State Outputs
Transmit/Receive Input
Ground
3
A1
4
T/R
GND
O/E
B1
5, 6
7
Output Enable Input
8
Side B Inputs or 3- State Outputs
Side B Inputs or 3-State Outputs
Side B Power Supply
9
B0
10
VCCB
Truth Table
Inputs
Outputs
OE
LOW
T/R
LOW
HIGH
Bus B Data to Bus A
Bus A Data to Bus B
LOW
Notes:
1. LOW = low voltage level.
2. HIGH = high voltage level.
© 2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FXL2T245 • Rev. 1.0.2
2
Functional Description
Power-Up / Power-Down Sequencing
Due to the chip design, the FXL2T245 translator offers
the advantage of either VCC being powered up first.
When either VCC is at 0 V, outputs are in a high-
impedance state. The control inputs (T/R and OE) are
designed to track the VCCA supply. A pull-up resistor
tying OE to VCCA should be used to ensure that bus
contention, excessive currents, or oscillations do not
occur during power-up/power-down. The size of the pull-
up resistor is based upon the current-sinking capability
of the OE driver.
The recommended power-down sequence is:
1. Drive OE input HIGH to disable the device.
2. Remove power from either VCC
.
3. Remove power from the other VCC
.
The recommended power-up sequence is:
1. Apply power to either VCC
.
2. Apply power to the T/R input (logic HIGH for A-to-B
operation; logic LOW for B-to-A operation) and to
the respective data inputs (A port or B port). This
may occur at the same time as step 1.
3. Apply power to the other VCC
.
4. Drive the OE input LOW to enable the device.
© 2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FXL2T245 • Rev. 1.0.2
3
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
VCCA
Parameter
Supply Voltage
Conditions
Min.
Max. Unit
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
4.6
V
VCCB
4.6
I/O Port A
I/O Port B
4.6
VI
DC Input Voltage
Output Voltage(3)
4.6
4.6
4.6
V
V
Control Inputs (T/R, OE)
Output 3-State
Output Active (An)
Output Active (Bn)
VI < 0 V
VO
-0.5 to VCCA 0.5
-0.5 to VCCB 0.5
IIK
DC Input Diode Current
DC Output Diode Current
-50
-50
mA
mA
mA
VO < 0 V
IOK
VO > VCC
+50
±50
IOH/IOL DC Output Source/Sink Current
ICC
DC VCC or Ground Current per Supply Pin
Storage Temperature Range
±100 mA
+150 °C
4
TSTG
-65
All Pins
Human Body Model,
JESD22-A114, Mil Std 883e 3015.7
I/O to GND
8
1
kV
Electrostatic Discharge
Capability
ESD
Charged Device Model, JESD22-C101,STM 5.3
Machine Model, JESD22-A115,STM 5.2
200
V
Note:
3. I/O absolute maximum ratings must be observed.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance. Fairchild does not recommend exceeding them or
designing to Absolute Maximum Ratings.
Symbol
Parameter
Power Supply
Conditions
Min.
Max. Unit
VCC
Operating VCCA or VCCB
Port A
1.1
0
3.6
3.6
V
VI
Input Voltage
Port B
0
3.6
V
Control Inputs (T/R, OE)
3.0 V to 3.6 V
2.3 V to 2.7 V
0
VCCA
±24
±18
±6
IOH/IOL Output Current
VCC
1.65 V to 1.95 V
1.40 V to 1.65 V
1.1 V to 1.4 V
mA
±2
±0.5
+85
10
TA
Operating Temperature, Free Air
Minimum Input Edge Rate
-40
°C
VCCA/B =1.1 V to 3.6 V
ns/V
V/t
Note:
4. All unused inputs must be held at VCCI or GND.
© 2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FXL2T245 • Rev. 1.0.2
4
Electrical Characteristics
Symbol
Parameter
Conditions
VCCO (V)
VCCI (V)
Min.
2.00
1.60
Max.
Unit
2.70 to 3.60
2.30 to 2.70
Data Inputs An, Bn
1.65 to 2.30 0.65 x VCCI
1.40 to 1.65 0.65 x VCCI
1.10 to 1.40 0.90 x VCCI
HIGH Level
Input(5)
VIH
1.10 to 3.60
V
2.70 to 3.60
2.30 to 2.70
2.00
1.60
Control Pins /OE, T/R
1.65 to 2.30 0.65 x VCCA
1.40 to 1.65 0.65 x VCCA
1.10 to 1.40 0.90 x VCCA
2.70 to 3.60
(Referenced to VCCA
)
0.80
2.30 to 2.70
0.70
Data Inputs An, Bn
1.65 to 2.30
0.35 x VCCI
0.35 x VCCI
0.10 x VCCI
0.80
1.40 to 1.65
1.10 to 1.40
LOW Level
Input(5)
VIL
1.10 to 3.60
V
2.70 to 3.60
2.30 to 2.70
0.70
Control Pins /OE, T/R
1.65 to 2.30
0.35 x VCCI
0.35 x VCCI
0.10 x VCCI
(Referenced to VCCA
)
1.40 to 1.65
1.10 to 1.40
IOH = -100 µA
IOH = -12 mA
IOH = -18 mA
IOH = -24 mA
IOH = -6 mA
IOH = -12 mA
IOH = -18 mA
IOH = -6 mA
IOH = -2 mA
IOH = -0.5 mA
IOL = 100 µA
IOL = 12 mA
IOL = 18 mA
IOL = 24 mA
IOL = 12 mA
IOL = 18 mA
IOL = 6 mA
1.10 to 3.60
2.70
1.10 to 3.60 VCC0 - 0.20
2.70
3.00
2.20
2.40
3.00
3.00
3.00
2.20
2.30
2.30
2.00
HIGH Level
Output(6)
VOH
V
2.30
2.30
1.80
2.30
2.30
1.70
1.65
1.65
1.25
1.40
1.40
1.05
1.10
1.10
0.75 x VCC0
1.10 to 3.60
2.70
1.10 to 3.60
2.70
0.20
0.40
3.00
3.00
0.40
3.00
3.00
0.55
LOW Level
Output(6)
VOL
2.30
2.30
0.40
V
2.30
2.30
0.60
1.65
1.65
0.30
IOL = 2 mA
1.40
1.40
0.35
IOL = 0.5 mA
1.10
1.10
0.30 x VCC0
Continued on the following page…
© 2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FXL2T245 • Rev. 1.0.2
5
Electrical Characteristics
Symbol
Parameter
Conditions
VCCO (V)
VCCI (V)
Min.
Max.
Unit
Input Leakage
IL
Current, Control VI=VCCA or GND
Pins
3.60
1.10 to 3.60
±1.0
µA
An,
3.60
0
0
±10
±10
µA
µA
µA
Power Off
Leakage
Current
VI or VO=0 V to 3.6 V
IOFF
Bn,
3.60
VI or VO=0 V to 3.6 V
3-State Output An, Bn, /OE=VIH
3.60
3.60
±10
±10
±10
20
Bn, /OE= Don’t Care(7)
An, /OE= Don’t Care(7)
3.60
0
Leakage
(0 ≤ VO ≤ 3.6 V,
VI=VIH or VIL)
IOZ
0
3.60
ICCA/B
ICCZ
1.10 to 3.60
1.10 to 3.60
1.10 to 3.60
0
1.10 to 3.60
1.10 to 3.60
0
VI=VCCI or GND; IO=0
Quiescent
20
-10
10
ICCA
Supply
VI=VCCA or GND; IO=0
Current(8)
1.10 to 3.60
1.10 to 3.60
0
0
-10
10
ICCB
VI=VCCB or GND; IO=0
1.10 to 3.60
Increase in ICC
per Input; Other
Inputs at VCC or
GND
VIH=3.0 V
3.60
3.60
500
µA
ICCA/B
Notes:
5. VCCI = the VCC associated with the data input under test.
6. VCCO = the VCC associated with the output under test.
7. Don’t care = any valid logic level.
8. Reflects current per supply, VCCA or VCCB
.
© 2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FXL2T245 • Rev. 1.0.2
6
AC Electrical Characteristics
TA= -40 to +85°C
VCCB=3.0 V
to 3.6 V
VCCB=2.3 V
to 2.7 V
VCCB=1.65 V
to 1.95 V
VCCB=1.4 V
to 1.6 V
VCCB=1.1 V
to 1.3V
Symbol
Parameter
Unit
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
VCCA=3.0 V to 3.6 V
Propagation
Delay A to B
0.2
0.2
0.5
0.5
0.2
0.2
3.5
3.5
4.0
4.0
3.8
3.7
0.3
0.2
0.7
0.5
0.2
0.2
3.9
3.8
4.4
4.0
4.0
3.7
0.5
0.3
1.0
0.5
0.7
0.2
5.4
4.0
5.9
4.0
4.8
3.7
0.6
0.5
1.0
0.5
1.5
0.2
6.8
4.3
6.4
4.0
6.2
3.7
1.4
0.8
1.5
0.5
2.0
0.2
22.0
13.0
17.0
4.0
tPLH, tPHL
ns
ns
ns
Propagation
Delay B to A
Output Enable
/OE to B
tPZH, tPZL
Output Enable
/OE to A
Output Disable
/OE to B
17.0
3.7
tPHZ, tPLZ
Output Disable
/OE to A
VCCA=2.3 V to 2.7 V
Propagation
0.2
0.3
0.6
0.6
0.2
0.2
3.8
3.9
4.2
4.5
4.1
4.0
0.4
0.4
0.8
0.6
0.2
0.2
4.2
4.2
4.6
4.5
4.3
4.0
0.5
0.5
1.0
0.6
0.7
0.2
5.6
4.5
6.0
4.5
4.8
4.0
0.8
0.5
1.0
0.6
1.5
0.2
6.9
4.8
6.8
4.5
6.7
4.0
1.4
1.0
1.5
0.6
2.0
0.2
22.0
7.0
Delay A to B
tPLH, tPHL
ns
ns
ns
Propagation
Delay B to A
Output Enable
/OE to B
17.0
4.5
tPZH, tPZL
Output Enable
/OE to A
Output Disable
/OE to B
17.0
4.0
tPHZ, tPLZ
Output Disable
/OE to A
VCCA=1.65 V to 1.95 V
Propagation
0.3
0.5
0.6
1.0
0.2
0.5
4.0
5.4
5.2
6.7
5.1
5.0
0.5
0.5
0.8
1.0
0.2
0.5
4.5
5.6
5.4
6.7
5.2
5.0
0.8
0.8
1.2
1.0
0.8
0.5
5.7
5.7
6.9
6.7
5.2
5.0
0.9
1.0
1.2
1.0
1.5
0.5
7.1
6.0
7.2
6.7
7.0
5.0
1.5
1.2
1.5
1.0
2.0
0.5
22.0
8.0
Delay A to B
ns
ns
ns
tPLH, tPHL
Propagation
Delay B to A
Output Enable
/OE to B
18.0
6.7
tPZH, tPZL
Output Enable
/OE to A
Output Disable
/OE to B
17.0
5.0
tPHZ, tPLZ
Output Disable
/OE to A
Continued on the following page…
© 2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FXL2T245 • Rev. 1.0.2
7
AC Electrical Characteristics
TA= -40 to +85°C
VCCB=3.0 V
to 3.6 V
VCCB=2.3 V
to 2.7 V
VCCB=1.65 V
to 1.95 V
VCCB=1.4 V
to 1.6 V
VCCB=1.1 V
to 1.3V
Symbol
Parameter
Unit
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
VCCA=1.4 V to 1.6 V
Propagation
Delay A to B
0.5
0.6
1.1
1.0
0.4
1.0
4.3
6.8
7.5
7.5
6.1
6.0
0.5
0.8
1.1
1.0
0.4
1.0
4.8
6.9
7.6
7.5
6.2
6.0
1.0
0.9
1.3
1.0
0.9
1.0
6.0
7.1
7.7
7.5
6.2
6.0
1.0
1.0
1.4
1.0
1.5
1.0
7.3
7.3
7.9
7.5
7.5
6.0
1.5
1.3
2.0
1.0
2.0
1.0
22.0
9.5
ns
ns
ns
tPLH, tPHL
Propagation
Delay B to A
Output Enable
/OE to B
20.0
7.5
tPZH, tPZL
Output Enable
/OE to A
Output Disable
/OE to B
18.0
6.0
tPHZ, tPLZ
Output Disable
/OE to A
VCCA=1.1 V to 1.3 V
Propagation
0.8
1.4
1.0
2.0
1.0
2.0
13.0
22.0
12.0
22.0
15.0
15.0
1.0
1.4
1.0
2.0
0.7
2.0
7.0
22.0
9.0
1.2
1.5
2.0
2.0
1.0
2.0
8.0
22.0
10.0
22.0
8.0
1.3
1.5
2.0
2.0
2.0
2.0
9.5
2.0
2.0
2.0
2.0
2.0
2.0
24.0
24.0
24.0
22.0
20.0
12.0
Delay A to B
tPLH, tPHL
ns
ns
ns
Propagation
Delay B to A
22.0
11.0
22.0
10.0
12.0
Output Enable
/OE to B
tPZH, tPZL
Output Enable
/OE to A
22.0
7.0
Output Disable
/OE to B
tPHZ, tPLZ
Output Disable
/OE to A
12.0
12.0
Capacitance
TA=+25°C
Symbol
Parameter
Conditions
VCCA=VCCB=3.3 V, VI=0V or VCCA/B
Unit
Typical
CIN
CI/O
CPD
Input Capacitance (Pins O/E, TR)
4
5
pF
pF
pF
Input / Output Capacitance An, Bn Ports VCCA=VCCB=3.3 V, VI=0V or VCCA/B
Power Dissipation Capacitance
VCCA=VCCB=3.3 V, VI=0V or VCC, f=10 MHz
20
© 2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FXL2T245 • Rev. 1.0.2
8
AC Loadings and Waveforms
Figure 2. AC Test Circuit
Switch
Open
Test
tPLH,tPHL
tPLZ,tPZL
tPHZ,tPZH
VCC0 • 2 at VCCO=3.3 ±0.3 V, 2.5 V ±0.2 V, 1.8 V ±0.15 V, 1.5 V ±0.1 V, 1.2 V ±0.1 V
GND
Table 1. AC Load Table
VCC0
CL
RL
Rtr1
1.2 V ±0.1 V
1.5 V ±0.1 V
1.8 V ±0.15 V
2.5 V ±0.2 V
3.3 V ±0.3 V
15 pF
15 pF
15 pF
15 pF
15 pF
2 k
2 k
2 k
2 k
2 k
2 k
2 k
2 k
2 k
2 k
Note:
Note:
11. Input tR=tF=2.0 ns, 10% to 90%.
12. Input tR-tF=2.5 ns, 10% to 90%, at VI=3.0 V to 3.6 V only.
9. Input tR=tF=2.0 ns, 10% to 90%.
10. Input tR-tF=2.5 ns, 10% to 90%, at VI=3.0 V to
3.6 V only.
Figure 3. Waveform for Inverting and
Non-Inverting Functions
Figure 4. 3-State Output Low Enable and Disable for
Low Voltage Logic
Notes:
13. Input tR=tF=2.0 ns, 10% to 90%.
14. Input tR-tF=2.5 ns, 10% to 90%, at VI=3.0 V to 3.6 V only.
Figure 5. 3-State Output High Enable and Disable for Low Voltage Logic
VCC
Symbol
3.3 V ± 0.3 V
2.5 V ± 0.2 V
1.8 V ± 0.15 V
1.5 V ± 0.1 V
1.2 V ± 0.1 V
VMI
VMO
VX
VCCI/2
VCCO/2
VCCI/2
VCCI/2
VCCI/2
VCCO/2
VCCI/2
VCCO/2
VCCO/2
VCCO/2
VOH - 0.3 V
VOL + 0.3 V
VOH – 0.15 V
VOL + 0.15 V
VOH – 0.15 V
VOL + 0.15 V
VOH – 0.1 V
VOL + 0.1 V
VOH – 0.1 V
VOL + 0.1 V
VY
Note:
15. For VMI VCCO=VCCA for control pins T/R and OE or VCCA/2.
© 2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FXL2T245 • Rev. 1.0.2
9
Physical Dimensions
0.05 C
2.10
A
1.62
2X
KEEPOUT ZONE, NO TRACES
OR VIAS ALLOWED
B
(0.11)
0.56
1.12
1.60
10X
(0.35)
(0.25)
PIN1 IDENT IS
2X LONGER THAN
OTHER LINES
0.05 C
10X
0.50
2X
TOP VIEW
RECOMMENDED LAND PATTERN
0.50±0.05
0.20±0.05
0.025±0.025
0.05 C
(0.10±0.10)
0.30±0.05
SIDE VIEW
C
0.15±0.05
0.30±0.05
2.10±0.05
DETAIL A
2X
(0.36)
D
DETAIL A 2X SCALE
0.60±0.05
(0.09±0.09) 10X
0.56
NOTES:
1
0.20±0.05
4
A. PACKAGE CONFORMS TO JEDEC
REGISTRATION MO-255, VARIATION UABD .
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 2009.
1.60±0.05
0.30±0.05
9X
5
10
(0.31)
0.50
D. PRESENCE OF CENTER PAD IS PACKAGE
SUPPLIER DEPENDENT. IF PRESENT IT IS
NOT INTENDED TO BE SOLDERED AND HAS A
BLACK OXIDE FINISH.
E. DRAWING FILENAME: MKT-MAC10Arev6.
F. DIMENSIONS WITHIN ( ) ARE UNCONTROLLED
6
9
0.20±0.05
9X
1.62
(0.20±0.20)
0.10
0.05
C A B
C
ALL FEATURES
BOTTOM VIEW
Figure 6.
10-Lead, MicroPak™, JEDEC MO255,1.6 x 2.1 mm
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/dwg/MA/MAC10A.pdf.
For current packing container specifications, visit Fairchild Semiconductor’s online packaging area:
http://www.fairchildsemi.com/packing_dwg/PKG-MAC10A.pdf.
© 2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FXL2T245 • Rev. 1.0.2
10
© 2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FXL2T245 • Rev. 1.0.2
11
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