HCPL2531WV [ONSEMI]
8 引脚 DIP 1Mbit/s 双沟道高速晶体管输出光耦合器(不建议用于新设计新的对等零件编号为 HCPL253xM);型号: | HCPL2531WV |
厂家: | ONSEMI |
描述: | 8 引脚 DIP 1Mbit/s 双沟道高速晶体管输出光耦合器(不建议用于新设计新的对等零件编号为 HCPL253xM) 输出元件 晶体管 光电 |
文件: | 总16页 (文件大小:706K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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August 2008
Single-Channel: 6N135, 6N136, HCPL2503, HCPL4502
Dual-Channel: HCPL2530, HCPL2531
High Speed Transistor Optocouplers
Features
Description
■ High speed –1 MBit/s
The HCPL4502, HCPL2503, 6N135, 6N136, HCPL2530
and HCPL2531 optocouplers coof an AlGaAs
LED optically coupled to a high sped photodetector
transistor.
■ Superior CMR – 10kV/µs
■ Dual-Channel HCPL2530/HCPL2531
■ Double working voltage – 480V RMS
■ CTR guaranteed 0–70°C
A separate connection for thbias of the photodiode
improves the speed by several orders of magnitude over
conventional phototransistor optocouplers by reducing
the base-collector cpacitance of the input transistor.
■ U.L. recognized (File # E90700)
Applications
■ Line receivers
An internal ise shield provides superior common
mode rejectioof 10kV/µs. An improved package allows
superioulation permitting a 480V working voltage
compareindustry standard of 220V.
■ Pulse transformer replacement
■ Output interface to CMOS-LSTTL-TTL
■ Wide bandwidth analog coupling
Schematics
Package Outlines
VCC
8
VCC
1
N/C
1
8
8
VF1
_
1
V01
7
B
2
+
2
3
6
5
VF
_
_
V02
3
6
5
VO
8
8
VF2
+
1
1
N/C
GND
GND
4
HCPL2530/HCPL2531
6N135, 6N136, HCPL2503, HCPL4502
Pin 7 is not connected in
Part Number HCPL4502
©2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
6N135, 6N136, HCPL2503, HCPL4502, HCPL2530, HCPL2531 Rev. 1.0.7
Absolute Maximum Ratings (T = 25°C unless otherwise specified)
A
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Storage Temperature
Operating Temperature
Lead Solder Temperature
Condition
Value
Units
°C
T
-55 to +125
-55 to +100
260 for 10 sec
STG
T
°C
OPR
T
°C
SOL
EMITTER
I (avg) DC/Average Forward Input
25
5
1.0
5
mA
mA
A
F
(1)
Current Each Channel
I (pk)
Peak Forward Input Current
Each Channel
50% duty cycle, 1ms P.W.
F
(2)
I (trans) Peak Transient Input Current
≤1µs P.W., 300pps
F
Each Channel
V
P
Reverse Input Voltage Each
Channel
V
R
Input Power Dissipation Each 6N135/6N136 and HCPL2503/4502
100
45
mW
D
Channel
(3)
HCPL-2530/253
DETECTOR
I
(avg) Average Output Current Each
Channel
8
mA
mA
O
I
(pk)
Peak Output Current Each
Channel
16
O
V
Emitter-Base Reverse Voltage 6N1N136 and HCPL2503 only
5
-0.5 to 30
-0.5 to 20
5
V
V
EBR
V
Supply Voltage
Output Voltage
CC
V
V
O
I
Base Current
6N135, 6N136 and HCPL2503 only
6N135, 6N136, HCPL2503, HCPL4502
HCPL2530, HCPL2531
mA
mW
mW
B
(4)
PD
Output Power Dissipaon
Each Channel
100
35
Notes:
1. Derate linearly above free-air temperature at a rate of 0.8mA/°C.
2. Derate linearly above 70°C free-air temperature at a rate of 1.6mA/°C.
3. Derate linearly above 70°C free-air temperature at a rate of 0.9 mW/°C.
4. Derate linearly above 70°C free-air temperature at a rate of 2.0 mW/°C.
©2005 Fairchild Semiconductor Corporation
6N135, 6N136, HCPL2503, HCPL4502, HCPL2530, HCPL2531 Rev. 1.0.7
www.fairchildsemi.com
2
Electrical Characteristics (T = 0 to 70°C Unless otherwise specified)
A
Individual Component Characteristics
Symbol
Parameter
Test Conditions
Device
Min. Typ.* Max. Unit
EMITTER
V
Input Forward Voltage
I = 16mA, T =25°C
1.45
1.7
1.8
V
F
F
A
I = 16mA
F
B
Input Reverse Breakdown
Voltage
I = 10 µA
5.0
V
VR
R
∆V /∆T Temperature Coefficient of I = 16mA
-1.6
mV/°C
F
A
F
Forward Voltage
DETECTOR
Logic High Output Current I = 0mA, V = V = 5.5V,
I
All
0.00
0.005
0.5
1
µA
OH
F
O
CC
T =25°C
A
I = 0mA, V = V = 15V,
6N135
6N136
F
O
CC
T =25°C
A
HCPL4502
HCPL203
I = 0mA, V = V = 15V
All
50
F
O
CC
I
Logic Low Supply Current
I = 16mA, V = Open,
N135
6N136
HCPL4502
HCPL2503
120
200
200
µA
µA
CCL
F
O
V
= 15V
CC
I
= I = 16mA
HCPL2530
HCPL2531
400
1
F1
F2
V = Open, V = V
O
CC
I
Logic High Supply Current I = 0mA, V Open,
6N135
6N136
CCH
F
O
V
= 1=25°C
CC
A
HCPL4502
HCPL2503
I 0mA, V = Open,
6N135
6N136
HCPL4502
HCPL2503
2
4
F
O
V
= 15V
CC
I = 0mA, V = Open,
HCPL2530
HCPL2531
0.02
F
O
V
= 15V
CC
*All Typicals at T = 5°C
A
©2005 Fairchild Semiconductor Corporation
6N135, 6N136, HCPL2503, HCPL4502, HCPL2530, HCPL2531 Rev. 1.0.7
www.fairchildsemi.com
3
Electrical Characteristics (Continued) (T = 0 to 70°C unless otherwise specified)
A
Transfer Characteristics
Symbol
COUPLED
CTR
Parameter
Test Conditions
Device
Min. Typ.* Max. Unit
Current Transfer
I = 16mA, V = 0.4 V,
6N135
HCPL2530
7
18
27
50
50
%
%
F
O
(5)
Ratio
V
= 4.5V, T =25°C
CC
A
6N136
19
HCPL4502
HCPL2531
HCPL2503
6N135
12
5
27
21
%
%
I = 16mA,
V
V
V
= 0.4V
= 0.5V
= 0.4V
F
OL
OL
OL
V
= 4.5V
CC
HCPL2530
6N136
HCPL4502
15
9
30
%
V
V
= 0.5V
= 0.4V
HCPL2531
HCPL2503
6N15
OL
30
%
V
OL
V
Logic LOW Output
Voltage
I = 16mA, I = 1.1mA,
0.18
0.18
0.25
0.4
0.5
0.4
OL
F
O
V
= 4.5V, T =25°C
CC
A
PL2530
I = 16mA, I = 3mA,
6N136
F
O
V
= 4.5V, T =25°C
HCPL2503
CC
A
HCPL2531
0.25
0.5
0.5
I = 16mA, I = 0.8mA,
6N135
F
O
V
= 4.5V
HCPL2530
CC
I = 16mA, I = 24mA,
HCPL4502
HCPL2531
0.5
F
O
V
= 4.5V
CC
*All Typicals at T = 25°C
A
Note:
5. Current Transfer Ratio is defined as ratof output collector current, I , to the forward LED input current, I ,
O
F
times 100%.
©2005 Fairchild Semiconductor Corporation
6N135, 6N136, HCPL2503, HCPL4502, HCPL2530, HCPL2531 Rev. 1.0.7
www.fairchildsemi.com
4
Electrical Characteristics (Continued) (T = 0 to 70°C unless otherwise specified)
A
Switching Characteristics (V = 5V)
CC
Symbol Parameter
Test Conditions
Device
Min. Typ.* Max. Unit
T
Propagation Delay
Time to Logic LOW
T = 25°C, R = 4.1kΩ,
6N135
HCPL2530
0.45
1.5
µs
PHL
A
L
(6)
I = 16mA (Fig. 7)
F
R = 1.9kΩ, I = 16mA,
6N136
0.45
0.8
µs
L
F
(7)
T = 25°C (Fig. 7)
HCPL4502
HCPL2503
HCPL2531
A
(6)
R = 4.1kΩ, I = 16mA (Fig. 7)
6N135
HCPL2530
2.0
1.0
µs
µs
L
F
(7)
R = 1.9kΩ, I = 16mA (Fig. 7)
6N136
L
F
HCPL4502
HCPL2503
HCPL2531
T
Propagation Delay
Time to Logic HIGH
T = 25°C, (R = 4.1kΩ,
6N135
HCPL2530
0.5
0.3
1.5
0.8
µs
µs
PLH
A
L
(6)
I = 16mA (Fig. 7)
F
(7)
R = 1.9kΩ, I = 16mA (Fig. 7)
6N136
L
F
T = 25°C
HCPL4502
HL2503
HPL2531
A
(6)
R = 4.1kΩ, I = 16mA (Fig. 7)
6N135
HCPL2530
2.0
1.0
µs
µs
L
F
(7)
R = 1.9kΩ, I = 16mA (Fig. 7)
6N136
L
F
HCPL4502
HCPL2503
HCPL2531
|CM | Common Mode
I = 0mA, V
0V
,
6N135
HCPL2530
10,000
10,000
V/µs
V/µs
H
F
CM
P-P
(8)
Transient
Immunity at
Logic High
R = 4.1kΩ, T 25°C (Fig. 8)
L
A
I = 0mA, V
= 10V
,
6N136
F
CM
P-P
(8)
R = .9kΩ, T = 25°C (Fig. 8)
HCPL4502
HCPL2503
HCPL2531
L
A
|CM | Common Mode
I = 16mA, V
= 10 V
,
6N135
HCPL2530
10,000
10,000
V/µs
V/µs
L
F
CM
P-P
(8)
Transient
Immunity at
Logic Low
R = 4.1kΩ, T = 25°C (Fig. 8)
L
A
I = 16mA, V
= 10 V ,
P-P
6N136
F
CM
(8)
R = 1.9kΩ (Fig. 8)
HCPL4502
HCPL2503
HCPL2531
L
** All Typicat T = 25°C
A
Notes
6. The 4.1kΩ load represents 1 LSTTL unit load of 0.36mA and 6.1kΩ pull-up resistor.
e 1.9kΩ load represents 1 TTL unit load of 1.6mA and 5.6kΩ pull-up resistor.
8. Common mode transient immunity in logic high level is the maximum tolerable (positive) dV /dt on the leading edge
cm
of the common mode pulse signal V , to assure that the output will remain in a logic high state (i.e., V > 2.0V).
CM
O
Common mode transient immunity in logic low level is the maximum tolerable (negative) dV /dt on the trailing edge
cm
of the common mode pulse signal, V , to assure that the output will remain in a logic low state (i.e., V < 0.8V).
CM
O
©2005 Fairchild Semiconductor Corporation
6N135, 6N136, HCPL2503, HCPL4502, HCPL2530, HCPL2531 Rev. 1.0.7
www.fairchildsemi.com
5
Electrical Characteristics (Continued) (T = 0 to 70°C unless otherwise specified)
A
Isolation Characteristics (T = 0 to 70°C Unless otherwise specified)
A
Symbol
Characteristics
Test Conditions
Min
Typ**
Max
Unit
I
Input-Output Insulation
Leakage Current
Relative humidity = 45%,
1.0
µA
I-O
T = 25°C, t = 5s,
A
(9)
V
= 3000 VDC
I-O
V
Withstand Insulation Test
Voltage
RH ≤ 50%, T = 25°C, I ≤ 2µA,
t = 1 min.
2500
V
RMS
ISO
A
I-O
(9)
(9)
12
R
C
Resistance (Input to Output)
V
= 500VDC
10
Ω
I-O
I-O
(9)
Capacitance (Input to Output) f = 1MHz
DC Current Gain
Input-Input Insulation Leakage RH ≤ 45%, V = 500VDC
0.6
150
pF
I-O
(9)
HFE
I = 3mA, V = 5V
O O
(10)
I
0.005
µA
Ω
I-I
I-I
Current
t = 5 s, (HCPL2530/2531 only)
(10)
1
R
C
Input-Input Resistance
V
= 500 VDC
10
I-I
I-I
(HCPL2530/2531 only)
(10)
Input-Input Capacitance
f = 1MHz)
0.03
pF
I-I
(HCPL2530/2531 only)
Notes:
9. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shord together and Pins 5, 6, 7 and 8 are
shorted together.
10. Measured between pins 1 and 2 shorted together, and pins 3 and orted together.
©2005 Fairchild Semiconductor Corporation
6N135, 6N136, HCPL2503, HCPL4502, HCPL2530, HCPL2531 Rev. 1.0.7
www.fairchildsemi.com
6
Typical Performance Curves
Fig. 1 Normalized CTR vs. Forward Current
Fig. 2 Normalized CTR vs.Temperature
1.2
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.0
0.8
0.6
0.4
V
V
= 0.4 V
O
I
V
16mA
Normalized to:
= 16 mA
Normalized to:
T = 25°C
A
= 5 V
CC
= 5 V
CC
0.4 V
I
F
T
= 25°C
A
O
0.2
0.0
0.1
1
10
100
-60
-40
-20
0
20
40
60
80
100
I
- FORWARD CURRENT (mA)
T - TEMPERATRE (°C)
A
F
Fig. 4 Logc High Output Current
vs.Temperature
Fig. 3 Output Current vs. Output Voltage
1000
100
10
16
14
12
10
8
TA = 25°C
CC = 5 V
I
F = 40mA
F = 35mA
I
V
V
= 0
F
V
CC
=
I
O
IF = 30mA
IF = 25mA
I
F = 20mA
F = 15mA
6
I
1
4
IF = 10mA
IF = 5mA
2
0.1
-60
0
-40
-20
0
20
40
60
80
100
0
2
4
6
8
10
12
14
16
18
20
T
– TEMPERATURE (°C)
V
– OUTPUT VOLTAGE (V
A
O
Fig. 5 Propagation Delvs.Temperature
Fig. 6 Propagation Delay vs. Load Resistance
800
700
600
500
400
300
200
0
10000
= 4.1kΩ (TPLH)
RL 4.1kΩ (TPLH)
kΩ (TPHL)
I
- 10mA (TPHL)
F
1000
I
- 16mA (TPHL)
- 16mA (TPLH)
F
RL = 1.9kΩ (TPLH)
I
F
V
T
= 5 V
I
V
= 16mA
= 5 V
CC
= 25°C
F
CC
I
- 10mA (TPLH)
F
A
100
-60
-40
-20
0
20
40
60
80
100
1
10
T
– TEMPERATURE (°C)
R – LOAD RESISTANCE (kΩ)
L
A
©2005 Fairchild Semiconductor Corporation
6N135, 6N136, HCPL2503, HCPL4502, HCPL2530, HCPL2531 Rev. 1.0.7
www.fairchildsemi.com
7
Test Circuits
Noise
Shield
Noise
Shield
Pulse
+
VCC
I
F
V
CC
Generator
tr = 5ns
+5 V
+5 V
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
Pulse
ZO = 50
Ω
R
L
Generator
V
F1
IF
+
VB
tr = 5ns
ZO= 50
10% D.C.
I/f< 100µs
V01
-
10% DUTY CYCLE
I/f < 100µS
VO
RL
Ω
VF
-
C
L
= 1.5 µF
VO
V02
-
VO
I
F
V
F2
0.1 µF
MONITOR
+
0.1 µF
IF Monitor
GND
Rm
Rm
C
L = 1.5 µF
GND
Test Circuit for 6N135, 6N136, HCPL-2503 and HCPL- 4502
Test Circuit for HCPL-2530 and HCPL-2531
IF
0
5 V
VO
1.5 V
1.5 V
VOL
TPHL
LH
Fig. 7 Switching Time Circuit
IF
Noise
Shield
Noise
Shield
VCC
V
CC
+
+5 V
+5 V
VO
1
2
3
4
8
7
6
1
8
7
6
5
IF
R
L
V
F1
+
VB
V01
-
RL
2
3
4
A
VF
-
A
VO
V02
B
-
0.1 µF
VO
B
VFF
V
F2
0.1 µF
VFF
+
GN
GND
-
+
-
VCM
-
+
PulsGe
Pulse Gen
Test Circuit for 6N135, 6HCPL-2503 and HCPL-4502
Test Circuit for HCPL-2530 and HCPL-2531
VCM 10 V
90% 90%
10%
tr
10%
tf
0 V
VO
5 V
Switch at A : IF = 0 mA
VO
VOL
Switch at A : IF = 16 mA
Fig. 8 Common Mode Immunity Test Circuit
©2005 Fairchild Semiconductor Corporation
6N135, 6N136, HCPL2503, HCPL4502, HCPL2530, HCPL2531 Rev. 1.0.7
www.fairchildsemi.com
8
Ordering Information
Option
S
Example Part Number
6N135S
Description
Surface Mount Lead Bend
SD
W
6N135SD
Surface Mount; Tape and reel
0.4" Lead Spacing
6N135W
V
6N135V
VDE0884
WV
SV
6N135WV
VDE0884; 0.4” lead spacing
VDE0884; surface mount
VDE0884; surface mount; tape and reel
6N135SV
SDV
6N135SDV
Marking Information
1
2
253
6
V XX YY T1
5
3
4
Definitions
1
Fairchild lgo
2
3
Dvice number
VDmark (Note: Only appears on parts ordered with VDE option –
See order entry table)
4
6
Two digit year code, e.g., ‘03’
Two digit work week ranging from ‘01’ to ‘53’
Assembly package code
©2005 Fairchild Semiconductor Corporation
6N135, 6N136, HCPL2503, HCPL4502, HCPL2530, HCPL2531 Rev. 1.0.7
www.fairchildsemi.com
9
Tape Specifications
12.0 ± 0.1
4.0 ± 0.1
4.90 ± 0.20
Ø1.55 ± 0.05
1.75 ± 0.10
4.0 ± 0.1
0.30 ± 0.05
7.5 ± 0.1
16.0 ± 03
10.30± 0.20
13.2 ± 0.2
Ø1.6 ± 0.1
10.30 ± 0.20
User Direction of Feed
0.1 MAX
Reflow Profile
300
250
200
150
100
50
215C, 10–30 s
225C pe
Time above 183C, 60–150 sec
Ramp up = 3C/sec
0
0
.5
1
1.5
2
2.5
3
3.5
4
4.5
Time (Minute)
Pak reflow temperature: 225C (package surface temperature)
• Time of temperature higher than 183C for 60–150 seconds
• One time soldering reflow is recommended
©2005 Fairchild Semiconductor Corporation
6N135, 6N136, HCPL2503, HCPL4502, HCPL2530, HCPL2531 Rev. 1.0.7
www.fairchildsemi.com
10
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