HCPL2730SD [ONSEMI]
8引脚DIP双通道低输入电流高增益分离式达林顿输出光电耦合器;型号: | HCPL2730SD |
厂家: | ONSEMI |
描述: | 8引脚DIP双通道低输入电流高增益分离式达林顿输出光电耦合器 输出元件 光电 |
文件: | 总18页 (文件大小:642K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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August 2008
Single-Channel: 6N138, 6N139
Dual-Channel: HCPL2730, HCPL2731
Low Input Current High Gain Split
Darlington Optocouplers
Features
Description
■ Low current – 0.5mA
The 6N138/9 and HCPL2730/HCPL273optocouplers
consist of an AlGaAs LED opticaupled to a high
gain split darlington photodetector.
■ Superior CTR-2000%
■ Superior CMR-10kV/µs
■ CTR guaranteed 0–70°C
■ U.L. recognized (File # E90700)
The split darlington configurtioseparating the input
photodiode and the first stae gain from the output
transistor permits lowr output saturation voltage and
higher speed operation than possible with conventional
darlington phototrnsistor optocoupler. In the dual
channel devices, HCPL2730/HCPL2731, an integrated
emitter-base sistor provides superior stability over
temperae.
■ VDE recognized (File # 120915) Ordering option V,
e.g., 6N138V
■ Dual Channel – HCPL2730, HCPL2731
Applications
■ Digital logic ground isolation
■ Telephone ring detector
■ EIA-RS-232C line receiver
■ High common mode noise line receiver
■ µP bus isolation
The comation of a very low input current of 0.5mA
and a high current transfer ratio of 2000% makes this
family particularly useful for input interface to MOS,
MOS, LSTTL and EIA RS232C, while output compati-
ility is ensured to CMOS as well as high fan-out TTL
requirements. An internal noise shield provides excep-
tional common mode rejection of 10 kV/µs.
■ Current loop receiver
Schematic
Package Outlines
VCC
N/C 1
8
+
1
8
8
VF1
_
1
VB
+
V01
2
3
4
7
6
5
2
3
7
6
5
VF
_
_
VO
V02
8
8
VF2
1
1
GND
GND
N
+
4
6N138 / 6N139
HCPL2730 / HCPL2731
©2005 Fairchild Semiconductor Corporation
www.fairchildsemi.com
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5
Absolute Maximum Ratings (T = 25°C unless otherwise specified)
A
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Value
Units
°C
T
Storage Temperature
Operating Temperature
-55 to +125
-40 to +85
STG
T
°C
OPR
T
Lead Solder Temperature (Wave solder only. See recommended reflow profile 260 for 10 sec
graph for SMD mounting)
°C
SOL
EMITTER
I (avg) DC/Average Forward Input Current
Each Channel
0
1.0
5
mA
mA
A
F
I (pk)
Peak Forward Input Current (50% duty cycle, 1 ms P.W.) Each Channel
F
I (trans) Peak Transient Input Current - (≤1µs P.W., 300 pps)
F
V
P
Reverse Input Voltage
Input Power Dissipation
Each Channel
Each Channel
V
R
D
35
mW
DETECTOR
(avg) Average Output Current
I
Each Channel
60
0.5
mA
V
O
V
Emitter-Base Reverse Voltage
Supply Voltage, Output Voltage
6N18 and 6N139
38, HCPL2730
6N139, HCPL2731
Each Channel
ER
V
, V
-0.5 to 7
-0.5 to 18
100
V
CC
O
P
Output Power Dissipation
mW
O
©2005 Fairchild Semiconductor Corporation
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5
www.fairchildsemi.com
2
Electrical Characteristics (T = 0 to 70°C unless otherwise specified)
A
Individual Component Characteristics
Symbol
EMITTER
Parameter
Test Conditions
Device
Min. Typ.* Max. Unit
V
Input Forward Voltage
T = 25°C
All
1.30
1.7
V
F
A
Each channel (I = 1.6mA)
1.75
F
BV
Input Reverse
Breakdown Voltage
T = 25°C, I = 10µA
All
All
5.0
20
V
R
A
R
∆V / ∆T Temperature
I = 1.6mA
-1.8
mV/°C
F
A
F
Coefficient of
Forward Voltage
DETECTOR
I
Logic HIGH Output
Current
I = 0mA, V = V = 18V
6N139
HCPL2731
6N138
0.0
0.01
100
250
µA
OH
F
O
CC
Each Channel
I = 0mA, V = V = 7V
F
O
CC
Each Channel
I = 1.6mA, V = Open, V = 18V
HCPL2730
I
Logic LOW supply
Logic HIGH Supply
6N38,
6N139
0.4
1.3
1.5
3
mA
µA
CCL
CCH
F
O
CC
I
= I = 1.6mA, V = 18V
CPL2731
HCPL2730
F1
F2
CC
V
– V = Open, V = 7V
O2 CC
O1
I
I = 0mA, V = Open, V = 18V
6N138,
6N139
0.05
0.10
10
20
F
O
CC
I
= I = 0mA, V =
HCPL2731
HCPL2730
F1
F2
CC
V
– V = Open, V =
O2 CC
O1
Transfer Characteristics
Symbol
Parameter
Test Conditions
Device
Min. Typ.* Max. Unit
COUPLED
CTR
Current Transfer
Ratio
= 0.5mA, V = 0.4 V, V = 4.5V
6N139
HCPL2731
6N139
400
500
300
1100
3500
1300
2500
1300
2500
0.08
%
O
CC
(1)(2)
Each Channel
I = 1.6mA, V = 0.4 V, V = 4.5V
F
O
CC
Each Channel
HCPL2731
6N138
I = 1.6mA, V = 0.4 V, V = 4.5V
F
O
CC
Each Channel
HCPL2730
6N139
V
Lc LOW Output
I = 0.5mA, I = 2mA, V = 4.5V
0.4
0.4
V
OL
F
O
CC
(2)
ltage
I = 1.6mA, I = 8mA, V = 4.5V
6N139
0.01
F
O
CC
Each Channel
HCPL2731
6N139
I = 0.5mA, I = 15mA, V = 4.5V
0.13
0.20
0.10
0.4
0.4
0.4
F
O
CC
Each Channel
HCPL2731
6N139
I = 12mA, I = 24mA, V = 4.5V
F
O
CC
Each Channel
HCPL2731
6N138
I = 1.6mA, I = 4.8mA, V = 4.5V
F
O
CC
Each Channel
HCPL2730
*All Typicals at T = 25°C
A
©2005 Fairchild Semiconductor Corporation
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5
www.fairchildsemi.com
3
Electrical Characteristics (Continued) (T = 0 to 70°C unless otherwise specified)
A
Switching Characteristics (V = 5V)
CC
Symbol Parameter
Test Conditions
Device
Min.
Typ.* Max. Unit
T
Propagation Delay R = 4.7Ω, I = 0.5mA
6N139
30
25
120
100
2
µs
PHL
L
F
Time to Logic
T = 25°C
4
3
A
(2)
LOW (Fig. 24)
R = 4.7Ω, I = 0.5mA
HCPL2731
6N139
L
F
Each Channel
R = 270Ω, I = 12mA
T = 25°C
A
L
F
T = 25°C
0.2
0
1.5
1
1
A
R = 270Ω, I = 12mA, Each Channel
HCPL2730
HCPL2731
6N138
3
L
F
T = 25°C
2
A
R = 2.2Ω, I = 1.6mA
15
10
25
20
90
L
F
T = 25°C
A
R = 2.2Ω, I = 1.6mA, Each Channel
HCPL2731
HCPL2730
L
F
T = 25°C
A
T
Propagation Delay R = 4.7Ω, I = 0.5mA
6N139
µs
PLH
L
F
Time to Logic
HIGH (Fig. 24)
Each Channel HCPL2731
(2)
R = 4.7Ω, I = 0.5mA, T = 25°C
N139
Each ChannCPL2731
6N139
12
22
60
L
F
A
R = 270Ω, I = 12mA
10
7
L
F
T = 25°C
1.3
5
A
R = 270Ω, I = 12mA, Eacnnel
HCPL2730
HCPL2731
15
10
50
L
F
T = 25°C
A
R = 2.2Ω, I = 1.6
6N138
L
F
Each Channel HCPL2730/1
R = 2.2Ω, I = .6mA, T = 25°C
6N138
7
35
L
F
A
Each Channel HCPL2730/1
16
|CM |
Common Mode
Transient
I = 0mA, |V | = 10V , T = 25°C,
6N138
6N139
1,000 10,000
V/µs
V/µs
H
F
CM
P-P
A
R = 2.2Ω
L
Immunity at Logic
Each Channel HCPL2730
HCPL2731
(3)
HIGH (Fig. 25)
|CM |
Common Mo
Transien
(I = 1.6mA, |V | = 10V , R = 2.2Ω)
6N138
6N139
1,000 10,000
L
F
CM
P-P
L
T = 25°C
A
Immunity at Logic
LOW (Fig. 25)
Each Channel HCPL2730
HCPL2731
(3)
** All Typicaat T = 25°C
A
©2005 Fairchild Semiconductor Corporation
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5
www.fairchildsemi.com
4
Electrical Characteristics (Continued) (T = 0 to 70°C unless otherwise specified)
A
Isolation Characteristics
Symbol
Characteristics
Test Conditions
Min.
Typ.*
Max.
Unit
I
Input-Output Insulation Leakage
Current
Relative humidity = 45%,T = 25°C,
1.0
µA
I-O
A
(4)
t = 5s, V = 3000VDC
I-O
V
Withstand Insulation Test
Voltage
RH ≤ 50%, T = 25°C, I ≤ 2µA,
t = 1 min.
2500
V
RMS
ISO
A
I-O
(4)
(4)
12
R
C
I
Resistance (Input to Output)
V
= 500VDC
10
Ω
I-O
I-O
I-I
I-O
(4)(5)
Capacitance (Input to Output)
f = 1MHz
0.6
pF
Input-Input Insulation Leakage
RH ≤ 45%, V = 500VDC, t = 5s,
HCPL2730/2731 only
0.005
µA
I-I
(6)
Current
(6)
11
R
Input-Input Resistance
V
= 500VDC, HCPL2730/2731 only
I-I
10
Ω
I-I
I-I
(6)
C
Input-Input Capacitance
f = 1MHz, HCPL2730/2731 only
0.03
pF
*All Typicals at T = 25°C
A
Notes:
1. Current Transfer Ratio is defined as a ratio of output collector current, I , to the foward LED input current,
O
I , times 100%.
F
2. Pin 7 open. (6N138 and 6N139 only)
3. Common mode transient immunity in logic HIGH level is the maximolerable (positive) dV /dt on the
cm
leading edge of the common mode pulse signal V , to assure thaoutput will remain in a logic HIGH state
CM
(i.e., V > 2.0V). Common mode transient immunity in logic LOW level is the maximum tolerable (negative)
O
dV /dt on the trailing edge of the
cm
common mode pulse signal, V , to assure that the ouill remain in a logic LOW state (i.e., V < 0.8V).
CM
O
4. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are
shorted together.
5. For dual channel devices, C is measured by ing pins 1 and 2 or pins 3 and 4 together and pins 5 through 8
I-O
shorted together.
6. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.
I
©2005 Fairchild Semiconductor Corporation
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5
www.fairchildsemi.com
5
Electrical Characteristics (Continued) T = 25°C unless otherwise specified)
A
Current Limiting Resistor Calculations
R
(Non-Invert) = V
– V – V
1
1
DD1 DF OL1
OUTPUT
I
F
CMOS CMOS
@ 5V @ 10V
INPUT
R1 (V)
74XX 74LXX 74SXX 74LSXX 74HXX
R
(Invert) = V
– V
– V
DD1
OH1 DF
I
F
R2 (V) R2 (V) R2 (V) R2 (V) R2 (V)
R2 (V)
R2 (V)
R = V
= V
(@ I – I )
CMOS NON-INV. 2000 1000 2200
@ 5V
750
1000 1000
1000
560
2
DD2
OLX L 2
INV.
510
I
L
CMOS NON-INV. 5100
@ 10V
INV.
4700
Where:
74XX NON-INV. 2200
INV. 180
74LXX NON-INV. 1800
INV. 100
74SXX NON-INV. 2000
INV. 360
74LSXX NON-INV. 2000
INV. 180
74HXX NON-INV. 2000
V
V
V
V
V
= Input Supply Voltage
= Output Supply Voltage
DD1
DD2
= Diode Forward Voltage
DF
= Logic “0” Voltage of Driver
= Logic “1” Voltage of Driver
OL1
OH1
I
= Diode Forward Current
F
V
=Saturation Voltage of
Output Transistor
OLX
I = Load Current Through
L
Resistor R2
I = Input Current of Output Gate
INV.
180
2
Fig. 1 Resistor Values for Logic Interface
VDD1
VDD2
VDD2
1
2
3
8
7
6
5
1
2
3
4
8
7
6
5
R2
IN
OUT
IN
R1
OUT
R1
4
Fig. 2 Non-Inverting Logic Interface
Fig. 3 Inverting Logic Interface
©2005 Fairchild Semiconductor Corporation
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5
www.fairchildsemi.com
6
Typical Performance Curves
Fig. 4 LED Forward Current vs. Forward Voltage
Fig. 5 LED Forward Voltage vs.Temperature
100
1.5
1.4
1.3
1.2
1.1
I
= 1.6 mA
F
10
T
= 85˚C
A
1
T
= 70˚C
A
0.1
0.01
T
= 25˚C
A
T
= -40˚C
1.4
A
T
A
= 0˚C
1.2
0.001
1.0
1.1
1.3
1.5
1.6
-40
-20
0
2
40
60
80
100
FORWARD VOLTAGE - V (V)
TEMPERATRE - T (˚C)
F
A
Fig. 6 Non-saturated Rise and Fall Times vs.
Load Resistance (6N138 / 6N139 Only)
Fig. 7 Non-turated Rise and Fall Times vs.
Load Resistance (HCPL2730 / HCPL2731 Only)
100
10
1
T
= 25˚C
A
T
= 25˚C
A
t
f
t
f
10
t
r
t
r
1
I
ADJUSTED FOR V = V
OL
F
0.1
1
10
0.1
1
10
R
L
- LOAD RSISACE (kΩ)
R
L
- LOAD RESISTANCE (kΩ)
Fig. 8 PropDelay To Logic Low
vs. Basitter Resistance
Fig. 9 Current Transfer Ratio vs. Forward Current
(6N138 / 6N139 Only)
(CPL2730 / HCPL2731 Only)
6
4
3
2
1
V
V
= 5V
CC
= 0.4V
O
I
R
= 1.6 mA, V
= 5 V
= 2.2 K, T = 25°C
F
CC
1600
1200
800
400
0
L
A
Normalized to R = None
BE
T
= 85˚C
A
T
= 70˚C
A
T
= 25˚C
A
T
= 0˚C
A
T
= -40˚C
A
0
0.01
0.1
1
10
0.01
0.1
1
10
I
- FORWARD CURRENT - mA
RBE - BASE-EMITTER RESISTANCE - M
Ω
F
©2005 Fairchild Semiconductor Corporation
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5
www.fairchildsemi.com
7
Typical Performance Curves (Continued)
Fig. 10 Current Transfer Ratio vs. Base-Emitter Resistance
(6N138 / 6N139 Only)
Fig. 11 Current Transfer Ratio vs. Forward Current
(HCPL2730 / HCPL2731 Only)
1600
1400
1200
1000
800
5000
V
V
= 5 V
CC
= 0.4 V
O
4000
3000
2000
1000
0
T
= 70˚C
= 85˚C
= 25˚C
A
T
A
T
A
T
= 0˚C
A
T
= -40˚C
600
A
400
I
V
V
= 1.6mA
F
200
0
= 5 V
CC
= 0.4 V
O
1
10
100
1000
0.1
1
1
100
R
BE
- BASE RESISTANCE (kΩ)
I - FORARD CURRENT -mA
F
Fig. 12 Output Current vs Output Voltage
(6N138 / 6N139 Only)
Fig. 13 Ouut Crent vs Output Voltage
(HCPL730 / HCPL2731 Only)
120
1
80
60
50
40
30
20
10
0
I
= 5.0mA
F
5mA
V
= 5V
4.5mA
CC
= 25˚C
T
= 2C
A
4mA
3.5mA
T
A
I
= 4.5mA
F
= 5.V
= 4.0mA
= 3.5mA
3mA
I
F
2.5mA
I
I
= 3.0mA
= 2.5mA
F
F
2mA
I
I
I
= 2.0mA
= 1.5mA
= 1.0mA
F
F
F
60
1.5mA
40
1mA
20
I
= 0.5mA
F
0
2
0.0
0.2
0.4
0.6
V - OUTPUT VOLTAGE (V)
O
0.8
1.0
1.2
1.4
1.6
1.8
2.0
V
- OUTPUT VLAGE (V)
O
Fig. 14 Output CurrInput Diode Forward Current
(6N138 / 6N139 Only)
Fig. 15 Output Current vs
Input Diode Forward Current
(HCPL2730 / HCPL2731 Only)
100
100
10
1
V
V
= 5.0V
CC
= 0.4V
O
T
= 85˚C
A
V
= 5V
C
= 0.4V
O
10
T
= 25˚C
A
1
T
= 85˚C
A
T
= -40˚C
A
T
= 70˚C
A
0
T
= 25˚C
A
T
= 0˚C
A
T
= -40˚C
A
0.1
0
0.01
0.1
1
10
0.1
1
10
I - INPUT DIODE FORWARD CURRENT -mA
F
100
I
- INPUT DIODE FORWARD CURRENT -mA
F
©2005 Fairchild Semiconductor Corporation
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5
www.fairchildsemi.com
8
Typical Performance Curves (Continued)
Fig. 16 Logic Low Supply Current vs.
Fig. 17 Logic Low Supply Current vs.
Input Diode Forward Current
(HCPL2730 / HCPL2731 Only)
Input Diode Forward Current
(6N138 / 6N139 Only)
100
10
1
4.0
T
A
= 25˚C
3.5
3.0
2.5
HCPL2731
= 18V
V
CC
HCPL2730
HCPL2731
V
CC
= 5V
V
CC
= 7V
2.0
1.5
1.0
0.5
0.0
V
= 18V
CC
0.1
0
2
4
6
8
10
12
14
16
0.1
1
10
100
I
- FORWARD CURRENT (mA)
I
- IUT ODE FORWARD CURRENT (mA)
F
F
Fig. 18 Propagation Delay vs. Input Diode Forward Current
(6N138 / 6N139 Only)
Fig. 19 Propgation Delay vs. Input Diode Forward Current
(HCPL2730 / HCPL2731 Only)
70
V
= 5 V
CC
= 25˚C
V
= 5 V
CC
= 25˚C
T
A
T
A
60
50
40
30
20
10
0
60
50
40
30
20
10
0
(t
) R = 2.2 kΩ or 4.7 kΩ
(t
) R = 2.2 kΩ or 4.7 kΩ
PHL
PHL
L
L
(t
(t
) R = 4.7 kΩ
PLH
L
) R = 2.2 kΩ
(t
) R = 4.7 kΩ
L
PLH
L
PLH
(t
) R = 2.kΩ
PLH
0
2
4
6
8
10
0
1
2
3
5
6
7
8
9
10
I
- INPUT DIOE FRWARD CURRENT (mA)
I - INPUT DIODE FORWARD CURRENT (mA)
F
F
Fig. 21 Propagation Delay to Logic Low vs. Pulse Period
(HCPL2730 / HCPL2731 Only)
Fig. 20 Popagation Delay to Logic Low vs. Pulse Period
(6N138 / 6N139 Only)
100
10
1
100
6N139
HCPL2731
= 0.5mA
I
= 0.5mA
I
F
F
R
= 4.7kΩ
10
L
R
L
= 4.7kΩ
6N138
= 1.6mA
I
F
1
HCPL2730
HCPL2731
R
= 2.2kΩ
L
I
R
=1.6mA
F
T = 25˚C
A
= 2.2kΩ
L
T
= 25˚C
A
0.1
0.01
0.1
0.1
1
10
0.01
0.1
1
10
T - INPUT PULSE PERIOD - ms
T - INPUT PULSE PERIOD - ms
©2005 Fairchild Semiconductor Corporation
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5
www.fairchildsemi.com
9
Typical Performance Curves (Continued)
Fig. 22 Propagation Delay vs.Temperature
(6N138 / 6N139 Only)
Fig. 23 Propagation Delay vs.Temperature
(HCPL2730 / HCPL2731 Only)
50
50
40
30
20
10
0
HCPL2730 : I = 1.6 mA, R = 2.2kΩ
HCPL2730 : I = 1.6mA, R = 2.2kΩ
F
L
F
L
HCPL2731 : I = 0.5 mA, R = 4.7kΩ
F
L
HCPL2731 : I = 0.5mA, R = 4.7kΩ
F
L
40
30
20
10
0
t
(HCPL2731)
t
(HCPL2731)
PLH
PLH
t
(HCPL2730)
t
(CPL2730
PLH
PLH
t
(HCPL2731)
t
(HCPL2731)
PHL
PHL
t
(HCPL2730)
t
(HCPL27
PHL
PHL
0
10
20
30
40
50
60
70
80
0
10
20
30
50
60
70
80
T
- TEMPERATURE (˚C)
T
TEMPERATURE (˚C)
A
A
©2005 Fairchild Semiconductor Corporation
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5
www.fairchildsemi.com
10
Test Circuits
Noise
Shield
Noise
Shield
Pulse
+
IF
VCC
VCC
Generator
tr = 5ns
ZO = 50V
+5 V
VO
+5 V
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
Pulse
RL
V01
VF1
-
0.1 µF
Generator
IF
VB
tr = 5ns
10% DUTY CYCLE
I/f < 100 µS
RL
ZO = 50 V
10% D.C.
VF
f
I/ < 100ns
CL = 15 pF*
VO
V02
VO
-
IF
VF2
0.1 µF
MONITOR
IF Monitor
GND
Rm
+
Rm
CL = 15 pF*
GND
Test Circuit for 6N138, 6N139
Test Circuit for HCPL2730 and HCPL2731
IF
5 V
VO
1.5 V
1.5 V
VOL
TPHL
TPL
Fig. 24 Switching Time Test Circuit
IF
Noise
Shield
Noise
Shield
VCC
VCC
V01
V02
+
+5 V
+5 V
1
2
3
4
8
7
6
5
1
8
7
6
5
IF
VF1
RL
VB
-
RL
VO
2
3
4
A
VF
0.1 µF
A
B
VO
-
VO
B
VFF
VF2
+
0.1 µ
VFF
GND
GND
-
VCM
+
-
VCM
-
+
Pulse en
Pulse Gen
Test Circuit for HCPL2730 and HCPL2731
Test Circuit fond 6N139
V
CM
10 V
90% 90%
10%
10%
tf
0 V
tr
VO
5 V
Switch at A : IF = 0 mA
VO
VOL
Switch at B : IF = 1.6 mA
Fig. 25 Common Mode Immunity Test Circuit
©2005 Fairchild Semiconductor Corporation
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5
www.fairchildsemi.com
11
Ordering Information
Option
Example Part Number
6N138
Description
Standard Through Hole Device, 50 pcs per tube
Surface Mount Lead Bend
Surface Mount; Tape and reel
0.4" Lead Spacing
No Suffix
S
SD
W
6N138S
6N138SD
6N138W
V
6N138V
VDE0884
WV
SV
SDV
6N138WV
6N138SV
VDE0884; 0.4” lead spacing
VDE0884; surface mount
6N138SDV
VDE0884; surface mount; tape and eel
Marking Information
1
2
2730
6
V XX YY T1
5
3
4
Definitions
1
2
Fairchillogo
Device number
VDE mark (Note: Only appears on parts ordered with VDE
ption – See order entry table)
3
5
6
Two digit year code, e.g., ‘07’
Two digit work week ranging from ‘01’ to ‘53’
Assembly package code
©2005 Fairchild Semiconductor Corporation
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5
www.fairchildsemi.com
12
Tape Specifications
12.0 ± 0.1
4.0 ± 0.1
4.90 ± 0.20
Ø1.55 ± 0.05
1.75 ± 0.10
4.0 ± 0.1
0.30 ± 0.05
7.5 ± 0.1
16.0 ± 03
10.30± 0.20
13.2 ± 0.2
Ø1.6 ± 0.1
10.30 ± 0.20
User Direction of Feed
0.1 MAX
Reflow Profile
300
250
200
150
100
50
215C, 10–30 s
225C pe
Time above 183C, 60–150 sec
Ramp up = 3C/sec
0
0
.5
1
1.5
2
2.5
3
3.5
4
4.5
Time (Minute)
Pak reflow temperature: 225C (package surface temperature)
• Time of temperature higher than 183C for 60–150 seconds
• One time soldering reflow is recommended
©2005 Fairchild Semiconductor Corporation
6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.5
www.fairchildsemi.com
13
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