HGTG40N60B3 [ONSEMI]
600V，PT IGBT;
| 型号： | HGTG40N60B3 |
| 厂家： | 
ONSEMI |
| 描述： | 600V，PT IGBT 局域网 栅 瞄准线 双极性晶体管 功率控制 |
| 文件： | 总10页 (文件大小：400K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UFS Series N-Channel IGBT
70 A, 600 V
HGTG40N60B3
The HGTG40N60B3 is a MOS gated high voltage switching device
combining the best features of MOSFETs and bipolar transistors. The
device has the high input impedance of a MOSFET and the low
on−state conduction loss of a bipolar transistor. The much lower
on−state voltage drop varies only moderately between 25°C and
150°C.
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C
The IGBT is ideal for many high voltage switching applications
operating at moderate frequencies where low conduction losses are
essential, such as: AC and DC motor controls, power supplies and
drivers for solenoids, relays and contactors.
G
Formerly Developmental Type TA49052.
E
Features
• 70 A, 600 V, TC = 25°C
• 600 V Switching SOA Capability
• Typical Fall Time: 100 ns at T = 150°C
J
• Short Circuit Rating
• Low Conduction Loss
• This Device is Pb−Free, Halogen Free/BFR Free and is RoHS
TO−247−3LD
CASE 340CK
Compliant
Packing
MARKING DIAGRAMS
$Y&Z&3&K
G40N60B3
$Y
&Z
&3
&K
= ON Semiconductor Logo
= Assembly Plant Code
= Data Code (Year & Week)
= Lot
Figure 1.
G40N60B3 = Specific Device Code
ORDERING INFORMATION
Part Number
HGTG40N60B3
Package
Brand
G40N60B3
TO−24
© Semiconductor Components Industries, LLC, 2004
1
Publication Order Number:
April, 2020 − Rev. 4
HGTG40N60B3/D
HGTG40N60B3
ABSOLUTE MAXIMUM RATINGS T = 25°C Unless Otherwise Specified
C
Description
Collector to Emitter Voltage
Symbol
Ratings
Units
BV
600
V
CES
Collector Current Continuous
I
At T = 25°C
C25
C
70
40
A
I
At T = 110°C
C110
C
Collector Current Pulsed (Note 1)
Gate to Emitter Voltage Continuous
Gate to Emitter Voltage Pulsed
I
330
20
A
V
V
CM
V
GES
V
GEM
30
SSOA
Switching Safe Operating Area at T = 150°C, Figure 3
J
100 A at 600 V
Power Dissipation Total at T = 25°C
P
D
290
W
C
Power Dissipation Derating T > 25°C
2.33
W/°C
C
Reverse Voltage Avalanche Energy
E
100
−55 to 150
260
mJ
°C
°C
ARV
Operating and Storage Junction Temperature Range
Maximum Lead Temperature for Soldering
T , T
J STG
T
L
t
ms
ms
Short Circuit Withstand Time (Note 2) at V = 15 V
2
SC
SC
GE
t
Short Circuit Withstand Time (Note 2) at V = 10 V
10
GE
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Pulse width limited by maximum junction temperature.
2. VCE(PK) = 360 V, TJ = 125°C, RG = 3 W.
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2
HGTG40N60B3
ELECTRICAL SPECIFICATIONS T = 25°C Unless Otherwise Specified
C
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
600
20
−
TYP
−
MAX UNITS
BV
BV
Collector to Emitter Breakdown Voltage
Emitter to Collector Breakdown Voltage
Collector to Emitter Leakage Current
I
I
= 250 mA, V = 0 V
−
−
V
V
CES
ECS
C
GE
= −10 mA, V = 0 V
−
C
GE
I
V
V
I
= BV
T
C
T
C
T
C
T
C
= 25°C
= 150°C
= 25°C
= 150°C
−
100
6.0
2.0
2.3
6.0
100
−
μA
mA
V
CES
CE
CE
CES
CES
= BV
−
−
V
Collector to Emitter Saturation Voltage
= I
C110
, V = 15 V
GE
−
1.4
1.5
4.8
−
CE(SAT)
C
−
V
V
Gate to Emitter Threshold Voltage
Gate to Emitter Leakage Current
Switching SOA
I
= 250 mA, V = V
GE
3.0
−
V
GE(TH)
C
CE
I
V
=
20 V
nA
A
GES
GE
SSOA
T = 150°C
V
V
= 480 V
= 600 V
200
−
J
CE
R
V
= 3 Ω
GE
G
= 15 V
100
−
−
A
CE
L = 100 mH
V
Gate to Emitter Plateau Voltage
I
I
= I
, V = 0.5 BV
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
7.5
250
335
47
−
330
435
−
V
nC
nC
ns
GEP
C
C110
CE
CES
Q
On−State Gate Charge
= IC110,
= 0.5 BV
V
= 15 V
= 20 V
G(ON)
C
GE
GE
V
CE
CES
V
t
Current Turn−On Delay Time
Current Rise Time
IGBT and Diode Both at T = 25°C
J
d(ON)I
I
= I
CE
C110
t
rI
35
−
ns
V
V
R
= 0.8 BV
= 15 V
CE
CES
t
Current Turn−Off Delay Time
Current Fall Time
170
50
200
100
1200
1400
−
ns
d(OFF)I
GE
= 3 W
t
fI
ns
G
L = 100 mH
Test Circuit (Figure 18)
E
Turn−On Energy
1050
800
47
mJ
ON
E
Turn−Off Energy (Note 3)
Current Turn−On Delay Time
Current Rise Time
mJ
OFF
t
IGBT and Diode Both at T = 150°C
ns
d(ON)I
J
I
= I
CE
C110
t
35
−
ns
rI
d(OFF)I
V
V
R
= 0.8 BV
= 15 V
= 3 W
CE
GE
G
CES
t
Current Turn−Off Delay Time
Current Fall Time
285
100
1850
2000
−
375
175
−
ns
t
fI
ns
L = 100 mH
Test Circuit (Figure 17)
E
Turn−On Energy
mJ
ON
E
Turn−Off Energy (Note 3)
Thermal Resistance Junction To Case
−
mJ
OFF
R
0.43
°C/W
θ
JC
3. Turn−Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and
ending at the point where the collector current equals zero (ICE = 0 A). All devices were tested per JEDEC Standard No. 24−1 Method for
Measurement of Power Device Turn−Off Switching Loss. This test method produces the true total Turn−Off Energy Loss. Turn−On losses
include losses due to diode recovery.
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3
HGTG40N60B3
TYPICAL PERFORMANCE CURVES (continued)
100
80
60
40
20
0
250
V
= 15 V
GE
TJ = 1505C, RG = 3 Ω, VGE = 15 V
200
150
100
50
PACKAGE LIMITED
0
0
200
700
25
50
75
100
125
150
100
V
300
400
500
600
o
T
, CASE TEMPERATURE ( C)
, COLLECTOR TO EMITTER VOLTAGE (V)
C
CE
Figure 2. DC COLLECTOR CURRENT vs CASE
TEMPERATURE
Figure 3. MINIMUM SWITCHING SAFE
OPERATING AREA
18
16
14
12
10
8
900
TJ = 1505C, RG = 3 Ω, L = 100 μH, VCE = 480 V
V
CE = 360 V, RG = 3 Ω, TJ = 1255C
V
T
C
GE
800
700
600
500
400
300
200
100
75oC
15 V
10 V
I
75oC
SC
110oC 15 V
110oC
10 V
10
f
f
= 0.05 / (t
+ t
)
MAX1
MAX2
d(OFF)I
= (P − P ) / (E
d(ON)I
+ E )
OFF
t
SC
D
C
ON
PC = CONDUCTION DISSIPATION
(DUTY FACTOR = 50%)
6
R
= 0.435C/W, SEE NOTES
q
JC
1
4
10
10
20
40
60
80 100
11
12
13
14
15
I
, COLLECTOR TO EMITTER CURRENT (A)
V
, GATE TO EMITTER VOLTAGE (V)
CE
GE
Figure 4. OPERATING FREQUENCY vs
COLLECTOR TO EMITTER CURRENT
Figure 5. SHORT CIRCUIT WITHSTAND TIME
200
150
100
50
200
DUTY CYCLE <0.5%, V = 10 V
GE
PULSE DURATION = 250 ms
DUTY CYCLE <0.5%, V
GE
PULSE DURATION = 250 ms
150
100
50
TC = −555C
TC = −555C
TC = 1505C
TC = 1505C
C = 255C
T
T
C = 255C
0
0
0
1
2
3
4
5
0
1
2
3
4
V
, COLLECTOR TO EMITTER VOLTAGE (V)
V
, COLLECTOR TO EMITTER VOLTAGE (V)
CE
CE
Figure 6. COLLECTOR TO EMITTER ON STATE
VOLTAGE
Figure 7. COLLECTOR TO EMITTER ON STATE
VOLTAGE
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4
HGTG40N60B3
TYPICAL PERFORMANCE CURVES (continued)
20
16
12
8
8
RG = 3 Ω, L = 100 mH, VCE = 480 V
R
G = 3 W, L = 100 mH, VCE = 480 V
TJ = 255C, VGE = 10 V
TJ = 1505C, VGE = 10 V
6
4
2
0
TJ = 1505C; VGE = 10 V AND 15 V
TJ = 1505C, VGE = 15 V
4
TJ = 255C; VGE = 10 V AND 15 V
TJ = 255C, VGE = 15 V
0
20
I
40
60
80
100
20
40
60
80
100
, COLLECTOR TO EMITTER CURRENT (A)
I
CE
, COLLECTOR TO EMITTER CURRENT (A)
CE
Figure 8. TURN−ON ENERGY LOSS vs COLLECTOR
Figure 9. TURN−OFF ENERGY LOSS vs
TO EMITTER CURRENT
COLLECTOR TO EMITTER CURRENT
90
600
500
400
300
200
100
0
R
G = 3 Ω, L = 100 mH, VCE = 480 V
RG = 3 Ω, L = 100 mH, VCE = 480 V
TJ = 255C, VGE = 10 V
80
70
60
50
40
30
TJ = 255C, VGE = 10 V
TJ = 1505C, VGE = 10 V
TJ = 1505C, VGE = 10 V
TJ = 255C, VGE = 15 V
TJ = 255C AND 1505C,
GE = 10V AND 15V
V
TJ = 1505C, VGE = 15 V
20
40
60
80
100
20
40
60
80
100
I
, COLLECTOR TO EMITTER CURRENT (A)
I
CE
, COLLECTOR TO EMITTER CURRENT (A)
CE
Figure 10. TURN−ON DELAY TIME vs COLLECTOR
Figure 11. TURN−ON RISE TIME vs COLLECTOR
TO EMITTER CURRENT
TO EMITTER CURRENT
300
180
140
100
60
RG = 3 Ω, L = 100 mH, VCE = 480 V
RG = 3 Ω, L = 100 mH, VCE = 480 V
TJ = 1505C, VGE = 10 V AND 15 V
TJ = 1505C, VGE = 15 V
250
200
150
100
TJ = 1505C, VGE = 10 V
TJ = 255C, VGE = 15 V
TJ = 255C, VGE = 10 V AND 15 V
TJ = 255C, VGE = 10 V
20
20
40
, COLLECTOR TO EMITTER CURRENT (A)
CE
60
80
100
20
40
60
80
100
I
I
, COLLECTOR TO EMITTER CURRENT (A)
CE
Figure 12. TURN−OFF DELAY TIME vs
COLLECTOR TO EMITTER CURRENT
Figure 13. FALL TIME vs COLLECTOR TO EMITTER
CURRENT
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5
HGTG40N60B3
TYPICAL PERFORMANCE CURVES (continued)
15
200
160
120
80
I
= 3.255 mA, R = 7.5 W, T = 255C
g(REF)
L
C
DUTY CYCLE = <0.5%, VCE = 10 V
PULSE DURATION = 25 ms
12
9
V
= 400V
CE
V
= 600V
CE
6
TC = 255C
V
= 200V
100
CE
3
40
TC = 1505C
TC = −555C
0
0
0
50
150
200
250
300
46
5
7
8
9
10
V
, GATE TO EMITTER VOLTAGE (V)
Q , GATE CHARGE (nC)
G
GE
Figure 14. TRANSFER CHARACTERISTIC
Figure 15. GATE CHARGE WAVEFORM
14
12
FREQUENCY = 400kHz
C
IES
10
8
6
4
C
OES
2
C
RES
0
0
5
10
15
20
25
V
, COLLECTOR TO EMITTER VOLTAGE (V)
CE
Figure 16. CAPACITANCE vs COLLECTOR TO
EMITTER VOLTAGE
0
10
0.5
0.2
0.1
−1
10
0.05
t
1
0.02
0.01
P
0
D
DUTY FACTOR, D = t / t
1
2
t
2
PEAK T = (P y Z
y R ) + T
q
JC
q
J
D
JC
C
SINGLE PULSE
−2
10
−5
10
−4
10
−3
−2
10
−1
1
10
10
t , RECTANGULAR PULSE DURATION (s)
10
10
1
Figure 17. NORMALIZED TRANSIENT THERMAL RESPONSE, JUNCTION TO CASE
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6
HGTG40N60B3
Test Circuit and Waveform
L = 100 mH
90%
OFF
RHRP3060
10%
ON
V
GE
E
E
R
= 3 W
G
V
CE
+
90%
V
= 480V
DD
10%
d(OFF)I
−
I
CE
t
t
rI
t
fI
t
d(ON)I
Figure 18. INDUCTIVE SWITCHING TEST CIRCUIT
Figure 19. SWITCHING TEST WAVEFORM
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7
HGTG40N60B3
Handling Precautions for IGBTs
Operating Frequency Information
Insulated Gate Bipolar Transistors are susceptible to
gate−insulation damage by the electrostatic discharge of
energy through the devices. When handling these devices,
care should be exercised to assure that the static charge built
in the handler’s body capacitance is not discharged through
the device. With proper handling and application
procedures, however, IGBTs are currently being extensively
used in production by numerous equipment manufacturers
in military, industrial and consumer applications, with
virtually no damage problems due to electrostatic discharge.
IGBTs can be handled safely if the following basic
precautions are taken:
Operating frequency information for a typical device
(Figure 4) is presented as a guide for estimating device
performance for a specific application. Other typical
frequency vs collector current (I ) plots are possible using
CE
the information shown for a typical unit in Figures 6 to 11.
The operating frequency plot (Figure 4) of a typical device
shows f
or f
; whichever is smaller at each point.
MAX1
MAX2
The information is based on measurements of a typical
device and is bounded by the maximum rated junction
temperature.
f
is defined by f
= 0.05/(t
+ t
).
d(ON)I
MAX1
MAX1
d(OFF)I
Deadtime (the denominator) has been arbitrarily held to
10% of the on−state time for a 50% duty factor. Other
1. Prior to assembly into a circuit, all leads should be
kept shorted together either by the use of metal
shorting springs or by the insertion into conductive
material such as “ECCOSORBD LD26” or
definitions are possible. t
and t
are defined in
d(OFF)I
d(ON)I
Figure 19. Device turn−off delay can establish an additional
frequency limiting condition for an application other than
equivalent
T
. t
is important when controlling output ripple
JM d(OFF)I
2. When devices are removed by hand from their
carriers, the hand being used should be grounded
by any suitable means − for example, with a
metallic wristband
3. Tips of soldering irons should be grounded
4. Devices should never be inserted into or removed
from circuits with power on
under a lightly loaded condition.
f
is defined by f = (P − P )/(E
+ E ). The
ON
MAX2
MAX2
D
C
OFF
allowable dissipation (P ) is defined by P = (T −
D
D
JM
T )/R . The sum of device switching and conduction
C
θJC
losses must not exceed P . A 50% duty factor was used
D
(Figure 4) and the conduction losses (PC) are approximated
by P = (V × I )/2.
C
CE
CE
5. Gate Voltage Rating − Never exceed the
E
and E
are defined in the switching waveforms
ON
OFF
gate−voltage rating of V . Exceeding the rated
GEM
shown in Figure 19. E is the integral of the instantaneous
ON
V
GE
can result in permanent damage to the oxide
power loss (I × V ) during turn−on and E is the
CE
CE
OFF
layer in the gate region
integral of the instantaneous power loss (I × V ) during
CE
CE
6. Gate Termination − The gates of these devices are
essentially capacitors. Circuits that leave the gate
open−circuited or floating should be avoided.
These conditions can result in turn−on of the
device due to voltage buildup on the input
capacitor due to leakage currents or pickup
7. Gate Protection − These devices do not have an
internal monolithic Zener diode from gate to
emitter. If gate protection is required an external
Zener is recommended
turn−off. All tail losses are included in the calculation for
; i.e., the collector current equals zero (I = 0).
E
OFF
CE
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8
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−247−3LD SHORT LEAD
CASE 340CK
ISSUE A
DATE 31 JAN 2019
P1
D2
A
E
P
A
A2
Q
E2
S
D1
D
E1
B
2
2
1
3
L1
A1
b4
L
c
(3X) b
(2X) b2
M
M
B A
0.25
MILLIMETERS
MIN NOM MAX
4.58 4.70 4.82
2.20 2.40 2.60
1.40 1.50 1.60
1.17 1.26 1.35
1.53 1.65 1.77
2.42 2.54 2.66
0.51 0.61 0.71
20.32 20.57 20.82
(2X) e
DIM
A
A1
A2
b
b2
b4
c
GENERIC
D
MARKING DIAGRAM*
D1 13.08
~
~
D2
E
0.51 0.93 1.35
15.37 15.62 15.87
AYWWZZ
XXXXXXX
XXXXXXX
E1 12.81
~
~
E2
e
L
4.96 5.08 5.20
5.56
15.75 16.00 16.25
3.69 3.81 3.93
3.51 3.58 3.65
XXXX = Specific Device Code
~
~
A
Y
= Assembly Location
= Year
WW = Work Week
ZZ = Assembly Lot Code
L1
P
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
P1 6.60 6.80 7.00
Q
S
5.34 5.46 5.58
5.34 5.46 5.58
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13851G
TO−247−3LD SHORT LEAD
PAGE 1 OF 1
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Insulated Gate Bipolar Transistor, 70A I(C), 600V V(BR)CES, N-Channel, TO-247, TO-247, 3 PIN
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