HUFA75639S3ST-F085A [ONSEMI]
100 V、56 A、21 mΩ、D2PAKN 沟道 UltraFET® Trench;
| 型号： | HUFA75639S3ST-F085A |
| 厂家： | 
ONSEMI |
| 描述： | 100 V、56 A、21 mΩ、D2PAKN 沟道 UltraFET® Trench |
| 文件： | 总9页 (文件大小：314K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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HUFA75639S3ST_F085A
Data Sheet
March 2012
56A, 100V, 0.025 Ohm, N-Channel
UltraFET Power MOSFETs
Features
• 56A, 100V
These N-Channel power MOSFETs
are manufactured using the
innovative UltraFET® process. This
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
advanced process technology
• Related Literature
achieves the lowest possible on-resistance per silicon area,
resulting in outstanding performance. This device is capable
of withstanding high energy in the avalanche mode and the
diode exhibits very low reverse recovery time and stored
charge. It was designed for use in applications where power
efficiency is important, such as switching regulators,
switching converters, motor drivers, relay drivers, low-
voltage bus switches, and power management in portable
and battery-operated products.
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
Ordering Information
PART NUMBER
PACKAGE
BRAND
G
TO263AB
HUFA75639S3ST_F085A
75639S
NOTE: When ordering, use the entire part number. Add the suffix T to
obtain the TO-263AB variant in tape and reel, e.g., HUFA75639S3ST.
S
Packaging
DRAIN
(FLANGE)
GATE
SOURCE
JEDEC TO-263AB
This product has been designed to meet the extreme test conditions and environment demanded by the automotive industry. For a copy
of the requirements, see AEC Q101 at: http://www.aecouncil.com/
Reliability data can be found at: http://www.fairchildsemi.com/products/discrete/reliability/index.html.
All Fairchild semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems certification.
©2012 Fairchild Semiconductor Corporation
HUFA75639S3ST_F085A Rev. C1
HUFA75639S3ST_F085A
o
Absolute Maximum Ratings
T = 25 C, Unless Otherwise Specified
C
UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
100
100
±20
V
V
V
DSS
DGR
Drain to Gate Voltage (R
= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
Drain Current
Continuous (Figure 2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
56
Figure 4
Figures 6, 14, 15
200
A
D
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
AS
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
W
D
o
o
Derate Above 25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.35
W/ C
o
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T , T
-55 to 175
C
J
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
o
300
260
C
C
L
o
pkg
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
o
o
1. T = 25 C to 150 C.
J
o
Electrical Specifications
T = 25 C, Unless Otherwise Specified
C
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
OFF STATE SPECIFICATIONS
Drain to Source Breakdown Voltage
Zero Gate Voltage Drain Current
BV
I
= 250µA, V
= 0V (Figure 11)
100
-
-
-
-
-
V
DSS
D
GS
GS
GS
I
V
V
V
= 95V, V
= 90V, V
= ±20V
= 0V
= 0V, T = 150 C
-
-
-
1
µA
µA
nA
DSS
DS
DS
GS
o
250
±100
C
Gate to Source Leakage Current
ON STATE SPECIFICATIONS
Gate to Source Threshold Voltage
Drain to Source On Resistance
THERMAL SPECIFICATIONS
I
GSS
V
V
= V , I = 250µA (Figure 10)
2
-
-
4
V
GS(TH)
GS
DS
D
r
I
= 56A, V
= 10V (Figure 9)
0.021
0.025
Ω
DS(ON)
D
GS
o
Thermal Resistance Junction to Case
Thermal Resistance Junction to Ambient
R
R
(Figure 3)
TO-247
-
-
-
-
-
-
0.74
30
C/W
θJC
o
C/W
θJA
o
TO-220, TO-263
62
C/W
SWITCHING SPECIFICATIONS (V
Turn-On Time
= 10V)
GS
t
V
R
R
= 50V, I
D
56A,
= 10V,
-
-
-
-
-
-
-
110
ns
ns
ns
ns
ns
ns
ON
DD
= 0.89Ω, V
L
GS
Turn-On Delay Time
Rise Time
t
15
60
20
25
-
-
-
d(ON)
= 5.1Ω
GS
t
r
Turn-Off Delay Time
Fall Time
t
-
d(OFF)
t
-
f
Turn-Off Time
t
70
OFF
GATE CHARGE SPECIFICATIONS
Total Gate Charge
Q
V
V
V
= 0V to 20V
= 0V to 10V
= 0V to 2V
V
DD
= 50V,
56A,
-
-
-
-
-
110
57
130
75
4.5
-
nC
nC
nC
nC
nC
g(TOT)
GS
GS
GS
I
D
Gate Charge at 10V
Q
g(10)
R
= 0.89Ω
L
I
= 1.0mA
g(REF)
(Figure 13)
Threshold Gate Charge
Q
3.7
9.8
24
g(TH)
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
Q
gs
gd
Q
-
©2012 Fairchild Semiconductor Corporation
HUFA75639S3ST_F085A Rev. C1
HUFA75639S3ST_F085A
o
Electrical Specifications
T = 25 C, Unless Otherwise Specified
C
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
CAPACITANCE SPECIFICATIONS
Input Capacitance
C
V
= 25V, V = 0V,
GS
-
-
-
2000
500
65
-
-
-
pF
pF
pF
ISS
DS
f = 1MHz
(Figure 12)
Output Capacitance
C
C
OSS
Reverse Transfer Capacitance
RSS
Source to Drain Diode Specifications
PARAMETER
Source to Drain Diode Voltage
Reverse Recovery Time
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
1.25
110
UNITS
V
V
I
I
I
= 56A
-
-
-
-
-
-
SD
SD
SD
SD
t
= 56A, dI /dt = 100A/µs
SD
ns
rr
Reverse Recovered Charge
Q
= 56A, dI /dt = 100A/µs
320
nC
RR
SD
Typical Performance Curves
1.2
1.0
0.8
0.6
0.4
0.2
60
50
40
30
20
10
0
0
25
50
75
100
125
150
175
0
25
50
75
100
125
o
150
175
o
T
, CASE TEMPERATURE ( C)
T , CASE TEMPERATURE ( C)
C
C
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
2
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
1
0.1
0.05
0.02
0.01
P
DM
0.1
t
1
t
2
NOTES:
DUTY FACTOR: D = t /t
SINGLE PULSE
10
1
2
PEAK T = P
x Z
x R + T
θJC C
J
DM
θJC
0.01
-4
10
-3
-2
-1
0
1
-5
10
t, RECTANGULAR PULSE DURATION (s)
10
10
10
10
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
©2012 Fairchild Semiconductor Corporation
HUFA75639S3ST_F085A Rev. C1
HUFA75639S3ST_F085A
Typical Performance Curves (Continued)
1000
100
10
o
T
= 25 C
FOR TEMPERATURES
ABOVE 25 C DERATE PEAK
C
o
CURRENT AS FOLLOWS:
175 - T
150
C
I = I
25
V
= 10V
GS
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
-5
10
-4
-3
-2
10
-1
0
1
10
10
10
10
10
t, PULSE WIDTH (s)
FIGURE 4. PEAK CURRENT CAPABILITY
300
If R = 0
1000
100
t
= (L)(I )/(1.3*RATED BV
- V
)
AV
AS
DSS
DD
T
T
= MAX RATED
= 25 C
J
C
If R ≠ 0
o
t
AV
= (L/R)ln[(I *R)/(1.3*RATED BV
AS
- V ) +1]
DD
DSS
100
o
STARTING T = 25 C
J
100µs
o
STARTING T = 150 C
J
10
1
1ms
OPERATION IN THIS
AREA MAY BE
10ms
V
= 100V
LIMITED BY r
DS(ON)
DSS(MAX)
10
0.001
0.01
0.1
1
1
10
, DRAIN TO SOURCE VOLTAGE (V)
100
200
t
, TIME IN AVALANCHE (ms)
AV
V
DS
NOTE: Refer to Fairchild Application Notes AN9321 and AN9322.
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
100
100
V
= 6V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
o
GS
175 C
V
= 15V
80
60
40
20
0
80
60
40
20
0
DD
V
= 20V
= 10V
= 7V
GS
V
GS
V
GS
V
= 5V
GS
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
o
o
25 C
-55 C
o
T
= 25 C
C
0
1.5
3.0
4.5
6.0
7.5
0
1
2
3
4
5
6
7
V
, DRAIN TO SOURCE VOLTAGE (V)
V
GS
, GATE TO SOURCE VOLTAGE (V)
DS
FIGURE 7. SATURATION CHARACTERISTICS
FIGURE 8. TRANSFER CHARACTERISTICS
©2012 Fairchild Semiconductor Corporation
HUFA75639S3ST_F085A Rev. C1
HUFA75639S3ST_F085A
Typical Performance Curves (Continued)
3.0
2.5
2.0
1.5
1.0
0.5
0
1.2
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
= V , I = 250µA
DS
GS
D
V
= 10V, I = 56A
D
GS
1.0
0.8
0.6
-80
-40
0
40
80
120
160
200
-80
-40
0
40
80
120
160
200
o
o
T , JUNCTION TEMPERATURE ( C)
T , JUNCTION TEMPERATURE ( C)
J
J
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
RESISTANCE vs JUNCTION TEMPERATURE
1.2
3000
V
= 0V, f = 1MHz
GS
ISS
I
= 250µA
D
C
C
C
= C
+ C
GS
GD
2500
2000
1500
1000
500
= C
≈ C + C
RSS
OSS
GD
DS
GD
1.1
1.0
0.9
C
ISS
C
C
OSS
RSS
0
-80
-40
0
40
80
120
160
200
0
10
20
30
40
50
60
o
V
, DRAIN TO SOURCE VOLTAGE (V)
T , JUNCTION TEMPERATURE ( C)
DS
J
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
10
8
6
4
WAVEFORMS IN
DESCENDING ORDER:
I
I
I
= 56A
= 37A
= 18A
D
D
D
2
V
= 50V
DD
0
0
10
20
30
40
50
60
Qg, GATE CHARGE (nC)
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260.
FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT
©2012 Fairchild Semiconductor Corporation
HUFA75639S3ST_F085A Rev. C1
HUFA75639S3ST_F085A
Test Circuits and Waveforms
V
DS
BV
DSS
L
t
P
V
DS
I
VARY t TO OBTAIN
P
AS
+
V
DD
R
REQUIRED PEAK I
G
AS
V
DD
-
V
GS
DUT
t
P
I
AS
0V
0
0.01Ω
t
AV
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
V
DS
V
Q
g(TOT)
R
DD
L
V
DS
V
= 20V
GS
V
Q
GS
g(10)
+
-
V
DD
V
= 10V
V
GS
GS
DUT
V
= 2V
GS
I
0
G(REF)
Q
g(TH)
Q
Q
gd
gs
I
g(REF)
0
FIGURE 16. GATE CHARGE TEST CIRCUIT
FIGURE 17. GATE CHARGE WAVEFORM
V
t
t
DS
ON
OFF
t
d(OFF)
t
d(ON)
t
t
f
R
L
r
V
DS
90%
90%
+
V
GS
V
DD
10%
10%
0
-
DUT
90%
50%
R
GS
V
GS
50%
PULSE WIDTH
10%
V
GS
0
FIGURE 18. SWITCHING TIME TEST CIRCUIT
FIGURE 19. RESISTIVE SWITCHING WAVEFORMS
©2012 Fairchild Semiconductor Corporation
HUFA75639S3ST_F085A Rev. C1
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®
®
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PowerTrench
PowerXS™
The Power Franchise
®
®
AccuPower™
AX-CAP™*
SM
Programmable Active Droop™
®
®
BitSiC
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TinyBoost™
TinyBuck™
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Build it Now™
CorePLUS™
CorePOWER™
CROSSVOLT™
CTL™
Green FPS™
Green FPS™ e-Series™
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IntelliMAX™
ISOPLANAR™
QS™
Quiet Series™
RapidConfigure™
™
®
TinyLogic
TINYOPTO™
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Saving our world, 1mW/W/kW at a time™
®
DEUXPEED
Marking Small Speakers Sound Louder SignalWise™
Dual Cool™
EcoSPARK
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ESBC™
and Better™
MegaBuck™
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MicroFET™
SmartMax™
®
TranSiC
®
SMART START™
Solutions for Your Success™
TriFault Detect™
TRUECURRENT *
®
®
SPM
μSerDes™
MicroPak™
STEALTH™
®
®
MicroPak2™
MillerDrive™
MotionMax™
Motion-SPM™
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®
SuperSOT™-3
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SuperSOT™-8
Fairchild
®
UHC
®
Fairchild Semiconductor
FACT Quiet Series™
Ultra FRFET™
UniFET™
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VisualMax™
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®
®
SupreMOS
FACT
®
SyncFET™
Sync-Lock™
®*
FAST
®
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®
®
*
®
tm
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Advance Information
Formative / In Design
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
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Preliminary
First Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
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Obsolete
Full Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Not In Production
Rev. I61
©2012 Fairchild Semiconductor Corporation
HUFA75639S3ST_F085A Rev. C1
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相关型号：
HUFA75645P3_NL
Power Field-Effect Transistor, 75A I(D), 100V, 0.014ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-220AB,
FAIRCHILD
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