LB11852FV [ONSEMI]

For Fan Motor;
LB11852FV
型号: LB11852FV
厂家: ONSEMI    ONSEMI
描述:

For Fan Motor

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Ordering number : ENA1112A  
LB11852FV  
Monolithic Digital IC  
For Fan Motor  
http://onsemi.com  
Single-phase Full-wave Pre-driver  
with Speed Control Function  
Overview  
The LB11852FV is a single-phase bipolar driving motor pre-driver with a speed control function based on speed  
feedback. With a small number of external parts, a highly efficient and very quiet variable-speed drive fan motor with  
low power consumption and high rotational accuracy can be implemented. The LB11852FV, integrated in a miniature  
package, is best suited for driving small fan motors requiring speed control.  
Features  
Single-phase full-wave driving pre-driver  
With a PMOS-NMOS device used as the external power transistor, low saturation output and a single-phase  
full-wave drive enable a high-efficiency drive with low power consumption.  
Speed control circuit incorporated  
Compared with open-loop control, a closed-loop control function that uses speed feedback to control the speed  
makes it possible to improve the rotational speed accuracy and reduce the variations in the rotational speed  
caused by fluctuations in the supply voltage or load. The separately excited upper direct PWM method is  
featured as the variable speed system.  
Variable speed control is possible with external PWM input or analog voltage input  
The speed control input signal is compatible with PWM duty ratio and analog voltages.  
Soft start circuit incorporated  
Minimum speed setting pin  
The minimum speed can be set using an external resistor.  
Current limiting circuit incorporated  
Chopper type current limit at startup or lock.  
Reactive current cut circuit incorporated  
Reactive current before phase changeover is cut, ensuring highly silent and low power-consumption drive.  
Automatic resetting type constraint circuit incorporated  
FG (rotational speed detection) output  
ORDERING INFORMATION  
See detailed ordering and shipping information on page 12 of this data sheet.  
Semiconductor Components Industries, LLC, 2013  
September, 2013  
91113NK 20130828-S00001/40208 MS PC 20080225-S00005 No.A1112-1/12  
LB11852FV  
Specifications  
Absolute Maximum Ratings at Ta = 25°C  
Parameter  
Symbol  
Conditions  
Ratings  
Unit  
V
V
pin maximum supply voltage  
V
max  
18  
CC  
CC  
OUTN pin maximum output current  
OUTP pin maximum Sink current  
OUT pin output withstand voltage  
CTL, C pin withstand voltage  
LIM pin withstand voltage  
IOUTN max  
20  
mA  
mA  
V
IOUTP max  
VOUT max  
CTL, C max  
LIM max  
FG max  
20  
18  
7
V
7
19  
V
FG output pin output withstand voltage  
FG output current  
V
FG max  
10  
mA  
mA  
W
5VREG pin maximum output current  
Allowable power dissipation  
Operating temperature  
I5VREG max  
Pd max  
10  
Mounted on a specified board *1  
0.8  
Topr  
-30 to 95  
-55 to 150  
°C  
°C  
Storage temperature  
Tstg  
*1 Mounted on a specified board : 114.3mm×76.1mm×1.6mm, glass epoxy  
*2 Tj max = 150°C. Use the device in a condition that the chip temperature does not exceed Tj = 150°C during operation.  
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating  
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.  
Recommended Operating Conditions at Ta = 25°C  
Parameter  
supply voltage 1  
supply voltage 2  
Symbol  
Conditions  
Ratings  
Unit  
V
V
V
V
1
V
V
pin  
5.5 to 16  
4.5 to 5.5  
CC  
CC  
CC  
CC  
V
2
-5VREG  
V
CC  
CC  
CTL input voltage range  
LIM input voltage range  
VCTL  
VLIM  
VICM  
0 to 5VREG  
0 to 5VREG  
0.2 to 3  
V
V
Hall input common phase input  
voltage range  
V
Electrical Characteristics at Ta = 25°C, V  
= 12V, unless otherwise specified  
CC  
Ratings  
typ  
Parameter  
Circuit current  
Symbol  
Conditions  
Unit  
min  
max  
15  
I
I
1
2
During drive  
12  
mA  
mA  
V
CC  
During lock protection  
I5VREG = 5mA  
12  
5.0  
210  
3.0  
1.1  
30  
15  
CC  
5VREG voltage  
5VREG  
VLIM  
4.8  
5.2  
230  
3.2  
1.3  
36  
Current limiting voltage  
CPWM pin H level voltage  
CPWM pin L level voltage  
CPWM pin charge current  
CPWM pin discharge current  
CPWM oscillation frequency  
CT pin H level voltage  
190  
2.8  
0.9  
24  
mV  
V
V
H
CR  
V
L
V
CR  
I
I
1
2
V
V
= 0.5V  
= 3.5V  
μA  
μA  
kHz  
V
CPWM  
CPWM  
21  
27  
33  
CPWM  
F
CPWM  
C = 220pF  
30  
PWM  
V
H
L
2.8  
0.9  
1.6  
0.16  
8
3.0  
1.1  
2.0  
0.20  
10  
3.2  
1.3  
CT  
CT pin L level voltage  
V
V
CT  
CT pin charge current  
I
I
1
V
V
I
= 2V  
= 2V  
2.5  
μA  
μA  
times  
V
CT  
CT  
CT pin discharge current  
CT pin charge/discharge current ratio  
OUTN pin output H voltage  
OUTN pin output L voltage  
OUTP pin output L voltage  
Hall input sensitivity  
2
0.25  
12  
CT  
CT  
R
1/I  
2
CT  
NH  
CT CT  
V
I
I
I
= 10mA  
O
V
-0.85  
0.9  
0.5  
±15  
V
-1.0  
1.0  
O
CC  
CC  
V
NL  
PL  
= 10mA  
O
V
O
V
= 10mA  
O
0.65  
V
O
+
-
VHN  
IN , IN differential voltage  
±25  
mV  
(including offset and hysteresis)  
Continued on next page.  
No.A1112-2/12  
LB11852FV  
Continued from preceding page.  
Ratings  
typ  
Parameter  
Symbol  
Conditions  
Unit  
min  
max  
0.30  
FG output L voltage  
V
L
I
= 5mA  
FG  
0.15  
V
μA  
V
FG  
FG pin leak current  
I
L
V
= 19V  
FG  
30  
FG  
EO pin output H voltage  
EO pin output L voltage  
RC pin output H voltage  
RC pin output L voltage  
RC pin clamp voltage  
CTL pin input H voltage  
CTL pin input L voltage  
CTL pin input open voltage  
CTL pin H input H current  
CTL pin L input L current  
C pin output H voltage  
C pin output L voltage  
LIM pin input bias current  
V
H
L
I
1 = -0.2mA  
VREG-1.2 VREG-0.8  
0.8  
EO  
EO  
V
I
1 = 0.2mA  
1.1  
3.7  
V
EO  
EO  
V
H
3.2  
3.45  
0.8  
V
RC  
V
L
0.7  
1.05  
1.7  
V
RC  
V
CLP  
1.3  
2.0  
1.5  
V
RC  
V
H
VREG  
1.0  
V
CTL  
V
V
L
0
V
CTL  
O
VREG-0.5  
-10  
VREG  
10  
V
CTL  
I
H
V
V
IN = 5VREG  
IN = 0V  
0
μA  
μA  
V
CTL  
FG  
I
L
-120  
-90  
CTL  
FG  
V
H
VREG-0.3 VREG-0.1  
C
V
L
1.8  
-1  
2.0  
2.2  
1
V
C
I
LIM  
μA  
V
B
LIM pin common phase input voltage  
range  
V LIM  
2.0  
VREG  
I
SOFT pin charge current  
I
SOFT  
1.0  
2.0  
1.3  
1.6  
μA  
C
SOFT pin operating voltage range  
V SOFT  
VREG  
V
I
Package Dimensions  
unit : mm (typ)  
3360  
Pd max -- Ta  
1.0  
0.8  
0.6  
0.4  
0.2  
5.2  
20  
When mounted on the thermal  
resistance evaluation board  
0.80  
1 2  
0.5  
0.22  
0.15  
0.35  
Independent IC  
(0.35)  
0.30  
0.13  
0
30  
0
30  
60  
90  
120  
Ambient temperature, Ta – °C  
SSOP20J(225mil)  
No.A1112-3/12  
LB11852FV  
Truth table  
Lock protection CPWM = H  
-
+
IN  
IN  
CT  
OUT1P  
L
OUT1N  
OUT2P  
OFF  
L
OUT2N  
FG  
L
Mode  
H
L
L
H
L
L
H
L
H
L
OUT1 2 drive  
OUT2 1 drive  
L
OFF  
OFF  
OFF  
OFF  
L
H
L
OFF  
OFF  
H
L
H
-
Lock protection  
H
H
OFF  
Speed control CT = L  
+
EO  
CPWM  
IN  
IN  
OUT1P  
L
OUT1N  
OUT2P  
OUT2N  
Mode  
H
L
L
H
L
L
H
L
OFF  
L
H
L
OUT1 2 drive  
OUT2 1 drive  
L
H
OFF  
OFF  
OFF  
H
L
OFF  
OFF  
H
L
H
L
Regeneration mode  
H
H
Pin Assignment  
OUT2P  
OUT2N  
1
2
3
4
5
6
7
8
9
20 OUT1P  
19 OUT1N  
18 SGND  
17 5VREG  
16 EO  
V
CC  
SENCE  
C
CTL  
15 EI  
RC  
14 LIM  
SOFT  
CPWM  
13 CT  
+
-
12 IN  
11 IN  
FG 10  
Top view  
No.A1112-4/12  
LB11852FV  
Block Diagram  
No.A1112-5/12  
LB11852FV  
Sample Application Circuit  
*3  
1μF/25V  
Rp = 1kΩ  
1
2
3
4
100Ω  
RF  
RFG =  
10kΩ to 100kΩ  
*2  
1μF/25V  
V
CC  
*8  
5VREG  
RC  
*7  
SENSE  
1
2
OUT1P  
OUT1N  
OUT2P  
OUT2N  
LIM  
3
4
5VREG  
SOFT  
C
*4  
-
H
IN  
+
IN  
CTL  
EL  
CTLsignal  
CT  
*5  
*6  
CP = 1μF  
CPWM  
EO  
SGND  
*1  
CP = 220pF  
30kHz  
No.A1112-6/12  
LB11852FV  
Description of Pre-driver Bock  
*1 : Power-GND wiring  
The SGND is connected to the control circuit power supply system.  
*2 : Power stabilization capacitor  
For the power stabilization capacitor on the signal side, use a capacitor of 0.1μF or more. Connect the capacitor  
between V  
and GND with a thick and along the shortest possible route.  
CC  
*3 : Power-side power stabilization capacitor  
For the power-side power stabilization capacitor, use a capacitor of 1μF or more. Connect the capacitor between the  
power-side power supply and GND with a thick and along the shortest possible route.  
+
-
*4 : IN , IN pins  
Hall signal input pins  
Wiring should be short to prevent noise from being carried.  
+
-
If noise is carried, insert a capacitor between the IN and IN pins.  
The Hall input circuit functions as a comparator with hysteresis (15mV).  
It also has a soft switch zone with ±30mV (input signal difference voltage).  
It is also recommended that the Hall input level should be a minimum of 100mV (p-p).  
*5 : CPWM pin  
Pin to connect the capacitor used to generate the PWM basic frequency  
Use of CP = 200pF causes oscillation at f = 30kHz, which is the basic frequency of PWM.  
As this is also used for the current limiter reset signal, a capacitor must be connected even if the speed is not going to  
be controlled.  
*6 : CT pin  
Pin to connect the capacitor used for lock detection  
The constant-current charging and constant-current discharging circuits incorporated cause locking when the pin  
voltage reaches 3.0V, and releasing the lock protection when it drops to 1.0V.  
Connect this pin to the GND when it is not to be used (locking not necessary).  
*7 : SENSE pin  
Current limiter detection pin  
When the pin voltage exceeds 0.21V, the current limiter is activated, and operation enters lower regeneration mode.  
Connect this pin to the GND when it is not to be used.  
*8 : FG pin  
Rotational speed detection pin  
This is an open collector output that can detect the rotational speed using the FG output corresponding to the phase  
changeover.  
Keep this pin open when it is not to be used.  
No.A1112-7/12  
LB11852FV  
Description of Speed Control Block  
1. Speed control diagram  
The slope is determined by the RC pin constant.  
(RPM)  
CR time constant large  
CR time constant small  
Rotational speed  
Minimum speed  
Determined by LIM pin voltage  
Small CTL signal (PWMDUTY) Large  
100%  
0%  
Large EO pin voltage (V)  
Small  
Minimum speed setting rotation  
On-duty small  
Variable speed  
Full speed  
On-duty large  
CTL pin  
5VREG  
LIM voltage  
EO pin  
EO voltage  
0V  
2. Timing at startup (soft start)  
V
pin  
CC  
CTL pin  
Stop  
Stop  
Full speed  
Soft start  
The slope changes depending on the  
capacitance of the SOFT pin  
(large capacitance large slope).  
SOFT pin  
Full speed  
No.A1112-8/12  
LB11852FV  
2. Supplementary description of operations  
By inputting the duty pulses, a feedback loop is formed inside the LB11852 IC to establish the FG period (rotational  
speed of the motor) that corresponds to the control voltage of the pulses.  
LB11852  
FG  
Speed  
control block  
Pre-driver  
block  
CTL  
CTL  
Closed  
Feed-Back  
Loop  
Signal  
CONTROL  
SIGNAL  
The operation inside the IC is as flows. pulse signals are created from the edges of the FG signals as shown in the  
figure below, and using these signals as a reference, waveforms with a pulse width determined by the CR time constant  
are generated using a one-shot multivibrator. These pulse waveforms are then integrated to control the duty ratio of the  
pre-driver output as the control voltage.  
FG  
Edge pulse  
Slope determined  
by CR time  
constant  
RC pin  
One-shot  
multivibrator  
output  
TRC (sec) = 1.15RC  
By changing the pulse width as determined by the CR time constant, the VCTL versus rotational speed slope can be  
adjusted as shown in the speed control diagram in the previous section.  
However, since pulses that are determined by the CR time constant are used, the CR variations are output as-is as the  
speed control error.  
No.A1112-9/12  
LB11852FV  
4. Procedure for calculating the constant  
RC pin〉  
The slope shown in the speed control diagram is determined by the constant of the RC pin.  
(RPM)  
Motor  
at maximum speed  
100%  
0%  
CTL Duty(%)  
1) Obtain the FG signal frequency fFG (Hz) at the maximum rotational speed of the motor  
(with two FG pulses per rotation).  
fFG (Hz) = 2 rpm/60 (1)  
2) Obtain the time constant of the components connected to the RC pin  
(use the duty ratio (example : 100% = 1.0 or 60% = 0.6) as the CTL duty ratio for achieving the maximum rotational  
speed).  
R × C = Duty ratio/ (3.3 × 1.1 × fFG) (2)  
3) Obtain the resistance and the capacitance of the capacitor.  
Based on the discharge capability of the RC pin, the capacitance of the capacitor which can be used is in the range of  
0.01μF to 0.015μF.  
Therefore, obtain the appropriate resistance from the result of (2) above using the formula in (3) or (4) below.  
R = (R × C)/0.01μF (3)  
R = (R × C)/0.015μF (4)  
The temperature characteristics of the curve are determined by the temperature characteristics of the capacitor of the  
RC pin. To minimize the variations in the rotational speed caused by temperature, a capacitor with excellent  
temperature characteristics must be used.  
No.A1112-10/12  
LB11852FV  
LIM pin〉  
The minimum speed is determined by the voltage of the LIM pin.  
(RPM)  
Maximum speed  
10000  
8000  
6000  
4000  
Minimum  
speed setup  
2000  
0%  
5V  
CTL Duty(%)  
CVO pin voltage (V)  
100%  
2V  
1) Obtain the ratio of the minimum speed required to the maximum speed.  
Ra = Minimum/maximum speed (1)  
In the example shown in the figure above : Ra = minimum/maximum speed = 3000/10000 = 0.3  
2) Obtain the product of the duty ratio at which the maximum speed is achieved and the value in formula (1).  
Ca = Maximum speed duty ratio × Ra (2)  
In the example given : Ca = maximum speed duty ratio × Ra = 0.8 × 0.3 = 0.24  
3) Obtain the required LIM pin voltage.  
LIM = 5 - (3 × Ca) (3)  
In the example given : LIM = 5 - (3 × Ca) = 5 - (3 × 0.24) 4.3V  
4) Divide the resistance of 5VREG to generate the LIM voltage.  
In the example given, the voltage is 4.3V so the resistance ratio is 1 : 6.  
The resistance is 10kΩ between 5VREG and LIM and 62kΩ between LIM and GND.  
5VREG  
LIM  
VREF  
SOFT  
No.A1112-11/12  
LB11852FV  
C pin〉  
In order to connect a capacitor capable of smoothing the pin voltage to the C pin, the correlation given in the following  
equation must be satisfied when f (Hz) serves as the input frequency of the CTL pin. (R is incorporated inside the IC,  
and it is 180kΩ (typ.).)  
1/f = t < CR  
The higher the capacitance of the capacitor, the slower the response to changes in the input signals.  
5VREF  
A capacitor capable of the smoothing  
pin voltage is connected here  
Inverted waveform of CTL pin input  
(same frequency)  
1/f = t < CR  
C pin  
CTL pin  
CTL circuit  
VREF circuit  
180kΩ  
ORDERING INFORMATION  
Device  
Package  
Shipping (Qty / Packing)  
2000 / Tape & Reel  
SSOP20J (225mil)  
(Pb-Free / Halogen Free)  
LB11852FV-TLM-H  
SSOP20J (225mil)  
(Pb-Free / Halogen Free)  
LB11852FV-TLM-E  
LB11852FV-MPB-E  
LB11852FV-MPB-H  
2000 / Tape & Reel  
90 / Fan-Fold  
SSOP20J (225mil)  
(Pb-Free / Halogen Free)  
SSOP20J (225mil)  
(Pb-Free / Halogen Free)  
90 / Fan-Fold  
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www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no  
warranty, representation or guarantee regarding the suitabilityof its products for any particular purpose, nor does SCILLC assume any liability arising out of the  
application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental  
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual  
performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical  
experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use  
as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in  
which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for  
any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors  
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PS No.A1112-12/12  

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