LC709204FXE-01TBG [ONSEMI]
Battery Fuel Gauge for 1-Cell Lithium-Ion/Polymer (Li+) [Smart Lib Gauge] with low-power 2 µA operation;型号: | LC709204FXE-01TBG |
厂家: | ONSEMI |
描述: | Battery Fuel Gauge for 1-Cell Lithium-Ion/Polymer (Li+) [Smart Lib Gauge] with low-power 2 µA operation 电池 仪表 |
文件: | 总22页 (文件大小:594K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DATA SHEET
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Battery Fuel Gauge LSI
[Smart LiB Gauge] for
1-Cell Lithium-ion/ Polymer
(Li+) with Low Power 2ꢀmA
Operation
WLCSP12 1.48x1.91x0.51
CASE 567XE
MARKING DIAGRAM
LC709204F
Overview
204**
LC709204F is a Fuel Gauge for 1−Cell Lithium−ion/Polymer
batteries. It is part of our Smart LiB Gauge family of Fuel Gauges
which measure the battery RSOC (Relative State Of Charge) using its
unique algorithm called HG−CVR2. The HG−CVR2 algorithm
provides accurate RSOC information even under unstable conditions
(e.g. changes of battery; temperature, loading, aging and
self−discharge). An accurate RSOC contributes to the operating time
of portable devices. The Fuel Gauge (in other words, Gas Gauge,
Battery Monitor or Battery Gauge) feature of HG−CVR2 algorithm
makes LSI highly applicable in various application. The LSI can
immediately start battery measurement by setting a few parameters
after battery insertion. Learning cycles that make complicated
manufacturing process of applications can be avoided.
AWLYW
204** = 20401 (LC709204FXE−01TBG)
A
WL
YW
= Assembly Site
= Wafer Lot Number
= Assembly Start Week
ORDERING INFORMATION
See detailed ordering and shipping information on page 20 of
this data sheet.
The LSI also supports battery safety by alarm functions and SOH
(State of Health) reporting to the application processor. The operating
consumption current is very low 2 mA and it is suitable for applications
such as wearables and 1 series N parallel batteries.
Features
Applications
• HG−CVR2 Algorithm Technology
♦ Small Footprint: No Need for Current Sensing Resistor
♦ Accurate RSOC of Aging Battery
• Wearables / IoT Devices
• Smartphones/PDA Devices
• Digital Cameras
• Portable Game Players
• USB-related Devices
♦ Stable Gauging by Automatic Convergence of Error
♦ Immediate Accurate Gauging after Battery Insertion
♦ Eliminates Learning Cycle
• Low Power Consumption
♦ 2 mA Operational Mode Current
• Improvement of the Battery Safety by Alarm Function
RSOC / Voltage / Temperature
• Battery Lifetime Measurement
SOH / Cycle Count / Operating Time
• Remaining Time Estimation
Time to Full / Time to Empty
• Three Temperature Inputs
♦ Inputs to sense two NTC Thermistors
2
♦ Via I C
• Detection of Battery Operating Conditions
Charging / Discharging
• Detection of Battery Insertion
2
• I C Interface (supported up to 400 kHz)
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
© Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
May, 2023 − Rev. 1
LC709204F/D
LC709204F
Application Circuit Example
Application
Battery Pack
PACK+
1uF
SCL
SCL
T
Application
processor
TSENSE1
SDA
SDA
LC709204F
ALARMB
ALARMB
REG
2.2uF
PACK-
Figure 1. Example of an Application Schematic using LC709204F
(The temperature is measured using TSENSE1 pin.)
Application
Battery Pack
PACK+
1uF
SCL
SCL
T
Application
processor
TSENSE1
SDA
SDA
LC709204F
ALARMB
ALARMB
REG
2.2uF
Thermistor-sense
PACK-
Figure 2. Example of an Application Schematic using LC709204F
(The Temperature is sent via I2C.)
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2
LC709204F
VDD
Regulator
REG
DRV
SCL
I2C
Interface
SDA
ALARMB
Look up table for
internal battery
impedance & OCV
Processing
unit
TSENSE1
TSENSE2
ADC
Timer
TEST1
TEST2
VSS
Internal
Thermistor
Power on reset
Figure 3. Block Diagram
ALARMB
C1
TEST1
C2
NF1
C3
NF2
C4
TSENSE1
B4
SCL
B1
TSENSE2
B3
TEST2
B2
SDA
A1
VSS
A2
REG
A3
VDD
A4
(Bottom View)
Figure 4. Pin Assignment
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3
LC709204F
Table 1. PIN FUNCTION
WLCSP12
Name
SDA
I/O
Description
2
A1
B1
C1
I/O I C Data pin (open drain). Pull−up must be done externally.
2
SCL
I/O I C Clock pin (open drain). Pull−up must be done externally.
ALARMB
O
This pin indicates alarm by low output (open drain). Pull−up must be done externally.
Keep this pin OPEN when not in use.
A2
B2
C2
A3
B3
V
−
I
Connect this pin to the battery’s negative (−) pin.
Connect this pin to the battery’s negative (−) pin.
Connect this pin to the battery’s negative (−) pin.
Regulator output. Connect this pin to the capacitor.
SS
TEST2
TEST1
REG
I
O
TSENSE2
I/O Sense input and power supply for a thermistor. Connect 10 kW NTC thermistor to measure “Ambient
temperature (0x30)”. Keep this pin OPEN when not in use.
C3
A4
B4
NF1
VDD
−
−
No function pin. Keep this pin OPEN. Short−pin with TSENSE2 is permitted to pull out it.
Connect this pin to the battery’s positive (+) pin.
TSENSE1
I/O Sense input and power supply for a thermistor. Connect 10 kW NTC thermistor to measure “Cell
temperature (0x08)”. Keep this pin OPEN when not in use.
C4
NF2
−
No function pin. Keep this pin OPEN.
Table 2. ABSOLUTE MAXIMUM RATINGS (T = 25°C, V = 0 V)
A
SS
Specification
Min
−0.3
−0.3
Typ
−
Max
+6.5
+6.5
Parameter
Maximum Supply Voltage
Input Voltage
Symbol
max
Pin/Remarks
Conditions
V
(V)
Unit
DD
V
VDD
−
V
DD
V (1)
I
ALARMB, SDA,
SCL, NF1, NF2
−
−
Output Voltage
V (1)
REG,
TSENSE1,
TSENSE2
−
−0.3
−
−
+4.6
150
o
Allowable Power Dissipation
P
d max
T = −40 to
−
−
mW
A
+85_C
Operating Ambient Temperature
Storage Ambient Temperature
T
−
−
−40
−
−
+85
_C
aopr
T
−40
+125
stg
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
Table 3. ALLOWABLE OPERATING CONDITIONS (T = −40 to +85°C, V = 0 V)
A
SS
Specification
Min
Typ
Max
Parameter
Symbol
(1)
Pin/Remarks
Conditions
V
(V)
Unit
DD
Operating Supply Voltage
V
VDD
−
2.5
−
5.0
V
DD
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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4
LC709204F
Table 4. ELECTRICAL CHARACTERISTICS (T = −40 to +85°C, V = 0 V, Typ: 4 V, T = 25°C)
A
SS
A
Specification
Typ
Pin/
Remarks
V
[V]
Min
Max
Parameter
Symbol
Conditions
Unit
V
DD
LDO
LDO Output Voltage
CONSUMPTION CURRENT
V
REG
REG
VDD
2.5 to 5.0
2.5 to 5.0
2.3
2.7
2
3.0
Operational Mode
I
(1)
Ta = −20_C to +70_C
Average current with 0.01C
Constant discharge.
μA
DD
Sleep Mode
I
(2)
Ta = −20_C to +70_C
2.5 to 5.0
1.3
DD
INPUT / OUTPUT
High Level Input
Voltage
V
ALARMB,
SDA, SCL
2.5 to 5.0
2.5 to 5.0
2.5 to 5.0
1.4
5.5
0.5
1
V
IH
Low Level Input
Voltage
V
ALARMB,
SDA, SCL
IL
High Level Input
Current
I
IH
ALARMB,
SDA, SCL, (including output transistor
NF1, NF2 off leakage current)
V
IN
= V
DD
mA
Low Level Input
Current
I
IL
ALARMB,
SDA, SCL, (including output transistor
NF1, NF2 off leakage current)
V
= V
SS
2.5 to 5.0
−1
IN
Low Level Output
Voltage
V
V
(1)
(2)
ALARMB,
SDA, SCL
I
I
= 3.0 mA
= 1.3 mA
3.3 to 5.0
2.5 to 5.0
2.5 to 5.0
0.4
0.4
V
OL
OL
OL
OL
Hysteresis Voltage
VHYS
ALARMB,
SDA, SCL
0.2
10
Pull−up Resistor
Resistance
Rpu
TSENSE1,
TSENSE2
2.5 to 5.0
2.5 to 5.0
kΩ
Pull−up Resistor
Temperature
Coefficient
Rpuc
TSENSE1, Ta = −20_C to +70_C
TSENSE2
−0.05
+0.05
%/_C
POWER ON RESET
Reset Release Voltage
V
VDD
2.4
90
V
RR
Initialization Time after
Reset Release
T
INIT
2.4 to 5.0
2.5 to 5.0
ms
TIMER
Time Measurement
Accuracy
T
ME
Ta = 25_C
−1
+1
%
BATTERY VOLTAGE
Voltage Measurement
Accuracy
V
(1)
(2)
VDD
4
+7.5
+20
mV/cell
Ta = +25_C
−7.5
−20
ME
V
ME
Ta = −20_C to +70_C
2.5 to 5.0
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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5
LC709204F
Table 5. I2C SLAVE CHARACTERISTICS (T = −40 to +85°C, V = 0 V)
A
SS
Specification
Min
−
Max
Parameter
Clock Frequency
Symbol
Pin/Remarks
SCL
Conditions
V
(V)
Unit
kHz
ms
DD
T
400
SCL
BUF
Bus Free Time between STOP Condition
and START Condition
T
SCL, SDA
(See Figure 5)
(See Figure 5)
1.3
−
Hold Time (Repeated) START Condition.
First Clock Pulse is Generated after this
Interval
T
T
SCL, SDA
0.6
−
ms
HD:STA
Repeated START Condition Setup Time
STOP Condition Setup Time
Data Hold Time
SCL, SDA
SCL, SDA
SCL, SDA
SCL, SDA
SCL
(See Figure 5)
(See Figure 5)
(See Figure 5)
(See Figure 5)
(See Figure 5)
(See Figure 5)
(See Figure 6)
0.6
0.6
0
−
−
ms
ms
ms
ns
ms
ms
s
SU:STA
SU:STO
HD:DAT
2.5 to 5.0
T
T
−
Data Setup Time
T
100
1.3
0.6
12
−
SU:DAT
Clock Low Period
T
−
LOW
HIGH
Clock High Period
T
SCL
−
Time-out Interval (Notes 1, 2)
T
TMO
SCL, SDA
14
2
1. This LSI resets I C communication if the communication takes more than T
. It initializes an internal timer to measure the interval when
TMO
it detects ninth clock pulse. It can receive a new START condition after the reset.
2. This LSI may lose I C communication at this reset operation. Then if a master can’t receive a response it must restart transaction from START
condition.
2
TBUF
SDA
THD;STA
TSU;STO
THD;DAT
TSU;STA
THIGH
TSU;DAT
TLOW
SCL
P
S
S
P
Figure 5. I2C Timing Diagram
SDA
SCL
TTMO
2
1
8
9
1
2
8
9
ACK
ACK
S
Figure 6. I2C Time-out Interval
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6
LC709204F
I2C Communication Protocol
2
Communication protocol type: I C
Frequency: Supported up to 400 kHz
Slave Address: 0001011 (The first 8−bits after the Strat Condition is 0x16 (WRITE) or 0x17 (READ).)
This LSI will stretch the clock.
Bus Protocols
S
Sr
Rd
Wr
A
:
:
:
:
:
:
:
:
:
:
:
Start Condition
Repeated Start Condition
Read (bit value of 1)
Write (bit value of 0)
ACK (bit value of 0)
NACK (bit value of 1)
Stop Condition
Slave Address to Last Data (CRC−8−ATM : ex.3778 mV : 0x16, 0x09, 0x17, 0xC2, 0x0E → 0x86)
Master-to-Slave
Slave-to-Master
Continuation of protocol
N
P
CRC−8
…
S
Sr
A
Slave Address
Slave Address
CRC−8
Wr
Rd
N
A
A
P
Command Code
Data Byte Low
A
A
Data Byte High
* When you do not read CRC−8, LSI data is not reliable. CRC−8−ATM ex: (5 bytes) 0x16, 0x09, 0x17, 0xC2,
0x0E → 0x86
Figure 7. Read Word Protocol
S
Slave Address
Wr
A
Command Code
A
Data Byte Low
A
Data Byte High
A
CRC−8
A
P
* When you do not add CRC−8, the Written data (Data byte Low/High) become invalid.
CRC−8−ATM ex: (4 bytes) 0x16, 0x09, 0x55, 0xAA → 0x3B
Figure 8. Write Word Protocol
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LC709204F
Table 6. FUNCTION OF REGISTERS
Command
Initial
Value
Code
0x00, 0x01
0x03
Register Name
R/W
Range
Unit
Description
No Function
−
−
Registers that the access is prohibited
−
TimeToEmpty
Before RSOC
R
0x0000 to 0xFFFF
minutes
Displays estimated time to
empty.
0xFFFF
st
0x04
W
0xAA55: 1 sampling
Optional Command, especially for
obtaining the voltage with intentional timing
after power on reset, see Figure 9.
−
nd
0xAA56: 2 sampling
rd
0xAA57: 3 sampling
th
0xAA58: 4 sampling
0x05
0x06
TimeToFull
R
0x0000 to 0xFFFF
0x0000 to 0xFFFF
minutes
K
Displays estimated time to full.
0xFFFF
TSENSE1 Thermistor B
R/W
Sets B−constant of the
TSENSE1 thermistor.
0x0D34
(3380K)
0x07
0x08
Initial RSOC
W
0xAA55: Initialize RSOC
Initialize RSOC with current voltage when
0xAA55 is set.
−
Cell Temperature
(TSENSE1)
R
0x0980 to 0x0DCC
(−30℃ to 80℃)
0.1K
Displays Cell Temperature.
0x0BA6
(25℃)
(0.0℃ =
0x0AAC)
2
W
Sets Cell Temperature in I C
mode.
0x09
0x0A
Cell Voltage
R
0x09C4 to 0x1388
(2.5 V to 5 V)
mV
Displays Cell Voltage.
−
Current Direction
R/W
0x0000: Auto mode
0x0001: Charge mode
0xFFFF: Discharge mode
Selects Auto/Charge/Discharge mode.
0x0000
0x0B
0x0C
APA
R/W
R/W
0x0000 to 0xFFFF
0x0000 to 0xFFFF
Sets Adjustment parameter.
−
0x001E
−
(Adjustment Pack
Application)
APT
Sets a value to adjust temperature
measurement delay timing.
(Adjustment Pack
Thermistor)
0x0D
0x0E
RSOC
R/W
R/W
0x0000 to 0x0064
(0% to 100%)
%
K
Displays RSOC value based
on a 0−100 scale
TSENSE2 Thermistor B
0x0000 to 0xFFFF
Sets B−constant of the
TSENSE2 thermistor.
0x0D34
(3380K)
0x0F
ITE (Indicator to Empty)
IC Version
R
0x0000 to 0x03E8
(0.0% to 100.0%)
0.1%
Displays RSOC value based
−
on a 0−1000 scale
0x11
0x12
R
0x0000 to 0xFFFF
Displays an internal management code.
Selects a battery profile.
−
Change Of The
Parameter
R/W
0x0000 to 0x0004
0x0000
0x13
Alarm Low RSOC
R/W
0x0000: Disable
0x0001 to 0x0064:
Threshold
%
Sets RSOC threshold to
generate Alarm signal.
0x0000
(1% to 100%)
0x14
0x15
0x16
Alarm Low Cell Voltage
IC Power Mode
Status Bit
R/W
R/W
R/W
0x0000: Disable
0x09C4 to 0x1388:
Threshold (2.5 V to 5 V)
mV
Sets Voltage threshold to
generate Low Cell Voltage
Alarm signal.
0x0000
0x0002
0x0000
0x0001: Operational
mode
0x0002: Sleep mode
Selects Power mode.
0x0000 to 0x0003
BIT0: Controls TSENSE1 thermistor
BIT1: Controls TSENSE2 thermistor
0x17
0x19
Cycle Count
R
0x0000 to 0xFFFF
0x0000 to 0xFFFF
count
Displays cycle count.
0x0000
0x00C0
Battery Status
R/W
Displays various kinds of alarm and
estimated state of the battery.
0x1A
Number of the
Parameter
R
0x0000 to 0xFFFF
Displays Battery profile code.
−
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LC709204F
Table 6. FUNCTION OF REGISTERS (continued)
Command
Code
Initial
Value
Register Name
R/W
Range
Unit
Description
0x1C
Termination Current
Rate
R/W
0x0002 to 0x001E:
0.01C
Sets termination current rate.
0x0002
Threshold
(0.02C to 0.3C)
0x1D
Empty Cell Voltage
R/W
0x0000: Disable
mV
Sets empty cell voltage.
0x0000
0x09C4 to 0x1388:
Threshold
(2.5 V to 5 V)
0x1E
0x1F
ITE Offset
R/W
R/W
0x0000 to 0x03E8
(0.0% to 100.0%)
0.1%
mV
Sets ITE so that RSOC is 0%.
0x0000
0x0000
Alarm High Cell Voltage
0x0000: Disable
0x09C4 to 0x1388:
Threshold (2.5 V to 5 V)
Sets Voltage threshold to
generate High Cell Voltage
Alarm signal.
0x20
0x21
Alarm Low Temperature
R/W
R/W
R/W
0x0000: Disable
0x0980 to 0x0DCC:
Threshold (−30_C to 80_C)
0.1K
(0.0℃ =
0x0AAC)
Sets Voltage threshold to
generate Low Temperature
alarm signal.
0x0000
0x0000
0x0000
Alarm High
Temperature
0x0000: Disable
0x0980 to 0x0DCC:
Threshold (−30_C to 80_C)
0.1K
(0.0℃ =
0x0AAC)
Sets Voltage threshold to
generate High Temperature
alarm signal.
0x25, 0x24
Total Run Time
0x00000000 to
0x00FFFFFF
minutes
Displays operating time.
0x24: Lower 16bits
0x25: Higher 8bits
0x27, 0x26
0x29, 0x28
Accumulated
Temperature
R/W
R/W
0x00000000 to
0xFFFFFFFF
0x26: Lower 16bits
0x27: Higher 16bits
2K
minutes
Displays accumulated temper-
0x0000
0x0000
0x0000
ature.
Accumulated RSOC
0x00000000 to
0xFFFFFFFF
0x28: Lower 16bits
0x29: Higher 16bits
%
minutes
Displays accumulated RSOC.
0x2A
0x2B
0x2C
Maximum Cell Voltage
Minimum Cell Voltage
R/W
R/W
R/W
0x09C4 to 0x1388
(2.5V to 5V)
mV
mV
Displays the maximum
historical Cell Voltage.
0x09C4 to 0x1388
(2.5V to 5V)
Displays the minimum
historical Cell Voltage.
0x1388
(5V)
Maximum Cell
Temperature
(TSENSE1)
0x0980 to 0x0DCC
(−30℃ to 80℃)
0.1K
(0.0℃ =
0x0AAC)
Displays the historical
maximum temperature of
TSENSE1.
0x0980
(−30℃)
0x2D
0x30
Minimum Cell
Temperature
(TSENSE1)
R/W
R
0x0980 to 0x0DCC
0.1K
(0.0℃ =
0x0AAC)
Displays the historical
minimum temperature of
TSENSE1.
0x0DCC
(80℃)
(−30℃ to 80℃)
Ambient Temperature
(TSENSE2)
0x0980 to 0x0DCC
(−30℃ to 80℃)
0.1K
(0.0℃ =
0x0AAC)
Displays Ambient
Temperature.
0x0BA6
(25℃)
0x32
State of Health
User ID
R
R
0x0000 to 0x0064
%
Displays State of Health of
0x0064
(100%)
a battery on a 0−100 scale
0x37, 0x36
0x00000000 to
0xFFFFFFFF
Displays 32bits User ID.
(Note 3)
0x36: Lower 16bits
0x37: Higher 16bits
More than
0x40
No Function
−
−
Registers that the access is prohibited.
−
0xXXXX = Hexadecimal notation
3. The initial value of User ID is set on IC at ID Writing process. Please refer to an application note about how to write.
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LC709204F
TimeToEmpty (0x03)
TSENSE1 Thermistor B (0x06)
This register contains estimated time to empty in minutes.
The empty is defined as the state that RSOC(0x0D) is 0%.
Sets B-constant of the thermistor which is connected to
TSENSE1. Refer to the specification sheet of the thermistor
for the set value to use.
Before RSOC (0x04)
This command is the optional Command, used especially
for obtaining the voltage with intentional timing after power
on reset. Generally the LSI will get initial RSOC by Open
Circuit Voltage (OCV) of a battery. It is desirable for battery
current to be less than 0.025C to get expected OCV. (i.e. less
than 75 mA for 3000 mAh design capacity battery.) The LSI
initializes RSOC by measured battery voltage in initial
sequence. But if reported RSOC after reset release is not
expected value, “Before RSOC” command or “Initial
RSOC” command can initialize RSOC again.
Initial RSOC (0x07)
The LSI can be forced to initialize RSOC by sending the
Before RSOC Command (0×04 = AA55) or the Initial
RSOC Command (0×07 = AA55).
The LSI initializes RSOC by the measured voltage at that
time when the Initial RSOC command is written. (See
Figure 10). The maximum time to initialize RSOC after the
command is written is 1.5 ms.
The LSI samples battery voltage four times during initial
sequence. The sampling interval is around 10 ms. See
Figure 9. RSOC is initialized using the 1st sampled voltage
automatically with the initial sequence. The four sampled
voltage are maintained until the LSI is reset. “Before RSOC”
command can select a voltage for RSOC initialization from
them. See Table 7. If the battery is not charged during initial
sequence the maximum voltage is suitable for more accurate
initial RSOC. Try all “Before RSOC” command and read
RSOC (0x0D) to search the maximum voltage. The higher
RSOC after the command is caused by the higher voltage.
Figure 10. Initial RSOC Command
Cell Temperature (TSENSE1) (0x08)
This register contains the cell temperature from −30_C
(0×0980) to +80_C (0×0DCC) measured in 0.1_C units.
When Bit 0 of Status Bit (0x16) is 1 the LSI measures the
attached thermistor and loads the temperature into the Cell
Temperature register. For this mode, the thermistor shall be
connected to the LSI as shown in Figure 1. TSENSE1 pin
provides power to the thermistor and senses it. Temperature
measurement timing is controlled by the LSI, and the power
to the thermistor is supplied only at the time.
The Cell Temperature is used for battery measurement
that includes RSOC. Then when Bit 0 of Status Bit (0x16)
is 0 the application processor must input temperature of the
battery to this register. Update of Cell temperature is
recommended if the temperature changes more than 1_C
during battery charging and discharging.
Figure 9. Sampling order for Before RSOC Command
Table 7. BEFORE RSOC COMMAND
Sampling order of
Command
Code
Battery Voltage for
RSOC Initialization
DATA
Cell Voltage (0x09)
This register contains the V voltage in mV.
st
0x04
0xAA55
0xAA56
0xAA57
0xAA58
1
sampling
sampling
sampling
sampling
DD
nd
2
3
4
rd
th
Current Direction (0x0A)
This register is used to control the reporting of RSOC. In
Auto mode the RSOC is reported as it increases or decreases.
In Charge mode the RSOC is not permitted to decrease. In
Discharge mode the RSOC is not permitted to increase.
With consideration of capacity influence by temperature,
we recommend operating in Auto because RSOC is affected
TimeToFull (0x05)
This register contains estimated time to full in minutes.
The full is defined as the state that RSOC (0x0D) is 100%.
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10
LC709204F
APAvalue + Lower_APA ) (Upper_APA * Lower_APA)
Capacity * Lower_Cap.
by the cell temperature. A warm cell has more capacity than
a cold cell. Be sure not to charge in the Discharge mode and
discharge in the Charge mode; it will create an error.
An example of RSOC reporting is shown in Figure 11 and
Figure 12.
(eq. 1)
Upper_Cap. * Lower_Cap.
Calculation example in case 1500 mAh battery Type−01:
APAvalue + 45:0x2D ) (58:0x3A * 45:0x2D)
1500 * 1000
+ 52:0x34
2000 * 1000
The upper 8−bits and the lower 8−bits of APA register are
for charging and discharging adjustment parameters each.
See Table 9. Table 8 shows them as the same value. For
example the set value in APA register is 0x0D0D for 0x0D
APA value.
But RSOC accuracy may be improved by setting different
values each depending on the target battery characteristics.
Please contact onsemi if you don’t satisfy the RSOC
accuracy. The deeper adjustment of APA value may improve
the accuracy.
Figure 11. Discharge Mode
(An example with increasing in temperature. A warm
cell has more capacity than a cold cell. Therefore
RSOC increases without charging in Auto mode)
Table 8. TYPICAL APA VALUE FOR CHARGING AND
DISCHARGING ADJUSTMENT
APA[15:8],APA[7:0]
Design
Capacity
Type−01
0x13, 0x13
0x15, 0x15
0x18, 0x18
0x21, 0x21
0x2D, 0x2D
0x3A, 0x3A
0x3F, 0x3F
0x42, 0x42
0x44, 0x44
0x45, 0x45
Type−06
0x0C, 0x0C
0x0E, 0x0E
0x11, 0x11
0x17, 0x17
0x1E, 0x1E
0x28, 0x28
0x30, 0x30
0x34, 0x34
0x36, 0x36
0x37, 0x37
Type−07
0x03, 0x03
0x05, 0x05
0x07, 0x07
0x0D, 0x0D
0x13, 0x13
0x19, 0x19
0x1C, 0x1C
−
50 mAh
100 mAh
200 mAh
500 mAh
1000 mAh
2000 mAh
3000 mAh
4000 mAh
5000 mAh
6000 mAh
−
−
Figure 12. Charge Mode
(An example with decreasing in temperature. A cold
cell has less capacity than a warm cell. Therefore
RSOC decreases without discharging in Auto mode)
APA[15:8], APA[7:0]
Design
Capacity
Type−04
0x10, 0x10
Type−05
0x06, 0x06
2600 mAh
Adjustment Pack Application (0x0B)
This register contains APA values which are parameter to
fit installed battery profiles in a target battery characteristics.
Appropriate APA values for the target battery will improve
RSOC accuracy.
Typical APA values can be taken from the design capacity
of the battery in Table 8. Table 8 shows relations of typical
APA value and the design capacity. Use capacity per 1−cell
for the table if some batteries are connected in parallel.
Calculate APA values using linear supplement if there is not
a requested design capacity in the table. See following
formula.
Table 9. BIT CONFIGURATION OF APA REGISTER
BITS
Register Name
APA[15:8]
APA[7:0]
APA value for charging adjustment
APA value for discharging adjustment
Adjustment Pack Thermistor (0x0C)
This LSI will power external NTC thermistors
periodically to measure CELL and AMBIENT temperature.
Internal pull−up resistors of TSENSE1 and TSENSE2 turn
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11
LC709204F
on for the charging. This register contains the delay time
from the turn−on to the temperature measurement. The
delay time is calculated by following formula.
of a battery. The other is rescaling. Set Sleep mode to keep
the data. Writing to this register is not necessary in normal
operation. ITE (0x0F) will be updated with the writing too.
Delay + 0.167 ms (200 ) APT)
(eq. 2)
TSENSE2 Thermistor B (0x0E)
Sets B−constant of the thermistor which is connected to
TSENSE2. Refer to the specification sheet of the thermistor
for the set value to use.
The both of TSENSE1 and TSENSE2 resistors turn on at
the same time. See Figure 13 about the delay and waveform.
The default APT (0x001E) will meet most of circuits where
a capacitor as shown in Figure 14 is not placed. This will
delay the measurement with this register if there is
a capacitor in target battery pack.
Indicator to Empty (0x0F)
This register contains RSOC in 0.1%.
IC Version (0x11)
This register contains an internal management code. The
value is not published.
Delay
Change of the Parameter (0x12)
The LSI contains five type battery profiles. This register
can select a target battery profile from them. See Table 10.
Nominal/rated voltage or charging voltage of the target
battery support to determine which battery profile shall be
used.
Measures voltage
In addition to the selection this command initializes
RSOC using the selected battery profile and the 1st sampled
voltage during initial sequence. Refer to Before RSOC
(0x04) section about the voltage.
Time
Figure 13. Example of TSENSE1 and TSENSE2
Voltage at Temperature Measurement
Alarm Low RSOC (0x13)
The ALARMB pin will output low level and the bit 9 of
BatteryStatus register (0x19) will be set to 1 when RSOC
(0x0D) falls below this value. ALARMB pin will be
released from low when RSOC value rises than this value.
But the bit 9 keeps 1 until it is written or Power−on reset. Set
this register to 0 to disable. Figure 15.
Application
Battery Pack
PACK+
TSENSE
T
LC709204F
PACK-
A capacitor across a thermistor
Figure 14. An Example of a Capacitor Across
the Thermistor
RSOC (0x0D)
This register contains rescaled RSOC in 1%. It is same as
ITE (0x0F) when Termination current rate (0x1C) and
Empty Cell Voltage (0x1D) are default values.
When this register is written in Operational mode the data
may be updated by following two behaviors of the LSI. One
is the automatic convergence to close RSOC to actual value
Figure 15. Alarm Low RSOC
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12
LC709204F
Table 10. BATTERY PROFILE VS. REGISTER
Battery
Type
Nominal / Rated
Number of the Parameter
(0x1A)
Change of the
Parameter (0x12)
Voltage
IC Type
Charging Voltage
LC709204FXE−01TBG
01
04
05
06
07
3.7 V
4.2 V
0x1001
0x00
0x01
0x02
0x03
0x04
UR18650ZY (Panasonic)
ICR18650−26H (SAMSUNG)
3.8 V
4.35 V
4.4V
3.85V
Alarm Low Cell Voltage (0x14)
is released from low. When it is switched from Sleep mode
to Operational mode RSOC calculation is continued by
using the data which was measured in the previous
Operational mode.
The ALARMB pin will output low level and the bit 11 of
BatteryStatus register (0x19) will be set to 1 if Cell Voltage
(0x09) falls below this value. ALARMB pin will be released
from low if VDD rises than this value. But the bit 11 keeps 1
until it is written or Power−on reset. Set this register to 0 to
disable. Figure 16.
Status Bit (0x16)
This register controls temperature measurement with
external thermistors. Bit 0 of this register controls
TSENSE1 thermistor and bit 1 controls TSENSE2. When
the bits are set to 1 the LSI measures temperature with the
attached thermistor and loads the temperature into the Cell
Temperature or Ambient Temperature register. When the
bits are set to 0 the LSI stops the measurement.
CycleCount (0x17)
This register contains the number of charging and
discharging cycles of a battery. The cycle is counted as “1”
when the total decrement of RSOC reaches 100%. The count
is started with 0 after battery insertion. Figure 17.
Figure 16. Alarm Low Cell Voltage
IC Power Mode (0x15)
The LSI has two power modes. Operational mode (0x15
= 01) or Sleep mode (0x15 = 02). In the Operational mode
all functions operate with full calculation and tracking of
RSOC during charge and discharge. In the Sleep mode only
2
Figure 17. CycleCount
I C communication functions is enable and ALARMB pin
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LC709204F
BatteryStatus (0x19)
(0.02C). The arrival of RSOC to the maximum value
becomes early when this value exceeds 0x02. This register
produces an offset between ITE and RSOC on full charge
side. See Figure 19. This offset value is calculated according
to battery profile and this register value.
This register contains different alarm and estimated states
of the battery. See Table 11. Each alarm bit is set to 1 when
each alarm condition is satisfied. The bits which are set to 1
once will keep 1 even if the alarm conditions are resolved.
Set the alarm bits to 0 after having confirmed the cause of the
alarm.
Empty Cell Voltage (0x1D)
Set the minimum battery voltage when RSOC is 0% in
mV. When this LSI detects that Cell Voltage (0x09) is lower
than Empty Cell Voltage (0x1D) it will set the ITE (0x0F)
value of the moment to ITE Offset (0x1E) automatically. See
Figure 18. RSOC (0x0D) is rescaled so that it is 0% when
ITE (0x0F) is equal to ITE Offset (0x1E). Following
formulas indicate the update conditions of ITE Offset
(0x1E).
Status bit 6 that is Discharging reports estimated state of
the battery. It means that a battery is discharged for 1 and
charged for 0.
Status bit 7 that is INITIALIZED helps that an application
processor detects the power−on reset of LSI on battery
insertion. The bit is set to 1 after power−on reset. Then the
processor can detect the power−on reset if it has set the bit
to 0 after previous power−on reset.
Cell Voltage (0x09) < Empty Cell Voltage (0x1D) (eq. 3)
ITE (0x0F) > ITE Offset (0x1E) (eq. 4)
Table 11. BATTERY STATUS
Cell Temperature (0x08) > 0x0AAC(05C) (eq. 5)
Set this register to 0 not to update ITE Offset (0x1E)
automatically.
ALARMB
control
Initial
value
BIT
15
14
13
12
11
10
9
Function
High Cell Voltage
Reserved
ALARM
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
n
−
Reserved
−
High Temperature
Low Cell Voltage
Reserved
n
n
−
Empty Cell Voltage
Low RSOC
Low Temperature
INITIALIZED
Discharging
Reserved
n
n
−
ITE Offset
8
7
STATUS
6
−
Discharging time
5
−
Figure 18. Empty Cell Voltage and ITE Offset in
Discharging
4
Reserved
−
3
Reserved
−
2
Reserved
−
RSOC without rescalling
RSOC with rescalling
100
90
80
70
60
50
40
30
20
10
0
1
Reserved
−
0
Reserved
−
Number of the Parameter (0x1A)
Full charge offset
The register contains identity of installed battery profile.
ITE Offset
Termination Current Rate (0x1C)
Set the termination current rate in charging when RSOC
(0x0D) arrives at 100% in 0.01C. (i.e. the set value is 0x02
for 3000mAh design capacity and 60mA termination
current.) The installed battery profiles are designed so that
ITE (0x0F) arrives at 0x3E8 when the battery current rate in
charging decreases to 0.02C.
0
100 200 300 400 500 600 700 800 900 1000
ITE
Figure 19. Rescaled RSOC by ITE Offset and
Termination Current Rate
Therefore ITE (0x0F) and RSOC (0x0D) will arrive at the
maximum value at the same time when this value is 0x02
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LC709204F
ITE Offset (0x1E)
Maximum Cell Voltage (0x2A)
This register is referred to transform ITE (0x0F) to RSOC
(0x0D). RSOC will be rescaled so that it is 0% when ITE
(0x0F) is equal to this register. See Figure 19. Refer to
Termination current rate section about the Full charge offset
in the figure.
There are two methods to update this register. One is to
write it directly. The other is an automatic update by Empty
Cell Voltage (0x1D). Refer to Empty Cell Voltage section
about it.
The maximum Cell Voltage (0x09) is stored. This register
will be updated whenever the higher voltage is detected. If
the lower voltage is written it can detect the higher voltage
than the written voltage again.
Minimum Cell Voltage (0x2B)
The minimum Cell Voltage (0x09) is stored. This register
will be updated whenever the lower voltage is detected. If
the higher voltage is written it can detect the lower voltage
than the written voltage again.
Alarm High Cell Voltage (0x1F)
Maximum Cell Temperature (TSENSE1) (0x2C)
The ALARMB pin will output low level and the bit 15 of
BatteryStatus register (0x19) register will be set to 1 when
Cell Voltage (0x09) rises than this value. ALARMB pin will
be released from low when Cell Voltage falls below this
value. But the bit 15 keeps 1 until it is written or Power−on
reset. Set this register to 0 to disable.
The maximum Cell Temperature (0x08) is stored. This
register will be updated whenever the higher temperature is
detected. If the lower temperature is written it can detect the
higher temperature than the written temperature again.
Minimum Cell Temperature (TSENSE1) (0x2D)
The minimum Cell Temperature (0x08) is stored. This
register will be updated whenever the lower temperature is
detected. If the higher temperature is written it can detect the
lower temperature than the written temperature again.
Alarm Low Temperature (0x20)
The ALARMB pin will output low level and the bit 8 of
BatteryStatus register (0x19) will be set to 1 when Cell
Temperature (0x08) falls below this value. ALARMB pin
will be released from low when Cell Temperature rises than
this value. But the bit 8 keeps 1 until it is written or Power−on
reset. Set this register or Bit 0 of Status Bit (0x16)to 0 to
disable.
Ambient Temperature (TSENSE2) (0x30)
This register contains the ambient temperature from
−30°C (0×0980) to +80°C (0×0DCC) measured in 0.1°C
units. When Bit 1 of Status Bit (0x16) is 1 the LSI measures
the attached thermistor and loads the temperature into the
Ambient Temperature register. The operation is the same as
TSENSE1.
Ambient Temperature is not used for battery gauging.
Therefore a temperature measurement of any place is
possible.
Alarm High Temperature (0x21)
The ALARMB pin will output low level and the bit 12 of
BatteryStatus register (0x19) will be set to 1 when Cell
Temperature (0x18) rises than this value. ALARMB pin will
be released from low when Cell Temperature falls below this
value. But the bit 12 keeps 1 until it is written or Power−on
reset. Set this register or Bit 0 of Status Bit (0x16) to 0 to
disable.
State of Health (0x32)
This register contains State of Health of a battery in 1%
unit. After the battery insertion, this register is started at
100%. It decreases by deterioration of the battery.
TotalRuntime (0x24, 0x25)
This register contains an elapsed time of Operational
mode after battery insertion in minutes. The LSI stops the
counting when it reaches 0xFFFFFF. When this register is
written it starts counting from the written value. It doesn’t
count in Sleep mode.
User ID (0x36, 0x37)
This register contains 32bits data written in built−in
NVM. It is usable for various purposes. Refer to an
application note about how to write the NVM.
Accumulated Temperature (0x26, 0x27)
HG−CVR2
In Operational mode this register accumulates Cell
Temperature (0x08) value per minute. It stops the
accumulating when it reaches 0xFFFFFFFF. When this
register is written it starts accumulating from the written
value. It doesn’t count in Sleep mode.
Hybrid Gauging by Current-Voltage Tracking with
Internal Resistance
HG−CVR2 is onsemi’s unique method which is used to
calculate accurate RSOC. HG−CVR2 first measures battery
voltage and temperature. Precise reference voltage is
essential for accurate voltage measurement. LC709204F has
accurate internal reference voltage circuit with little
temperature dependency.
Accumulated RSOC (0x28, 0x29)
In Operational mode this register accumulates RSOC
(0x0D) value per minute. It stops the accumulating when it
reaches 0xFFFFFFFF. When this register is written it starts
accumulating from the written value. It doesn’t count in
Sleep mode.
It also uses the measured battery voltage and internal
impedance and Open Circuit Voltage (OCV) of a battery for
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15
LC709204F
Automatic Convergence of the Error
the current measurement. OCV is battery voltage without
load current. The measured battery voltage is separated into
OCV and varied voltage by load current. The varied voltage
is the product of load current and internal impedance. Then
the current is determined by the following formulas.
A problem of coulomb counting method is the fact that the
error is accumulated over time − This error must be
corrected. The general gauges using coulomb counting
method must find an opportunity to correct it.
This LSI with HG−CVR2 has the feature that the error of
RSOC converges autonomously, and doesn’t require
calibration opportunities. The error constantly converges in
the value estimated from the Open Circuit Voltage.
Figure 20 shows the convergent characteristic example
from the initialize error.
Also, coulomb counting method cannot detect accurate
residual change because the amount of the current from
self-discharge is too small but HG−CVR2 is capable to deal
with such detection by using the voltage information.
V(VARIED) + V(MEASURED) * OCV
(eq. 6.)
V(VARIED)
I +
(eq. 7.)
R(INTERNAL)
Where V(VARIED) is varied voltage by load current,
V(MEASURED) is measured voltage, R(INTERNAL) is
internal impedance of a battery. Detailed information about
the internal impedance and OCV is installed in the LSI. The
internal impedance is affected by remaining capacity,
load-current, temperature, and more. Then the LSI has the
information as look up table. HG−CVR2 accumulates
battery coulomb using the information of the current and a
steady period by a high accuracy internal timer. The
remaining capacity of a battery is calculated with the
accumulated coulomb.
Simple and Quick Setup
In general, it is necessary to obtain multiple parameters for
a fuel gauge and it takes a lot of resource and additional
development time of the users. One of the unique features of
LC709204F is very small number of parameters to be
prepared by the beginning of battery measurement – the
minimum amount of parameter which users may make is
one because Adjustment pack application register has to
have one. Such simple and quick start-up is realized by
having multiple profile data in the LSI to support various
types of batteries. Please contact your local sales office to
learn more information on how to measure a battery that
cannot use already-prepared profile data.
How to Identify Aging
By repeating discharge/charge, internal impedance of
a battery will gradually increase, and the Full Charge
Capacity (FCC) will decrease. In coulomb counting method
RSOC is generally calculated using the FCC and the
Remaining Capacity (RM).
RM
RSOC +
100%
(eq. 8.)
FCC
Then the decreased FCC must be preliminarily measured
with learning cycle. But HG−CVR2 can measure the RSOC
of deteriorated battery without learning cycle. The internal
battery impedance that HG−CVR2 uses to calculate the
current correlates highly with FCC. The correlation is based
on battery chemistry. The RSOC that this LSI reports using
the correlation is not affected by aging.
Low Power Consumption
Low power consumption of 2.0 mA is realized in the
Operation mode. This LSI monitors charge/discharge
condition of a battery and changes the sampling rate
according to its change of current. Power consumption
reduction without deteriorating its RSOC accuracy was
enabled by utilizing this method.
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16
LC709204F
TYPICAL CHARACTERISTICS
NOTE: This Graph is the example for starting point 90% (includes 30−32% error).
Figure 20. Convergent Characteristic from the Initialize Error
Reset
Initialization
Sleep Mode
VDD
V
RR
T
INT
(Not to Scale)
Figure 21. Power On Timing Diagram
Power-on Reset/Battery Insertion Detection
When this LSI detects battery insertion, it is reset
automatically. Once the battery voltage exceeds over the
that the LSI receives battery temperature from an
application processor. In the figure Mandatory settings to
measure RSOC are enclosed in sold line. Optional settings
to use each required function are enclosed in dotted line.
Set some mandatory or optional parameters at the
beginning. RSOC (0x0D) is updated to the value
corresponding to a selected battery profile after Change of
the Parameter command (0x12). Then set the LSI to
Operational mode. At the end of starting flow set
INITIALIZED bit to 0. An application processor can detect
whether the LSI was reinitialized by reading the bit. (For
example, for turn−off by Lib−protection IC) Repeat this
starting flow again if this bit is changed to 1.
V , it will release RESET status and will complete LSI
RR
initialization within T
to enter into Sleep mode. All
INIT
2
registers are initialized after Power-on reset. Then I C
communication can be started. Figure 21.
Measurement Starting Flow
After the initialization users can start battery
measurement by writing appropriate value into the registers
by following the flow shown in Figure 22−23. Figure 22
shows Thermistor mode that the LSI measures battery
2
temperature with thermistors. Figure 23 shows I C mode
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17
LC709204F
Mandatory settings
Optional settings
XXXX
XXXX
Power On
Write APA
Write 0xZZZZ
Write 0x00ZZ
Write Termination
current rate
to register 0x0B.
to register 0x1C.
Write 0x000Z
Write 0xZZZZ
Write Change Of
The Parameter
Write Empty Cell
Voltage
to register 0x12.
Select a battery profile.
to register 0x1D.
Write 0xZZZZ
Write alarm thresholds
Write TSENSE1
Thermistor B
Write alarm
thresholds
to register 0x06.
to 0x13/0x14/0x1F-0x21.
Write 0xZZZZ
Write 0x0001
Write TSENSE2
Thermistor B
Write IC Power
mode
to register 0x0E.
to register 0x15.
Set Operational mode.
Write 0xZZZZ
Write 0x0000
Write
BatteryStatus
to register 0x0C.
to register 0x19.
Reset INITILAIZED bit.
Write APT
Write 0x000Z
Initialization End
to register 0x16.
Set thermistor mode.
Write Status Bit
Figure 22. Starting Flow at Thermistor Mode
Mandatory settings
XXXX
Power On
Write APA
Optional settings
XXXX
Write 0xZZZZ
Write alarm thresholds
Write alarm
thresholds
to register 0x0B.
to 0x13/0x14/0x1F-0x21.
Write 0x000Z
Write 0x0001
Write Change Of
The Parameter
Write IC Power
mode
to register 0x12.
Select a battery profile.
to register 0x15.
Set Operational mode.
Write 0x00ZZ
Write 0x0000
Write Termination
current rate
Write
BatteryStatus
to register 0x1C.
to register 0x19.
Reset INITILAIZED bit.
Write 0xZZZZ
Write Empty Cell
Voltage
Initialization End
to register 0x1D.
Figure 23. Starting Flow at I2C Mode
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18
LC709204F
Layout Guide
Figure 24 shows the recommended layout pattern around
LC709204F. Place CVDD and CREG capacitor near the
LSI. Short−pin with TSENSE2 and NF1 to pull out
TSENSE2 is permitted.
The resistance of the Power paths between Battery or
Battery Pack and the LSI affects the gauging. Place the LSI
to minimize the resistance. But the resistance of the paths
which is connected to only this LSI doesn’t affect it.
PACK+
TSENSE1
TSENSE2
TEST2
SCL
VDD
NF2
NF1
REG
VSS
SDA
TEST1
CREG
ALARMB
PACK-
Figure 24. Layout Pattern Example Around LC709204F (Top View)
Application
PACK+
Battery
Application
LC709204F
or
processor
Battery Pack
PACK −
The Power paths that the resistance should be minimized
Figure 25. Position to Connect LC709204F on Power Supply Lines
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19
LC709204F
Table 12. ORDERING INFORMATION
Device
†
Package
Shipping
LC709204FXE−01TBG
WLCSP12, 1.48x1.91x0.51
(Pb-Free / Halogen Free)
5,000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
2
onsemi is licensed by the Philips Corporation to carry the I C bus protocol. All other brand names and product names
appearing in this document are registered trademarks or trademarks of their respective holders.
www.onsemi.com
20
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WLCSP12, 1.48x1.91x0.51
CASE 567XE
ISSUE A
DATE 22 FEB 2019
GENERIC
MARKING DIAGRAM*
XXXX = Specific Device Code
*This information is generic. Please refer to
A
= Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
XXXXXXXX
AWLYYWW
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON99809G
WLCSP12, 1.48x1.91x0.51
PAGE 1 OF 1
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
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, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
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