LM321SN3T1G [ONSEMI]
Operation Amplifier, Single-Channel;
| 型号： | LM321SN3T1G |
| 厂家： | 
ONSEMI |
| 描述： | Operation Amplifier, Single-Channel |
| 文件： | 总11页 (文件大小：620K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Single Channel Operational
Amplifier
LM321
LM321 is a general purpose, single channel op amp with internal
compensation and a true differential input stage. This op amp features
a wide supply voltage ranging from 3 V to 32 V for single supplies and
1.5 to 16 V for split supplies, suiting a variety of applications.
LM321 is unity gain stable even with large capacitive loads up to
1.5 nF. LM321 is available in a space-saving TSOP−5/SOT23−5
package.
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5
1
Features
TSOP−5
CASE 483
• Wide Supply Voltage Range: 3 V to 32 V
• Short Circuit Protected Outputs
• True Differential Input Stage
• Low Input Bias Currents
PIN CONNECTION
• Internally Compensated
IN+
VEE
IN−
1
2
3
5
4
VCC
OUT
• Single and Split Supply Operation
• Unity Gain Stable with 1.5 nF Capacitive Load
• This Device is Pb-Free, Halogen Free/BFR Free and is RoHS
Compliant
Typical Applications
• Gain Stage
MARKING DIAGRAM
• Active Filter
5
• Signal Processing
ADYAYWG
G
1
ADY = Specific Device Code
A
Y
W
G
= Assembly Location
= Year
= Work Week
= Pb-Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
†
Device
Package
Shipping
3000 / Tape & Reel
LM321SN3T1G
TSOP−5
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
October, 2019 − Rev. 4
LM321/D
LM321
Table 1. ABSOLUTE MAXIMUM RATINGS (Over operating free-air temperature, unless otherwise stated)
Parameter
Rating
Unit
Supply Voltage
36
V
INPUT AND OUTPUT PINS
Input Voltage
V
EE
– 0.3 to 32
10
V
Input Current
mA
Output Short Circuit Duration (Note 1)
TEMPERATURE
Continuous
Operating Temperature
Storage Temperature
Junction Temperature
ESD RATINGS (Note 2)
Human Body Model (HBM)
Charged Device Model (CDM)
Machine Model (MM)
OTHER RATINGS
–40 to +125
–65 to +150
–65 to +150
°C
°C
°C
200
800
100
V
V
V
Latch-Up Current (Note 3)
MSL
100
mA
Level 1
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Short circuits can cause excessive heating and eventual destruction.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per JEDEC standard: JESD22−A114
ESD Machine Model tested per JEDEC standard: JESD22−A115
3. Latch-up Current tested per JEDEC standard: JESD78
Table 2. THERMAL INFORMATION (Note 4)
Parameter
Junction to Ambient
Symbol
Package
Value
Unit
q
TSOP−5/SOT23−5
235
°C/W
JA
2
4. As mounted on an 80 × 80 × 1.5 mm FR4 PCB with 650 mm and 2 oz (0.034 mm) thick copper heat spreader. Following JEDEC
JESD/EIA 51.1, 51.2, 51.3 test guidelines.
Table 3. RECOMMENDED OPERATING CONDITIONS
Parameter
Supply Voltage (V − V
Symbol
Range
3 to 32
Unit
V
)
V
S
CC
EE
Specified Operating Range
Common Mode Input Voltage Range
T
−40 to 85
°C
V
A
V
CM
V
to V −1.7
EE CC
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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2
LM321
Table 4. ELECTRICAL CHARACTERISTICS − VS = 5 V
(At T = +25°C, R = 10 kW connected to mid-supply, V
= V
= mid-supply, unless otherwise noted.
A
L
CM
OUT
Boldface limits apply over the specified temperature range, T = –40°C to 85°C, guaranteed by characterization and/or design.)
A
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Symbol
Conditions
Min
Typ
Max
Unit
V
OS
V = 5 V, V
= V to V – 1.7 V
mV
S
CM
T = 25°C
EE
CC
−
−
0.3
−
7
9
A
A
T = –40°C to 85°C
Offset Voltage Drift vs Temp
Input Bias Current
DV /DT
T = –40°C to 85°C
−
7
−
mV/°C
OS
A
I
IB
T = 25°C
−
−
−10
−
−
−500
nA
A
T = –40°C to 85°C
A
Input Offset Current
I
T = 25°C
A
−
−
1
−
−
150
nA
OS
A
T = –40°C to 85°C
Common Mode Rejection Ratio
Input Resistance
CMRR
V
= V to V – 1.7 V
65
85
−
dB
CM
EE
CC
R
Differential
Common Mode
−
−
85
300
−
−
GW
IN
Input Capacitance
C
Differential
Common Mode
−
−
0.6
1.6
−
−
pF
IN
OUTPUT CHARACTERISTICS
Open Loop Voltage Gain
Open Loop Output Impedance
Output Voltage High
A
−
−
100
−
−
dB
W
VOL
Z
f = UGBW, I = 0 mA
1,200
OUT_OL
O
V
R = 2 kW to V
V
V
–1.8
V
V
−1.4
−1.4
−
−
V
OH
L
EE
CC
CC
CC
CC
−1.8
R = 10 kW to V
L
EE
Output Voltage Low
V
OL
R = 10 kW to V
−
V
EE
+0.8
V +1.0
EE
V
L
CC
Output Current Capability
I
O
Sinking Current
mA
V
S
V
S
= 5 V
10
10
20
20
−
−
= 15 V
Output Current Capability
I
O
Sourcing Current
mA
V
S
V
S
= 5 V
20
20
40
40
−
−
= 15 V
Capacitive Load Drive
NOISE PERFORMANCE
Voltage Noise Density
DYNAMIC PERFORMANCE
Gain Bandwidth Product
Gain Margin
C
Phase Margin = 15°
−
1,500
−
pF
L
e
N
f
IN
= 1 kHz
−
40
−
nV/√Hz
GBWP
C = 25 pF, R to V
−
−
−
−
750
14
−
−
−
−
kHz
dB
L
L
CC
CC
CC
A
C = 25 pF, R to V
L L
M
M
Phase Margin
a
C = 25 pF, R to V
60
°
L
L
Slew Rate
SR
C = 25 pF, R = ∞
0.3
V/ms
L
L
POWER SUPPLY
Power Supply Rejection Ratio
Quiescent Current
PSRR
V
= 5 V to 32 V
62
100
−
dB
S
I
Q
No Load
−
0.25
0.5
mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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3
LM321
Table 5. ELECTRICAL CHARACTERISTICS − VS = 32 V
(At T = +25°C, R = 10 kW connected to mid-supply, V
= V
= mid-supply, unless otherwise noted.
A
L
CM
OUT
Boldface limits apply over the specified temperature range, T = –40°C to 85°C, guaranteed by characterization and/or design.)
A
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Symbol
Conditions
Min
Typ
Max
Unit
V
OS
V = 32 V, V = V to V – 1.7 V
mV
S
CM
EE
CC
T = 25°C
−
−
0.3
−
7
9
A
A
T = –40°C to 85°C
Offset Voltage Drift vs Temp
Common Mode Rejection Ratio
OUTPUT CHARACTERISTICS
Open Loop Voltage Gain
DV /DT
T = –40°C to 85°C
−
−
7
−
−
mV/°C
OS
A
CMRR
V
CM
= V to V – 1.7 V
100
dB
EE
CC
A
VOL
T = 25°C
−
84
100
−
−
−
dB
A
T = –40°C to 85°C
A
Open Loop Output Impedance
Output Voltage High
Z
f = UGBW, I = 0 mA
−
2,000
−
W
OUT_OL
O
V
OH
R = 2 kW to V
V
V
−2.5
V
CC
V
CC
−2.0
−1.5
−
−
V
L
EE
CC
CC
−2.5
R = 10 kW to V
L
EE
Output Voltage Low
V
OL
R = 10 kW to V
−
V
EE
+1.0
V +1.5
EE
V
L
CC
Capacitive Load Drive
NOISE PERFORMANCE
Voltage Noise Density
C
Phase Margin = 15°
−
1,500
−
pF
L
e
N
f
IN
= 1 kHz
−
−
40
−
−
nV/√Hz
Total Harmonic Distortion +
Noise
THD+N
V = 30 V, f = 1 kHz, R to V
CC
0.02
%
S
IN
L
DYNAMIC PERFORMANCE
Gain Bandwidth Product
Gain Margin
GBWP
C = 25 pF, R to V
−
−
−
−
900
18
−
−
−
−
kHz
dB
L
L
CC
CC
CC
A
M
C = 25 pF, R to V
L L
Phase Margin
a
C = 25 pF, R to V
66
°
M
L
L
Slew Rate
SR
C = 25 pF, R = ∞
0.4
V/ms
L
L
POWER SUPPLY
Power Supply Rejection Ratio
Quiescent Current
PSRR
V
= 5 V to 32 V
62
100
0.3
−
dB
S
I
Q
No Load, V = 32 V
−
1.2
mA
S
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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4
LM321
TYPICAL CHARACTERISTICS
120
100
80
270
240
210
180
110
V
V
V
V
V
V
= 3 V, Gain
= 5 V, Gain
= 32 V, Gain
= 3 V, Phase
= 5 V, Phase
= 32 V, Phase
S
S
S
S
S
S
V
V
V
= 3 V
= 5 V
= 32 V
S
S
S
100
90
80
70
60
50
40
30
60
40
20
150
120
0
90
60
PHASE MARGIN
−20
20
10
R
C
= 10 kW
L
L
−40
−60
30
0
= 25 pF
0
10
100
1k
10k
100k
1M
10M
10
100
1k
10k
100k
1M
Frequency (Hz)
Frequency (Hz)
Figure 1. Open Loop Gain and Phase Margin vs. Frequency
Figure 2. CMRR vs. Frequency
4
0.1
0.08
0.06
0.04
0.02
0.0
V
= 10 V
V
= 5.0 V
= 10 kW
= 15 pF
S
S
Input
Output
Input
Output
R
C
= 10 kW
= 15 pF
3
R
C
L
L
L
L
2
1
0
−0.02
−0.04
−1
−2
−0.06
−0.08
−0.1
−3
−4
−10
0
10 20 30 40 50 60 70 80 90 100
−2
0
2
4
6
8
10
12
14
Time (ms)
Time (ms)
Figure 3. Inverting Large Signal Step Response
Figure 4. Inverting Small Signal Step Response
1000
60
V
V
V
= 3 V
= 5 V
= 32 V
A = 11 V/V
V
S
S
S
V
V
V
= 3 V
= 5 V
= 32 V
S
S
S
R
= 10 kW
L
50
40
100
30
20
10
0
10
1
10
100
1k
10k
100k
100
200
300
500
1000
1500
Frequency (Hz)
Load Capacitance (pF)
Figure 5. Phase Margin vs. Load Capacitance
Figure 6. Voltage Noise Density vs. Frequency
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5
LM321
TYPICAL CHARACTERISTICS
1000
100
10
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
V
V
V
= 3 V
= 5 V
= 32 V
S
S
S
10
100
1k
10k
100k
−40
−20
0
20
40
60
80
100
Frequency (Hz)
Temperature (5C)
Figure 7. THD+N vs. Frequency
Figure 8. Quiescent Current vs. Temperature
0.8
0.6
0.4
0.8
0.6
0.4
0.2
0.0
0.2
0.0
V
= 3 V
V
= 5 V
S
S
−0.2
−0.4
−0.6
−0.2
−0.4
−0.6
T= −40°C
T= 25°C
T= 85°C
T= −40°C
T= 25°C
T= 85°C
0
0.1 0.2 0.25 0.5 0.7
1
1.25 1.3 1.4 1.5
0
0.5
1
1.5
2
2.5
3
3.5
Common Mode Voltage (V)
Common Mode Voltage (V)
Figure 9. Input Offset Voltage vs. Common
Mode Voltage at 3 V Supply
Figure 10. Input Offset Voltage vs. Common
Mode Voltage at 5 V Supply
10
8
0.8
0.6
0.4
V
= V /2
S
CM
I
I
I
IB−
IB+
OS
6
4
2
0.2
0.0
0
−2
−4
−6
−8
−10
V
= 32 V
S
−0.2
−0.4
−0.6
T= −40°C
T= 25°C
T= 85°C
0
5
10
15
20
25
30
−40
−20
0
20
40
60
80
100
Common Mode Voltage (V)
Temperature (5C)
Figure 11. Input Offset Voltage vs. Common
Mode Voltage at 32 V Supply
Figure 12. Input Bias and Offset Current vs.
Temperature
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LM321
TYPICAL CHARACTERISTICS
3.0
2.5
2.0
1.5
1.0
0.5
1400
1200
1000
800
600
400
V
= 3 V
V
= 3 V
S
S
T= −40°C
T= 25°C
T= 85°C
T= −40°C
T= 25°C
T= 85°C
200
0
0
0
5
10
15
20
25
30
0
5
10
15
20
Output Source Current (mA)
Output Sink Current (mA)
Figure 13. High Level Output Voltage Swing vs.
Output Current at 3 V Supply
Figure 14. Low Level Output Voltage Swing vs.
Output Current at 3 V Supply
1800
1600
1400
1200
1000
800
5.0
V
= 5 V
S
4.5
4.0
3.5
3.0
T= −40°C
T= 25°C
T= 85°C
2.5
2.0
1.5
1.0
0.5
0
600
V
= 5 V
S
400
T= −40°C
T= 25°C
T= 85°C
200
0
0
5
10
15
20
25
30
0
5
10
15
20
Output Source Current (mA)
Output Sink Current (mA)
Figure 15. High Level Output Voltage Swing vs.
Output Current at 5 V Supply
Figure 16. Low Level Output Voltage Swing vs.
Output Current at 5 V Supply
8
5.0
V
= 32 V
V
= 32 V
S
S
4.5
4.0
3.5
3.0
7
6
5
4
3
2
1
0
T= −40°C
T= 25°C
T= 85°C
T= −40°C
T= 25°C
T= 85°C
2.5
2.0
1.5
1.0
0.5
0
0
5
10
15
20
25
30
0
3
6
9
12 15 18
21 24 27 30
Output Source Current (mA)
Output Sink Current (mA)
Figure 17. High Level Output Voltage Swing vs.
Output Current at 32 V Supply
Figure 18. Low Level Output Voltage Swing vs.
Output Current at 32 V Supply
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7
LM321
APPLICATION INFORMATION
CIRCUIT DESCRIPTION
splitting the collectors of Q20 and Q18. Another feature of
this input stage is that the input common mode range can
include the negative supply or ground, in single supply
operation, without saturating either the input devices or the
differential to single−ended converter. The second stage
consists of a standard current source load amplifier stage.
Each amplifier is biased from an internal−voltage
regulator which has a low temperature coefficient thus
giving each amplifier good temperature characteristics as
well as excellent power supply rejection.
The LM321 is made using two internally compensated,
two−stage operational amplifiers. The first stage of each
consists of differential input devices Q20 and Q18 with input
buffer transistors Q21 and Q17 and the differential to single
ended converter Q3 and Q4. The first stage performs not
only the first stage gain function but also performs the level
shifting and transconductance reduction functions. By
reducing the transconductance, a smaller compensation
capacitor (only 5.0 pF) can be employed, thus saving chip
area. The transconductance reduction is accomplished by
Output
Bias Circuitry
V
CC
Q15
Q22
Q16
Q14
Q13
40 k
Q19
5.0 pF
Q12
Q24
25
Q23
Q20
Q21
Q18
Q17
Inputs
Q11
Q9
Q25
Q6 Q7
Q26
Q2
Q5
Q1
2.0 k
2.4 k
Q8
Q10
Q3
Q4
V
EE
/Gnd
Figure 19. LM321 Representative Schematic Diagram
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8
LM321
VCC
LM321 has a class B output stage, which is comprised of
push−pull transistors. This type of output is inherently
subject to crossover distortion near mid−rail where neither
push or pull transistors are conducting. Several techniques
can be used to minimize crossover distortion. Connecting
the output load to either the positive or negative supply rail
instead of mid−rail can reduce the crossover distortion.
Additionally, increasing the load resistance relatively
decreases the amount of crossover distortion.
OUT
VEE
Figure 20. Simplified Class B Output
Figure 21. Sine wave with crossover distortion
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9
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSOP−5
CASE 483
ISSUE N
5
1
DATE 12 AUG 2020
SCALE 2:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
NOTE 5
5X
D
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15 PER SIDE. DIMENSION A.
5. OPTIONAL CONSTRUCTION: AN ADDITIONAL
TRIMMED LEAD IS ALLOWED IN THIS LOCATION.
TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2
FROM BODY.
0.20 C A B
2X
0.10
T
M
5
4
3
2X
0.20
T
B
S
1
2
K
B
A
DETAIL Z
G
A
MILLIMETERS
TOP VIEW
DIM
A
B
C
D
MIN
2.85
1.35
0.90
0.25
MAX
3.15
1.65
1.10
0.50
DETAIL Z
J
G
H
J
K
M
S
0.95 BSC
C
0.01
0.10
0.20
0
0.10
0.26
0.60
10
3.00
0.05
H
SEATING
PLANE
END VIEW
C
_
_
SIDE VIEW
2.50
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT*
1.9
5
1
5
0.074
0.95
XXXAYWG
XXX MG
0.037
G
G
1
Analog
Discrete/Logic
2.4
0.094
XXX = Specific Device Code XXX = Specific Device Code
A
Y
W
G
= Assembly Location
= Year
= Work Week
M
G
= Date Code
= Pb−Free Package
1.0
0.039
= Pb−Free Package
(Note: Microdot may be in either location)
0.7
0.028
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
mm
inches
ǒ
Ǔ
SCALE 10:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ARB18753C
TSOP−5
PAGE 1 OF 1
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