LV3313PM-TLM-E [ONSEMI]

Electronic Volume IC for Car Audio Systems; 电子音量IC,适用于汽车音响系统
LV3313PM-TLM-E
型号: LV3313PM-TLM-E
厂家: ONSEMI    ONSEMI
描述:

Electronic Volume IC for Car Audio Systems
电子音量IC,适用于汽车音响系统

音频控制集成电路 消费电路 商用集成电路 信息通信管理 电子 汽车音响 PC
文件: 总18页 (文件大小:123K)
中文:  中文翻译
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Ordering number : ENA1257  
LV3313PM  
Bi-CMOS LSI  
Electronic Volume IC  
for Car Audio Systems  
http://onsemi.com  
Overview  
The LV3313PM is an electronic volume IC that implements a rich set of audio control functions including input  
selection switching function, an input gain, volume, loudness, balance, fader, and bass/treble control.  
Features  
Zero-cross switching circuits (Input gain control block and Volume control block) can switch signal detection  
location automatically.  
Zero-cross switching circuits (Input gain control block and Volume control block) and soft mute circuits used for low  
noise even when input signals are present.  
Low power consumption due to the use of BiMOS process.  
All functions are controlled using serial data (CCB).  
Functions  
Input selector :  
Four input signals can be selected (three single-ended inputs and one differential input).  
Input gain control :  
The input signal can be amplified by 0dB to +18dB (1dB steps).  
Loudness control :  
Taps are output starting at the -32dB position of the ladder resistor and a loudness function implemented with  
external capacitor and resistor components.  
Volume control : +10dB to -79dB/-(1dB steps)  
L/R independent control.  
Bass control : +12dB to -12dB in 2dB steps  
Treble control : +12dB to -12dB in 2dB steps  
Fader control :  
The fader volume can be attenuations by one of 16 levels. Independent control each four channels. (A total of 16  
settings with attenuations of 0dB to -2dB in 1dB steps, -2dB to -20dB in 2dB steps, and -30dB, -45dB, - 60dB and  
-dB settings.)  
Mute  
CCB is ON Semiconductor® ’s original format. All addresses are managed  
by ON Semiconductor® for this format.  
CCB is a registered trademark of Semiconductor Components Industries, LLC.  
Semiconductor Components Industries, LLC, 2013  
May, 2013  
71608 MS PC 20080625-S00005 No.A1257-1/18  
LV3313PM  
Specifications  
Absolute Maximum Ratings at Ta = 25C, V = 0V  
SS  
Parameter  
Maximum supply voltage  
Maximum input voltage  
Allowable power dissipation  
Symbol  
Conditions  
Ratings  
V
Unit  
V
V
max  
V
9.5  
DD  
DD  
DD  
All input pins  
V
max  
-0.3 to V  
SS  
V
IN  
Pd max  
Ta 85C, when mounted on a printed circuit  
600  
mW  
board *  
Operating temperature  
Storage temperature  
Topr  
Tstg  
-40 to +85  
C  
C  
-50 to +125  
* Specified circuit board : 114.3 76.1 1.6mm3 : glass epoxy board  
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating  
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.  
Allowable Operating Ratings at Ta = 25C, V = 0V  
SS  
Ratings  
typ  
Parameter  
Symbol  
Conditions  
Unit  
min  
7.0  
3.0  
max  
9.0  
Supply voltage  
V
V
8.0  
V
V
DD  
DD  
High-level input voltage  
Low-level input voltage  
Input voltage amplitude  
Input pulse width  
Setup time  
V
CL, DI, CE  
CL, DI, CE  
5.5  
1.0  
IH  
V
V
V
IL  
SS  
V
V
V
Vp-p  
s  
s  
s  
kHz  
s
IN  
SS  
1
DD  
TW  
Tsetup  
Thold  
fopg  
tr  
CL  
CL, DI, CE  
CL, DI, CE  
CL  
1
1
Hold time  
Operating frequency  
Rising time  
500  
CL, DI, CE  
0.1/fopg  
Falling time  
tf  
Electrical Characteristics at Ta = 25°C, V  
DD  
= 8V, V = 0V  
SS  
Ratings  
typ  
Parameter  
Symbol  
Conditions  
Unit  
min  
max  
Input block  
Input resistance  
Rin  
Gin min  
Gi max  
ATerr  
BAL  
L1-L3, R1-R3  
L1-L3, R1-R3  
35  
50  
65  
+1.0  
+19  
k  
dB  
dB  
dB  
dB  
Minimum input gain  
Maximum input gain  
Inter-step setting error  
Left/Right balance  
Volume block  
-1.0  
+17  
-1.0  
-0.5  
0
+18  
+1.0  
+0.5  
Input resistance  
Rvr  
ATerr  
BAL  
LVRIN, RVRIN  
+10dB to -40dB  
35  
-0.5  
-0.5  
50  
12  
12  
50  
65  
+0.5  
+0.5  
k  
dB  
dB  
Inter-step setting error  
Left/Right balance  
Bass block  
Bass control range  
Inter-step setting error  
Left/Right balance  
Treble block  
Gb max  
ATerr  
BAL  
max. boost/cut  
-10dB to +10dB  
10  
-0.5  
-0.5  
14  
+0.5  
+0.5  
dB  
dB  
dB  
Treble control range  
Inter-step setting error  
Left/Right balance  
Fader block  
Gb max  
ATerr  
BAL  
max. boost/cut  
-10dB to +10dB  
10  
-0.5  
-0.5  
14  
+0.5  
+0.5  
dB  
dB  
dB  
Input resistance  
Rfed  
35  
-0.5  
-1.0  
-2.0  
-3.0  
-0.5  
65  
+0.5  
+1.0  
+2.0  
+3.0  
+0.5  
k  
dB  
dB  
dB  
dB  
dB  
Inter-step setting error  
ATerr  
0dB to -2dB  
-4dB to -20dB  
-30dB  
-45dB  
Left/Right balance  
BAL  
0dB to -30dB  
No.A1257-2/18  
LV3313PM  
Overall Characteristics at Ta = 25°C, V  
= 8V, V = 0V  
SS  
DD  
Ratings  
typ  
Parameter  
Symbol  
Conditions  
Unit  
min  
-1.0  
max  
+1.0  
A loss of insertion  
ATT  
THD  
CT  
dB  
%
Total harmonic distortion  
Inter-input crosstalk  
V
= 1Vrms, f = 1kHz  
= 1Vrms, f = 1kHz  
= 1Vrms, f = 1kHz  
= 1Vrms, f = 1kHz  
0.004  
88  
0.01  
IN  
V
80  
80  
80  
dB  
IN  
Left/Right channel crosstalk  
Maximum attenuation  
Output noise voltage  
Current drain  
CT  
V
88  
dB  
IN  
V
min  
V
88  
dB  
O
IN  
VN  
10  
25  
23  
10  
V  
I
16  
mA  
A  
DD  
Input high-level current  
Input low-level current  
Maximum input voltage  
I
CL, DI, CE, V = 5.5V  
IN  
IH  
I
CL, DI, CE, V = 0V  
IN  
-10  
A  
IL  
VCL  
THD = 1% RL = 10k  
2.2  
50  
Vrms  
all controls flat, f = 1kHz  
IN  
Common-mode rejection ratio  
CMRR  
V
= 1Vrms, f = 1kHz  
dB  
IN  
Package Dimensions  
unit : mm (typ)  
3148A  
13.2  
10.0  
44  
1
0.8  
0.35  
0.2  
(1.0)  
QIP44M(10X10)  
No.A1257-3/18  
LV3313PM  
Pin Assignment  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
L3 34  
L2 35  
L1 36  
22 LFOUT  
21 LROUT  
20 AV  
SS  
V
37  
19 CE  
DD  
MUTE 38  
TEST 39  
PH 40  
18 DI  
17 CL  
LV3313PM  
16 OSC  
15 VREG  
Top view  
VREF 41  
R1 42  
14 DV  
SS  
R2 43  
13 RROUT  
12 RFOUT  
R3 44  
1
2
3
4
5
6
7
8
9
10  
11  
No.A1257-4/18  
LV3313PM  
Block Diagram  
22  
21  
20  
19 18 17 16  
15  
14 13  
12  
LFIN  
RFIN  
23  
11  
10  
9
LVROUT  
LF1C3  
LF1C2  
LF1C1  
RVROUT  
RF1C3  
RF1C2  
RF1C1  
24  
25  
26  
27  
8
7
LF3C1  
RF3C1  
28  
6
RCT  
LCT  
29  
5
LVRIN  
RVRIN  
RSELO  
30  
31  
4
3
LSELO  
L4P  
L4M  
R4P  
R4M  
32  
33  
2
1
34 35 36  
37  
38 39 40 41 42 43 44  
No.A1257-5/18  
LV3313PM  
Application Circuit  
0.1μF  
4.7kΩ  
68kΩ  
1μF 1μF  
220pF  
2700pF  
0.1μF 0.1μF  
+
+
1μF  
10μF  
+
+
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
+
PA  
PA  
34 L3  
LFOUT 22  
LROUT 21  
+
1μF  
+
10μF  
35 L2  
+
1μF  
+
10μF  
36 L1  
AV  
20  
SS  
1μF  
37 V  
CE 19  
DI 18  
CL 17  
DD  
38 MUTE  
39 TEST  
40 PH  
μCOM  
+
0.47μF  
+
OSC 16  
41 VREF  
42 R1  
VREG 15  
+
1μF  
22μF  
+
14  
DV  
SS  
1μF  
+
PA  
PA  
43 R2  
RROUT 13  
RFOUT 12  
+
10μF  
1μF  
+
44 R3  
+
10μF  
1μF  
1
2
3
4
5
6
7
8
9
10  
11  
+
+
1μF  
+
+
0.1μF 0.1μF  
2700pF  
1μF 1μF  
10μF  
220pF  
68kΩ  
4.7kΩ  
0.1μF  
No.A1257-6/18  
LV3313PM  
Control System Timing and Data Format  
The LV3313PM is controlled by applying the stipulated data to the CL, DI and CE pins. The data consists of a total of 104  
bits, of which 8 bits are the device address, 96 bits are the control data.  
CE  
B0  
B1 B2 B3 A0 A1 A2 A3  
D0  
D1 D2 D3 D4 D5  
D90 D91 D92 D93 D94 D95  
DI  
CL  
data  
1μs 1μs 1μs  
min  
1μs  
min  
CE  
CL  
DI  
min min  
1μs  
min  
1μs T  
DEST  
tr  
CE  
CL  
DI  
tr  
tf  
tr, tf  
Send to data  
Address code  
Data setting (96bit)  
D0 to D95  
B0 to B3, A0 to A3  
Address code  
B0  
B1  
0
B2  
0
B3  
0
A0  
0
A1  
0
A2  
0
A3  
1
1
No.A1257-7/18  
LV3313PM  
Data setting  
Input switching control  
D0  
D1  
D2  
0
Operation  
INIT  
0
0
1
0
0
L1 (R1)  
L2 (R2)  
L3 (R3)  
L4 (R4)  
0
1
0
1
1
0
0
0
1
Input gain control  
D3  
D8  
0
D4  
D9  
0
D5  
D10  
0
D6  
D11  
0
D7  
D12  
0
Lch  
Rch  
0dB  
1
0
0
0
0
+1dB  
+2dB  
+3dB  
+4dB  
+5dB  
+6dB  
+7dB  
+8dB  
+9dB  
+10dB  
+11dB  
+12dB  
+13dB  
+14dB  
+15dB  
+16dB  
+17dB  
+18dB  
0
1
0
0
0
1
1
0
0
0
0
0
1
0
0
1
0
1
0
0
0
1
1
0
0
1
1
1
0
0
0
0
0
1
0
1
0
0
1
0
0
1
0
1
0
1
1
0
1
0
0
0
1
1
0
1
0
1
1
0
0
1
1
1
0
1
1
1
1
0
0
0
0
0
1
1
0
0
0
1
0
1
0
0
1
No.A1257-8/18  
LV3313PM  
Volume control (10dB to -43dB)  
D13  
D21  
D14  
D22  
D15  
D23  
D16  
D24  
D17  
D25  
D18  
D26  
D19  
D27  
D20  
D28  
Lch  
Rch  
10dB  
9dB  
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8dB  
7dB  
6dB  
5dB  
4dB  
3dB  
2dB  
1dB  
0dB  
-1dB  
-2dB  
-3dB  
-4dB  
-5dB  
-6dB  
-7dB  
-8dB  
-9dB  
-10dB  
-11dB  
-12dB  
-13dB  
-14dB  
-15dB  
-16dB  
-17dB  
-18dB  
-19dB  
-20dB  
-21dB  
-22dB  
-23dB  
-24dB  
-25dB  
-26dB  
-27dB  
-28dB  
-29dB  
-30dB  
-31dB  
-32dB  
-33dB  
-34dB  
-35dB  
-36dB  
-37dB  
-38dB  
-39dB  
-40dB  
-41dB  
-42dB  
-43dB  
No.A1257-9/18  
LV3313PM  
Volume control (-44dB to -)  
D13  
D14  
D15  
D23  
D16  
D24  
D17  
D25  
D18  
D26  
D19  
D27  
D20  
D28  
Lch  
D21  
D22  
Rch  
-44dB  
-45dB  
-46dB  
-47dB  
-48dB  
-49dB  
-50dB  
-51dB  
-52dB  
-53dB  
-54dB  
-55dB  
-56dB  
-57dB  
-58dB  
-59dB  
-60dB  
-61dB  
-62dB  
-63dB  
-64dB  
-65dB  
-66dB  
-67dB  
-68dB  
-69dB  
-70dB  
-71dB  
-72dB  
-73dB  
-74dB  
-75dB  
-76dB  
-77dB  
-78dB  
-79dB  
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-  
No.A1257-10/18  
LV3313PM  
Tone block  
Treble  
GAIN  
D29  
D33  
D30  
D34  
D31  
D35  
D32  
Lch  
D36  
Rch  
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1
1
0
0
0
1
1
0
0
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
+12dB  
+10dB  
+8dB  
+6dB  
+4dB  
+2dB  
0dB  
-2dB  
-4dB  
-6dB  
-8dB  
-10dB  
-12dB  
Bass  
GAIN  
D37  
D41  
D38  
D42  
D39  
D43  
D40  
D44  
Lch  
Rch  
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1
1
0
0
0
1
1
0
0
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
+12dB  
+10dB  
+8dB  
+6dB  
+4dB  
+2dB  
0dB  
-2dB  
-4dB  
-6dB  
-8dB  
-10dB  
-12dB  
No.A1257-11/18  
LV3313PM  
Fader block  
D45  
D51  
D57  
D63  
D46  
D52  
D58  
D64  
D47  
D53  
D59  
D65  
D48  
D54  
D60  
D66  
D49  
D55  
D61  
D67  
D50  
D56  
D62  
D68  
LFOUT  
LROUT  
RFOUT  
RROUT  
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0dB  
-1dB  
-2dB  
-4dB  
-6dB  
-8dB  
-10dB  
-12dB  
-14dB  
-16dB  
-18dB  
-20dB  
-30dB  
-45dB  
-60dB  
-  
Loudness control  
D69  
Operation  
0
off  
on  
1
Zero cross control  
D70  
Operation  
0
off  
on  
1
Zero cross signal detection block control  
D71  
Operation  
Input gain  
Volume  
0
1
D72  
0
Operation  
Manual detection  
Automatic detection  
1
D73  
0
D74  
0
Zero-cross signal detection timer overflow settings  
D75  
D76  
Operation  
0
0
Timer time 10ms  
Timer time 20ms  
Timer time 40ms  
Timer time 80ms  
1
0
0
1
1
1
No.A1257-12/18  
LV3313PM  
Soft mute control  
D77  
Operation  
0
Soft mute mode off  
Soft mute mode on  
1
D78  
0
Operation  
mute set off  
mute set on  
1
D79  
0
D80  
Operation  
normal mode  
test mode  
0
0
1
Soft mute settling time select control  
D81  
D82  
Operation  
0
0
mute time 0.64ms  
mute time 5.12ms  
mute time 40ms  
mute time 80ms  
1
0
0
1
1
1
D83  
0
D84  
0
D85  
0
D86  
0
D87  
0
Test mode block  
D88  
D89  
0
D90  
0
D91  
0
D92  
0
D93  
0
D94  
0
D95  
0
0
No.A1257-13/18  
LV3313PM  
Pin Functions  
Pin No.  
Pin name  
Function  
Single end input pins.  
Equivalent Circuit  
36  
35  
34  
42  
43  
44  
L1  
V
DD  
L2  
L3  
+
-
R1  
R2  
R3  
LVref  
RVref  
33  
32  
1
L4M  
L4P  
R4M  
R4P  
Differential input pins.  
V
V
DD  
DD  
M
P
2
-
+
LVref  
RVref  
31  
3
LSELO  
RSELO  
Input selector output pins.  
V
DD  
+
-
30  
4
LVRIN  
RVRIN  
Main volume input pins.  
V
DD  
+
-
LVref  
RVref  
29  
5
LCT  
RCT  
Loudness function pins.  
V
DD  
24  
10  
LVROUT  
RVROUT  
Tone output pins.  
V
V
DD  
-
+
23  
11  
LFIN  
RFIN  
Fader block input pins.  
Drive at low impedance.  
DD  
22  
21  
12  
13  
LFOUT  
LROUT  
RFOUT  
RROUT  
Fader output pins.Attenuation is possible  
separately for the front end and rear end.  
V
DD  
-
+
Continued on next page.  
No.A1257-14/18  
LV3313PM  
Continued from preceding page.  
Pin No.  
41  
Pin name  
Vref  
Function  
Connect a capacitor of a few tens of uF  
between Vref and AV (V ) as a 0.55   
Equivalent Circuit  
V
DD  
SS SS  
voltage generator, current ripple  
V
DD  
-
countermeasure.  
+
LVref  
RVref  
15  
VREG  
Internal logic voltage pin.  
V
DD  
-
+
37  
20  
38  
V
Power supply pin.  
Ground pin.  
DD  
AV  
SS  
MUTE  
External muting control pin.  
V
DD  
Setting this pin to V  
SS  
level sets forcibly fader  
volume block to -level.  
27  
26  
25  
7
Capacitor connection pins for configuring  
equalizer bass band filter.  
LF1C1  
LF1C2  
LF1C3  
RF1C1  
RF1C2  
RF1C3  
V
DD  
Connect a capacitor between LF1C1 (RF1C1)  
and LF1C2 (RF1C2), and between  
LF1C2 (RF1C2) and LF1C3 (RF1C3).  
+
-
8
9
V
V
DD  
DD  
F1C1  
F1C2  
F1C3  
V
DD  
Vref  
28  
6
Capacitor connection pins for configuring  
equalizer treble band filter.  
LF3C1  
RF3C1  
V
DD  
Connect a high band compensation capacitor  
between LF3C1 (RF3C1) and V  
.
F3C1  
SS  
17  
18  
19  
CL  
DI  
Input pin for serial data and clock used for  
control.  
V
DD  
CE  
Chip enable pin.Data is written to the internal  
latch and the analog switches are operated  
when the level changes from High to Low. Data  
transfer is enabled when the level is High.  
Continued on next page.  
No.A1257-15/18  
LV3313PM  
Continued from preceding page.  
Pin No.  
39  
Pin name  
TEST  
Function  
Equivalent Circuit  
IC test pin.  
Normally this pin is OPEN.  
Logic system ground pin.  
14  
16  
DV  
SS  
External oscillat input pin.  
Normally this pin is OPEN.  
OSC  
V
DD  
40  
Automatic zero cross detection pin.  
PH  
V
DD  
No.A1257-16/18  
LV3313PM  
Usage Cautions  
(1) Data Transmission at power on  
The status of internal analog switches is unstable at power on. Therefore, perform muting or some other  
countermeasure until the data has been set.  
At power on, initial setting data must be sent once in order to stabilize the bias of each block in a short time.  
(2) Description of zero cross switching circuit operation  
The LV3313PM have a function to switch zero cross comparator signal detection locations, enabling the selection of  
the optimum detection location for blocks whose data is to be updated.Basically, the switching noise can be  
minimized by inputting the signal immediately following the block whose data is to be updated to the zero cross  
comparator, so it is necessary to switch the detection location every time.  
Input gain  
Volume  
Switch  
Zero cross  
comparator  
LV3313PM zero cross detection circuit  
(3) Zero Cross Switching Control method  
The zero cross switching control method consists of setting the zero cross control bits to the zero cross detection mode,  
and specifying the detection blocks before transmitting the data. These control bits are latched immediately following  
data transfer, that is to say beforehand in sync with the falling edge of CE, so when updating data of volumes, etc., it  
is possible to perform mode setting and zero cross switching with one data transfer.  
(4) Soft mute operation  
The LV3313PM have a soft mute function for low switching noise, when this mute function set operation.  
(mute/unmute function select)  
The Soft mute time can be selected by send to CCB control. (0.6ms, 5ms, 40ms, 80ms)  
A soft mute function can be implemented by set to soft mute on. (Set to mute on/off)  
Soft mute time  
Soft mute time  
No.A1257-17/18  
LV3313PM  
ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number  
of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at  
www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no  
warranty, representation or guarantee regarding the suitabilityof its products for any particular purpose, nor does SCILLC assume any liability arising out of the  
application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental  
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual  
performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical  
experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use  
as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in  
which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for  
any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors  
harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or  
death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the  
part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PS No.A1257-18/18  

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