LV8702V [ONSEMI]

PWM Current Control High-efficient Stepper Motor Driver;
LV8702V
型号: LV8702V
厂家: ONSEMI    ONSEMI
描述:

PWM Current Control High-efficient Stepper Motor Driver

电动机控制 CD 光电二极管
文件: 总27页 (文件大小:399K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
LV8702V  
Bi-CDMOS LSI  
www.onsemi.com  
PWM Current Control High-efficient  
Stepper Motor Driver  
Overview  
The LV8702V is a 2-channel Full-bridge driver IC that can drive a stepper  
motor driver, which is capable of micro-step drive and supports quarter  
step. Current is controlled according to motor load and rotational speed at  
half step, half step full-torque and quarter step excitation, thereby highly  
efficient drive is realized. Consequently, the reduction of power  
consumption, heat generation, vibration and noise is achieved.  
Feature  
SSOP44J (275mil)  
Built-in 1ch PWM current control stepper motor driver (bipolar type)  
Ron (High-side Ron: 0.3, Low-side Ron: 0.25, total: 0.55, Ta = 25ºC, I = 2.5A)  
O
Micro-step mode is configurable as follows: full step/half step full-torque/half step/quarter step  
Excitation step moves forward only with step signal input  
Built-in output short protection circuit (latch method)  
Control power supply is unnecessary  
Built-in high-efficient drive function (supports half step full-torque/half step/quarter step excitation mode)  
Built-in step-out detection function (Step-out detection may not be accurate during high speed rotation)  
BiCDMOS process IC  
I max=2.5A  
O
Built-in thermal shut down circuit  
Typical Applications  
Printer  
Scanner  
Surveillance camera (CCTV)  
Textile machine  
ORDERING INFORMATION  
See detailed ordering and shipping information on page 27 of this data sheet.  
© Semiconductor Components Industries, LLC, 2014  
December 2014 - Rev. 2  
1
Publication Order Number :  
LV8702V/D  
LV8702V  
Specifications  
Absolute Maximum Ratings at Ta = 25C  
Parameter  
Power supply voltage  
Output peak current  
Output current  
Symbol  
max  
Conditions  
Ratings  
Unit  
V
V
VM , VM1 , VM2  
36  
M
I
I
peak  
max  
tw 10ms , duty 20% , Per 1ch  
3
2.5  
A
O
O
Per 1ch  
A
Logic input voltage  
V
GMG1, GMG2 , GAD , FR , STEP , ST ,  
RST , MD1 , MD2 , OE , GST1 , GST2  
0.3 to +6  
V
IN  
DST1, DST2, MONI,  
Vdst1, Vdst2,  
Pd max  
Topr  
0.3 to +6  
5.5  
V
Allowable power dissipation  
Operating temperature  
Storage temperature  
*
W
C  
C  
40 to +85  
55 to +150  
Tstg  
* Specified board : 90.0mm 90.0mm 1.6mm, glass epoxy 4-layer board, with backside mounting.  
.
Caution 1) Absolute maximum ratings represent the value which cannot be exceeded for any length of time.  
Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current,  
high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details.  
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,  
damage may occur and reliability may be affected.  
Recommended Operating Range at Ta = 25C  
Parameter  
Range of power supply voltage  
Logic input voltage  
Symbol  
Conditions  
Ratings  
Unit  
V
V
V
VM , VM1 , VM2  
9 to 32  
0 to 5.5  
M
GMG1 , GMG2 , GAD , FR , STEP , ST ,  
RST , MD1 , MD2 , OE , GST1 , GST2  
V
IN  
Range of VREF input voltage  
VREF  
0 to 3  
V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended  
Operating Ranges limits may affect device reliability.  
Electrical Characteristics at Ta = 25°C, V = 24V, VREF = 1.5V  
M
Ratings  
typ  
Parameter  
Symbol  
IMstn  
Conditions  
Unit  
min  
max  
400  
Consumption current during  
standby  
ST = ”L” , I(VM)+I(VM1)+I(VM2)  
110  
A  
Consumption current  
IM  
ST = ”H”, OE = ”L”, STEP = ”L”, non-load  
I(VM)+I(VM1)+I(VM2)  
4.5  
6.5  
mA  
VREG5 output voltage  
Thermal shutdown temperature  
Thermal hysteresis width  
Motor driver  
VREG5  
TSD  
I
= -1mA  
4.5  
5
180  
40  
5.5  
V
O
Design certification  
Design certification  
150  
210  
C  
C  
TSD  
Output on resistor  
Ronu  
Rond  
I
I
= 2.5A, Source-side Ron  
= 2.5A, Sink-side Ron  
0.3  
0.4  
0.33  
50  
O
0.25  
O
Output leak current  
I
leak  
VM = 32V  
ID = -2.5A  
A  
V
O
Forward diode voltage  
Logic pin input current  
VD  
1.2  
8
1.4  
12  
I
I
L
V
V
= 0.8V  
= 5V  
GMG1, GMG2, GAD, FR,  
STEP, ST, RST, MD1,  
MD2, OE, GST1, GST2  
4
A  
A  
IN  
IN  
H
30  
50  
70  
IN  
IN  
ADIN pin input voltage  
Vadin  
Ra2 = 100k: refer to 15-4)  
0
2.0  
0
12  
5.5  
0.8  
V
V
V
Logic input  
voltage  
High  
Low  
V
V
H
L
GMG1 , GMG2 , GAD , FR , STEP , ST ,  
RST , MD1 , MD2 , OE , GST1 , GST2  
IN  
IN  
Continued on next page.  
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2
LV8702V  
Continued from preceding page.  
Ratings  
typ  
Parameter  
Symbol  
Conditions  
Unit  
min  
290  
max  
310  
Current  
quarter step  
Vtdac0_W  
Vtdac1_W  
Vtdac2_W  
Vtdac3_W  
Vtdac0_H  
Vtdac2_H  
Vtdac0_HF  
Vtdac2’_HF  
Vtdac2’_F  
Fchop  
Step0 (initial status, 1ch comparator level)  
Step1 (initial + 1)  
300  
276  
210  
114  
300  
210  
300  
300  
300  
50  
mV  
mV  
mV  
mV  
mV  
mV  
mV  
mV  
mV  
kHz  
A  
selection  
reference  
voltage level  
264  
199  
106  
290  
199  
290  
290  
290  
35  
288  
221  
122  
310  
221  
310  
310  
310  
65  
Step2 (initial + 2)  
Step3 (initial + 3)  
half step  
Step0 (initial status, 1ch comparator level)  
Step2 (initial + 1)  
half step  
Step0 (initial status, 1ch comparator level)  
Step2’ (initial + 1)  
(full-torque)  
full step  
Step2’ (initial status, 1ch comparator level)  
Cchop = 200pF  
Chopping frequency  
CHOP pin charge/discharge  
current  
Ichop  
7
10  
13  
Chopping oscillator circuit  
threshold voltage  
Vtup  
0.8  
0.4  
1
1.2  
0.6  
V
V
Vtdown  
Iref  
0.5  
VREF pin input current  
VREF = 1.5V  
0.5  
A  
DST1, DST2, MONI,  
SST pin saturation voltage  
Charge pump  
Idst1 = Idst2 = Imoni = Isst = 1mA  
400  
mV  
VG output voltage  
Rise time  
VG  
28  
90  
28.7  
125  
29.8  
0.5  
V
tONG  
VG = 0.1F , Between CP1-CP2 0.1uF  
ST=”H” VG=VM+4V  
mS  
Oscillator frequency  
Fosc  
160  
kHz  
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be  
indicated by the Electrical Characteristics if operated under different conditions.  
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3
LV8702V  
Package Dimensions  
unit : mm  
SSOP44J (275mil) Exposed Pad  
CASE 940AG  
ISSUE A  
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4
LV8702V  
SOLDERING FOOTPRINT*  
(Unit: mm)  
(7.8)  
0.65  
0.32  
NOTES:  
1. The measurements are for reference only, and unable to guarantee.  
2. Please take appropriate action to design the actual Exposed Die Pad and Fin portion.  
3. After setting, verification on the product must be done.  
(Although there are no recommended design for Exposed Die Pad and Fin portion Metal mask and shape  
for ThroughHole pitch (Pitch & Via etc), checking the soldered joint condition and reliability verification of  
soldered joint will be needed. Void gradient insufficient thickness of soldered joint or bond degradation  
could lead IC destruction because thermal conduction to substrate becomes poor.)  
*For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor  
Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.  
GENERIC  
MARKING DIAGRAM*  
XXXXXXXXXX  
YMDDD  
XXXXX = Specific Device Code  
Y = Year  
M = Month  
DDD = Additional Traceability Data  
Pd max -- Ta  
6.0  
Four-layer circuit board *1  
5.5  
5.0  
Four-layer circuit board *2  
4.0  
3.0  
2.0  
3.8  
2.9  
2.0  
1.0  
0
*1 With components mounted on the exposed die-pad board  
*2 With no components mounted on the exposed die-pad board  
--40  
--20  
0
20  
40  
60  
80  
100  
Ambient temperature, Ta -- C  
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5
LV8702V  
Substrate specifications (Substrate recommended for operation of LV8702V)  
Size  
Material  
: 90mm × 90mm × 1.6mm (Four-layer substrate)  
: Glass epoxy  
Copper wiring density : L1 = 85%, L2 = 90%  
L1: Copper wiring pattern diagram  
L2: Copper wiring pattern diagram  
L3: GND layer  
L4: Power supply layer  
Cautions  
1) The data for the case with the Exposed Die-Pad substrate mounted shows the values when 90% or more of the  
Exposed Die-Pad is wet.  
2) For the set design, employ the derating design with sufficient margin.  
Stresses to be derated include the voltage, current, junction temperature, power loss, and mechanical stress such as  
vibration, impact, and tension.  
Accordingly, the design must ensure these stresses to be as low or small as possible.  
The guideline for ordinary derating is shown below:  
(1)Maximum value 80% or less for the voltage rating  
(2)Maximum value 80% or less for the current rating  
(However this does not apply to high efficiency drive because operating current is lower than the setting current.)  
(3)Maximum value 80% or less for the temperature rating  
3) After the set design, be sure to verify the design with the actual product.  
Confirm the solder joint state and verify also the reliability of solder joint for the Exposed Die-Pad, etc.  
Any void or deterioration, if observed in the solder joint of these parts, causes deteriorated thermal conduction,  
possibly resulting in thermal destruction of IC.  
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6
LV8702V  
Pin Assignment  
SWOUT  
CP2  
1
2
3
4
5
6
7
8
9
44 VM  
43 VG  
CP1  
42 PGND1  
41 OUT1A  
40 OUT1A  
39 VM1  
GMG2  
GMG1  
GAD  
FR  
38 VM1  
STEP  
ST  
37 RF1  
36 RF1  
RST 10  
ADIN 11  
MD2 12  
MD1 13  
VREG5 14  
DST2 15  
DST1 16  
MONI 17  
OE 18  
35 OUT1B  
34 OUT1B  
33 OUT2A  
32 OUT2A  
31 RF2  
LV8702V  
30 RF2  
29 VM2  
28 VM2  
27 OUT2B  
26 OUT2B  
25 PGND2  
24 GST1  
23 GST2  
SST 19  
CHOP 20  
VREF  
SGND  
21  
22  
Top view  
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LV8702V  
Block Diagram  
VM  
Charge pump  
PGND  
regulator  
VREG5  
Output control logic  
MONI  
-
-
+
+
Current  
Current  
(W1-2/1-2/  
1-2Full/2)  
(W1-2/1-2/  
1-2Full/2)  
+
-
attenuat  
VREF  
CHOP  
Oscillator  
SST  
TSD  
LVS  
DST1  
DST2  
Signal  
processor2  
Signal  
processor1  
High-efficient drive ctrl logic  
SGND  
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8
LV8702V  
Pin Functions  
Pin No.  
Pin name  
SWOUT  
CP2  
Description  
1
2
Control signal output pin  
Capacitor connection pin for charge pump  
Capacitor connection pin for charge pump  
Driving capability margin adjuster pin  
Driving capability margin adjuster pin  
High-efficient drive switching pin  
Forward/ reverse signal input pin  
STEP signal input pin  
3
CP1  
4
GMG2  
GMG1  
GAD  
5
6
7
FR  
8
STEP  
ST  
9
Chip enable pin  
10  
RST  
RESET signal input pin  
11  
ADIN  
MD2  
Control signal input pin  
12  
Excitation mode switching pin  
Excitation mode switching pin  
Capacitor connection pin for internal power supply  
Drive status warning output pin  
Drive status warning output pin  
Position detection monitor pin  
Output enable signal input pin  
Motor stop detection output pin  
13  
MD1  
14  
VREG5  
DST2  
DST1  
MONI  
OE  
15  
16  
17  
18  
19  
SST  
20  
CHOP  
VREF  
SGND  
GST2  
GST1  
PGND2  
OUT2B  
VM2  
Capacitor connection pin for chopping frequency setting  
Constant current control reference voltage input pin  
Signal GND  
21  
22  
23  
Boost-up adjuster pin  
24  
Boost-up adjuster pin  
25  
2ch power GND  
26, 27  
28, 29  
30, 31  
32, 33  
34, 35  
36, 37  
38, 39  
40, 41  
42  
2ch OUTB output pin  
2ch motor power supply connection pin  
2ch current sense resistor connection pin  
2ch OUTA output pin  
RF2  
OUT2A  
OUT1B  
RF1  
1ch OUTB output pin  
1ch current sense resistor connection pin  
1ch motor power supply connection pin  
1ch OUTA output pin  
VM1  
OUT1A  
PGND1  
VG  
1ch power GND  
43  
Capacitor connection pin for charge pump  
Motor power supply connection pin  
44  
VM  
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LV8702V  
Pin Description  
Pin No.  
Pin name  
Equivalent Circuit  
4
5
GMG2  
GMG1  
GAD  
FR  
VREG5  
6
7
8
STEP  
RST  
10  
12  
13  
18  
23  
24  
MD2  
MD1  
OE  
10k  
GST2  
GST1  
100k  
GND  
VREG5  
9
ST  
20k  
10k  
80k  
GND  
25  
PGND2  
OUT2B  
VM2  
38 39  
28 29  
26, 27  
28, 29  
30, 31  
32, 33  
34, 35  
36, 37  
38, 39  
40, 41  
42  
RF2  
OUT2A  
OUT1B  
RF1  
VM1  
OUT1A  
PGND1  
40 41  
32 33  
34 35  
26 27  
10k  
25  
500  
500  
42  
37  
31  
36  
30  
GND  
Continued on next page.  
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10  
LV8702V  
Continued from preceding page.  
Pin No.  
Pin name  
Equivalent Circuit  
44  
2
3
CP2  
CP1  
VG  
3
2
43  
VREG5  
43  
44  
VM  
100  
GND  
VREG5  
21  
VREF  
500  
GND  
14  
VREG5  
VM  
2k  
80k  
26k  
GND  
15  
16  
17  
19  
DST2  
DST1  
MONI  
SST  
VREG5  
100k  
GND  
Continued on next page.  
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11  
LV8702V  
Continued from preceding page.  
Pin No.  
20  
Pin name  
Equivalent Circuit  
CHOP  
VREG5  
500  
500  
GND  
1
SWOUT  
VM  
PGND1  
PGND2  
11  
ADIN  
VM  
2pF  
2k  
2pF  
100k  
GND  
22  
SGND  
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12  
LV8702V  
Operation description  
Input Pin Function  
Each input terminal has the function to prevent the flow of the current from an input to a power supply.  
Therefore, even if a power supply(VM) is turned off in the state that applied voltage to an input terminal,  
the electric current does not flow into the power supply.  
1. Chip enable function  
The mode of the IC is switched with ST pin between standby and operation mode. In standby mode, the IC is set to  
power saving mode and all the logics are reset. During standby mode, the operation of the internal regulator circuit and  
the charge pump circuit are stopped.  
ST  
“L” or OPEN  
“H”  
mode  
Internal regulator  
Charge pump  
Standby mode  
Operation mode  
standby  
standby  
operation  
operation  
2. STEP pin function  
The excitation step progresses by inputting the step signal to the STP pin.  
Input  
Operation mode  
ST  
L or OPEN  
H
STEP  
X*  
Standby mode  
Excitation step forward  
H
Excitation step keep  
* Don’t care  
3. Input timing  
RST  
Tds1  
(RST STEP)  
Tsteph Tstepl  
STEP  
Tds1  
Tdh1  
MD)  
(MD STEP) (STEP  
MD1/  
MD2  
Tds1  
Tdh1  
(FR  
STEP) (STEP  
FR)  
FR  
OE  
Tds1  
Tdh1  
(OE  
STEP) (STEP  
OE)  
Tds2  
(GAD  
Tdh2  
STEP) (STEPGAD)  
GAD  
Tds2  
Tdh2  
(GMG  
STEP) (STEPGMG)  
GMG1/  
GMG2  
Tds2  
Tdh2  
(GST  
STEP) (STEPGST)  
GST1/  
GST2  
TstepH/TstepL : Clock H/L pulse width (min 12.5s)  
Tds1 : Data set-up time (min 12.5s)  
Tdh1 : Data hold time (min 12.5s)  
Tds2 : Data set-up time (min 25s)  
Tdh2 : Data hold time (min 25s)  
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LV8702V  
4. Position detection monitor function  
The MONI position detection monitoring pin is of an open drain type.  
When the excitation position is in the initial position, the MONI output is placed in the ON state.  
(Refer to "Examples of current waveforms in each micro-step mode.")  
5. Setting constant-current control reference current  
This IC is designed to automatically exercise PWM constant-current chopping control for the motor current by setting  
the output current. Based on the voltage input to the VREF pin and the resistance connected between RF and GND, the  
output current that is subject to the constant-current control is set using the calculation formula below:  
I
= (VREF/5)/RF resistance  
OUT  
The above setting is the output current at 100% of each excitation mode.  
For example, where VREF=1.5V and RF resistance 0.2, we obtain output current as follows.  
I
= 1.5V/5/0.2= 1.5A  
OUT  
When high-efficient drive function is on, I  
VREF.  
is adjusted automatically within the range of the current value set by  
OUT  
6. Reset function  
RST  
L or OPEN  
H
Operation mode  
Normal operation  
RESET status  
RST  
RESET  
STEP  
MONI  
1ch output  
2ch output  
0%  
Initial position  
When RST pin = “H”, the excitation position of the output is set to the initial position forcibly and MONI output is  
turned on. And then by setting RST = “L”, the excitation position moves forward with the next step signal.  
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LV8702V  
7. Output enable function  
OE  
Operation mode  
Output OFF  
Output ON  
H
L or OPEN  
OE  
Power save mode  
STEP  
MONI  
1ch output  
0%  
2ch output  
The output is in high-impedance state.  
When OE pin = “H”, the output is turned off forcibly and becomes a high-impedance output.  
However, since the internal logic circuit is in operation, an excitation position moves forward if step signal is input to  
STEP pin. Therefore, by setting back to OE = “L”, the output pin outputs signal based on the excitation position by  
step signal.  
8. Excitation mode setting function  
MD1 and MD2 pin set excitation mode of the stepper motor as follows.  
Initial position  
MD1  
MD2  
Excitation mode  
1ch  
2ch  
-100%  
0%  
L or OPEN  
L or OPEN  
full step excitation  
100%  
100%  
100%  
100%  
H
L or OPEN  
H
L or OPEN  
half step excitation  
H
H
quarter step excitation  
0%  
half step excitation  
(full-torque)  
0%  
The position of excitation mode is set to the initial position when: 1) a power is supplied and 2) counter is reset in each  
excitation mode.  
During full step excitation mode, high-efficient drive function is turned off even when GAD = “H”.  
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LV8702V  
9. Forward/reverse switching function  
FR  
L or OPEN  
H
Operation mode  
CW  
CCW  
FR  
CW mode  
CCW mode  
CW mode  
STEP  
Excitation position  
(1)  
(2)  
(3)  
(4)  
(5)  
(6)  
(5)  
(4)  
(3)  
(4)  
(5)  
1ch output  
2ch output  
The built-in DA converter moves forward by 1bit with the rise of step signal that is input to STEP pin.  
Also a mode is switched between CW and CCW by setting FR pin.  
In CW mode, the phase of 2ch current delays by 90° compared to that of 1ch current.  
In CCW mode the phase of 2ch current moves forward by 90° compared to 1ch current.  
10. Chopping frequency setting  
When you control constant current of this IC, chopping is performed using the frequency defined in the capacitor  
(Cchop) connected between CHOP pin and GND.  
The calculation for the value of chopping frequency is:  
Fchop = Ichop/ (Cchop×Vtchop×2) (Hz)  
Ichop: Capacitor charge and discharge current typ: 10A  
Vtchop: Charge and discharge hysteresis voltage (Vtup-Vtdown) typ: 0.5V  
For example, where Cchop = 200pF, we obtain Fchop as follows:  
Fchop = 10A/ (200pF×0.5V×2) = 50kHz  
11. Blanking time  
If you attempt to control PWM constant current chopping of the motor current, when the mode shifts from DECAY to  
CHARGE, noise is generated in sense resistor pin due to the recovery current of parasitic diode flowing into current  
sense resistor, and this may cause error detection. The blanking time avoids noise at mode switch. During the blanking  
time, even if noise is generated in sense resistor, a mode does not switch from CHARGE to DECAY.  
In this IC, the blanking time is fixed to approximately 1s.  
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LV8702V  
12. Output current vector locus (1step is normalized to 90)  
100  
,
θ2 (full step, half step full-torque)  
θ0  
θ1  
80  
60  
40  
20  
0
θ2  
θ3  
θ4  
100  
40  
2ch phase current ratio (%)  
80  
0
20  
60  
Setting current ration in each excitation mode  
STEP  
quarter step (%)  
half step (%)  
half step full-torque (%)  
1ch 2ch  
full step (%)  
1ch 2ch  
1ch  
2ch  
1ch  
2ch  
0  
1  
2  
3  
4  
100  
92  
70  
38  
0
0
38  
100  
70  
0
0
70  
100  
100  
0
0
100  
100  
70  
100  
100  
92  
100  
100  
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17  
LV8702V  
13. The example of current waveform in each micro-step mode  
full step (CW mode)  
STEP  
MONI  
(%)  
100  
l1  
I2  
0
-100  
(%)  
100  
0
-100  
half step full-torque (CW mode)  
STEP  
MONI  
(%)  
100  
I1  
I2  
0
-100  
(%)  
100  
0
-100  
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LV8702V  
half step (CW mode)  
STEP  
MONI  
(%)  
100  
I1  
I2  
0
-100  
(%)  
100  
0
-100  
quarter step (CW mode)  
STEP  
MONI  
(%)  
100  
I1  
0
-100  
(%)  
100  
I2  
0
-100  
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19  
LV8702V  
14. Current control operation specification  
(Sine wave increase)  
STEP  
Setting current  
Setting current  
Coil current  
Forced CHARGE  
fchop  
Current mode CHARGE  
SLOW  
FAST  
CHARGE  
SLOW FAST  
(Sine wave decrease)  
STEP  
Setting current  
Coil current  
Setting current  
Forced CHARGE  
fchop  
Current mode CHARGE  
SLOW  
FAST  
Forced CHARGE FAST  
CHARGE  
SLOW  
Each current mode is operated according to the following sequence.  
At rise of chopping frequency, the CHARGE mode begins. (In the time defined as the “blanking time,” the CHARGE  
mode is forced regardless of the magnitude of the coil current (ICOIL) and set current (IREF).)  
The coil current (ICOIL) and set current (IREF) are compared in this blanking time.  
When (ICOIL<IREF) state exists ;  
The CHARGE mode up to ICOIL IREF, then followed by changeover to the SLOW DECAY mode, and  
finally by the FAST DECAY mode for approximately 1s.  
When (ICOIL<IREF) state does not exist ;  
The FAST DECAY mode begins. The coil current is attenuated in the FAST DECAY mode till one cycle of  
chopping is over.  
Above operations are repeated. Normally, the SLOW (+FAST) DECAY mode continues in the sine wave increasing  
direction, then entering the FAST DECAY mode till the current is attenuated to the set level and followed by the SLOW  
DECAY mode.  
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20  
LV8702V  
15. High-efficient drive function  
This IC includes high-efficient drive function. When high-efficient drive function is turned on, I  
is adjusted  
OUT  
automatically within the current value set with VREF pin. When high-efficient drive function is turned off, the current  
value of I becomes the maximum value set by REF pin.  
OUT  
1) High-efficient drive enable function  
High-efficient drive function is switched on and off with GAD pin.  
However, in the case of full step excitation mode (MD1 = MD2 = “L”), even when GAD = “H”, high-efficient drive  
function is turned off.  
Even if you adjust the GMG1, GMG2 of 15-2) and GST1, GST2 of 15-3), in the case of abrupt motor acceleration  
or load variation to the extent that auto adjuster cannot follow up and eventually leads to the rotation stepping-out,  
it is recommended that you turn off the high-efficient drive function temporally. As high-efficient control may  
become unstable due to the control signal from the motor is unstable during low speed rotation, it is also  
recommended to turn off this function as well.  
GAD  
L or OPEN  
H
Operation mode  
Normal mode  
High-efficient mode  
(except for full step excitation mode)  
Recommended speed of high-efficient drive  
excitation  
Operating conditions  
HB motor/no-load  
PM motor/no-load  
HB motor/no-load  
PM motor/no-load  
Speed  
half step  
over 1500pps  
over 1000pps  
over 3000pps  
over 2500pps  
half step full-torque  
quarter step  
When there is a load, the high-efficient drive is enabled at slower speed.  
2) High-efficient drive margin adjuster function  
By setting GMG1 and GMG2 pin, margin for step-out is adjusted.  
Where GMG1 = GMG2 = “L”, I  
and consumption current are at the lowest. In some case, as the I  
OUT  
OUT  
becomes lower, the number of boost-up process* may increase triggered by slight change of load. With insufficient  
driving capability, you need to increase the margin setting. One way to set GMG1 and GMG2 is to minimize  
boost-up level, then lower the margin from high to low to optimize the margin where motor rotates stably.  
In the application where load variation is excessive, you need to have a larger margin.  
GMG1  
L or OPEN  
H
GMG2  
L or OPEN  
L or OPEN  
H
Setting  
Current consumption  
Load following capability  
Margin: small  
Margin: middle  
Margin: large  
Setting is inhibited  
Smallest  
Smaller  
Small  
-
Ordinary  
Good  
Better  
-
L or OPEN  
H
H
*: This is a function to increase I  
during high efficiency drive.  
rapidly as soon as a possible stepping out is detected due to load variation  
OUT  
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21  
LV8702V  
3) Boost-up adjuster function  
During high-efficient drive, boost-up adjuster function detects a possibility of step-out caused by such factors as  
abrupt load variation and then boosts up I at once (Boost-up process). You can set a level of boost-up by  
OUT  
setting GST1 and GST2 pins. One way to set GST1 and GST2 is to increase boost-up level from minimum to  
maximum within the maximum load condition and select the optimum boost-up setting where motor rotates without  
stepping out. Also, boost-up level varies depends on reference current defined by VREF. Therefore, you can  
increase load following capability by increasing VREF voltage.  
The higher the boost-up level is, the more the IC becomes tolerant for abrupt load variation. However, rotation  
stability may become poor (vibration and rotation fluctuation may occur) because excessively high boost-up level  
leads to rapid increase of I  
at load variation. You may be able to improve poor rotation stability with high  
OUT  
boost-up level by increasing high-efficient drive margin.  
GST1  
GST2  
Setting  
Increase of Iout  
load following capability  
Ordinary  
Rotation stability  
Best  
L or OPEN  
L or OPEN  
Boost-up level minimum  
{(VREF/5)/RF resistance}  
1/128  
H
L or OPEN  
H
L or OPEN  
Boost-up level low  
Boost-up level high  
{(VREF/5)/RF resistance}  
4/128  
Good  
Better  
Best  
Better  
Good  
H
H
{(VREF/5)/RF resistance}  
16/128  
Boost-up level maximum  
{(VREF/5)/RF resistance}  
64/128  
Ordinary  
4) External component  
The resistance value of Ra1, Ra2 (control signal resistors) is adjusted in such a way as to set the maximum SWOUT  
output voltage during motor rotation to 12V in ADIN pin. Preferably, resistance values of Ra1 and Ra2 are as high  
as possible to the extent that does not influence waveform. (Recommendation for Ra1: 15k, Ra2: 100k).  
In some motor where boost-up process occurs at a high speed rotation of 7000pps to 8000pps or higher (HB motor:  
Half step excitation), you can suppress boost-up by lowering Ra1. Moreover, you can achieve high efficiency at  
lower speed of 1500pps or lower by increasing resistance for Ra1 (HB motor: Half step excitation).  
Although it depends on a usage motor, step-out is detectable at higher speed rotation by attaching smaller resistor  
for Ra1.  
SWOUT  
Ra2  
ADIN  
Ca  
Ra1  
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22  
LV8702V  
5) Drive status warning function  
DST1 and DST2 are open-drain output. The driving status can be monitored through a status of DST1 and DST2  
pins. When step-out status is detected, DST1 is on for a period of 1 step. Likewise, when small step-out margin  
status is detected, DST2 turns on for the period of 1 step. In the case of output short status or overheat status, DST1  
and DST2 stay on until ST = “L”.  
Step-out status and small step-out margin status are detectable during high-efficient drive only. In some cases,  
step-out status may not be detected properly. Hence, make sure to verify the operation with the usage application.  
If step-out or small step-out margin status occur frequently, make sure to set a large high-efficient drive margin or  
higher boost-up level.  
DST1  
OFF  
ON  
DST2  
OFF  
OFF  
ON  
Status  
Normal status  
Step-out status *1(this function is enabled only in high-efficient drive)  
Small step-out margin status *2(this function is enabled only in high-efficient drive)  
Output short status or overheat status  
OFF  
ON  
ON  
*1: Although it depends on a usage motor, step-out is detectable at higher speed rotation by attaching smaller  
resistor for Ra1.  
*2: If DST2 alone is turned on, boost-up processing is performed.  
16. Output short protection circuit  
Output short protection circuit is included in this IC which sets an output to standby mode and turns on warning output.  
This protection circuit prevents IC destruction when the output is short due to power short or ground short.  
1) Operation overview  
When output short is detected, short detection circuit operates. If the short status continues for the period of internal  
timer (2s), the output of 1ch/ 2ch is turned off. If the short status exceeds the timer latch time (32s) set in the  
internal timer, the output is turned on again and detects short status again. If short is detected again, all the output of  
1ch/ 2ch are switched to standby mode and the status is kept. To cancel the standby status, set  
ST = “L”.  
2) Error status warning output pin (DST2, DST1)  
When the IC detects error status and protection circuit operates, DST2 pin and DST1 pin outputs the error status to  
CPU side.  
This pin is open-drain output. When error status is detected, DST2 and DST1 output turn on (DST2 = DST1 = “L”).  
DST2/DST1 pins are turned on in the following statuses:  
Error status  
DST2  
DST1  
Short is detected in 1ch side.  
Short is detected in 2ch side.  
When overheat is detected.  
ON  
ON  
ON  
ON  
ON  
ON  
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23  
LV8702V  
17. Charge pump circuit  
When ST pin is set to “H”, charge pump circuit operates and VG pin voltage increases from VM voltage to VM +  
VREG5 voltage. If the VG pin voltage is not boosted to VM+4V or more, the output pin cannot be turned on.  
Therefore it is recommended that the drive of motor is started after the time has passed tONG or more.  
ST  
VG pin voltage  
VM+VREG5  
VM+4V  
VM  
tONG  
Fg. VG pin voltage  
18. Current save function when motor is stopped  
SST pin is the open-drain output. When STEP signal is not input for about 16mS, (min: 13mS, max: 23mS), SST pin  
detects that the rotation of the motor is stopped and SST pin is turned on. At this time, high-efficient drive function is  
turned off automatically and full current value is set for I  
SST pin is turned off and high-efficient control function is enabled.  
by VREF pin. And then after signal is input to STEP pin,  
OUT  
In this driver, the circuit constituent is as follows. By decreasing VREF voltage when the motor is stopped, I  
OUT  
current can be saved. However, this function is unusable when you rotate motor at which input cycle of STEP pulse  
signal is 16mS or longer.  
Motor stop  
"L"  
Rotation  
"Hi-Z"  
Motor stop  
"L"  
Rref2  
Rref1  
SST output  
VREF  
SST  
Rsst  
VREF voltage  
Time  
1) With STEP signal where Rref1 = 30k,  
Rref2 = 68kand Rsst = 5k  
2) Without STEP signal where Rref1 = 30k, Rref2 = 68k,  
and Rsst = 5k  
VREF1 = 5V×30k/(68k+30k) 1.53V  
Where VREF1 = 1.53V,  
VREF2 = 5V×4.3k/(68k+4.3k) 0.3V  
Where VREF2 = 0.3V  
I
= VREF/5/0.22  1.39A  
I
= VREF/5/0.22  0.27A  
OUT  
OUT  
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24  
LV8702V  
19. Thermal shutdown function  
The thermal shutdown circuit is included, and the output is turned off when junction temperature Tj exceeds 180°C  
and the abnormal state warning output is turned on at the same time.  
When the temperature falls hysteresis level, output is driven again (automatic restoration).  
The thermal shutdown circuit doesn’t guarantee protection of the set and the destruction prevention of IC,  
because it works at the temperature that is higher than rating (Tjmax=150°C) of the junction temperature.  
TSD = 180°C (typ)  
ΔTSD = 40°C (typ)  
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25  
LV8702V  
Example of application circuit  
Make sure that ADIN is 12V or less  
since constant varies depends on  
user applications.  
ADIN = (VM+VD)  
VD: voltage for diode  
Ca: capacitor for filter  
× Ra1/(Ra1+Ra2)  
+
-
Ra1  
Ca  
Ra2  
1
2
3
4
5
6
7
8
9
SWOUT  
VM 44  
VG 43  
10μF  
0.1μF  
CP2  
0.1μF  
CP1  
PGND1 42  
OUT1A 41  
OUT1A 40  
VM1 39  
GMG2  
GMG1  
GAD  
FR  
logic  
input  
VM1 38  
CLOCK input  
logic input  
STEP  
ST  
RF1  
37  
0.22Ω  
RF1 36  
OUT1B 35  
OUT1B 34  
OUT2A 33  
OUT2A 32  
10 RST  
11 ADIN  
12 MD2  
13 MD1  
logic  
input  
M
0.1μF  
0.22Ω  
47kΩ 47kΩ 47kΩ  
14  
15  
16  
17  
18  
19  
20  
21  
22  
RF2  
RF2  
31  
30  
29  
28  
27  
26  
25  
24  
23  
VREG5  
DST2  
DST1  
MONI  
OE  
short/step-  
out  
detection  
monitor  
VM2  
VM2  
As for Rsst, refer to  
18.current save function.  
OUT2B  
OUT2B  
PGND2  
GST2  
GST2  
SST  
Rsst  
150pF  
CHOP  
VREF  
SGND  
VREF  
30kΩ 68kΩ  
logic  
input  
-
+
5V  
Calculation for each constant setting according to the above circuit diagram is as follows.  
1) Constant current (100%) setting  
VREF = 5V×30k/(68k+ 30k) 1.53V  
When VREF = 1.53V :  
2) Chopping frequency setting  
Fchop = Ichop/(Cchop×Vtchop×2)  
=10A/(150pF×0.5V×2)  
66.7kHz  
I
= VREF/5/0.22  1.39A  
OUT  
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26  
LV8702V  
ORDERING INFORMATION  
Device  
Package  
Shipping (Qty / Packing)  
2000 / Tape & Reel  
SSOP44J (275mil)  
(Pb-Free / Halogen-Free)  
LV8702V-TLM-H  
LV8702V-MPB-H  
SSOP44J (275mil)  
(Pb-Free / Halogen-Free)  
30 / Fan-Fold  
ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiariesin the United States  
and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of  
SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without  
further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitabilityof its products for any particular purpose,  
nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including  
without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can  
and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each  
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are  
not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicationsintended to support or  
sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers,  
employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of,  
directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was  
negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all  
applicable copyright laws and is not for resale in any manner.  
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27  

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