MAC97A4G_技术文档

MAC97 Series

Preferred Device

Sensitive Gate Triacs

Silicon Bidirectional Thyristors

Designed for use in solid state relays, MPU interface, TTL logic and

any other light industrial or consumer application. Supplied in an

inexpensive TO−92 package which is readily adaptable for use in

automatic insertion equipment.

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Features

TRIACS

0.8 AMPERE RMS

200 thru 600 VOLTS

• One−Piece, Injection−Molded Package

• Blocking Voltage to 600 Volts

• Sensitive Gate Triggering in Four Trigger Modes (Quadrants) for all

possible Combinations of Trigger Sources, and especially for Circuits

that Source Gate Drives

• All Diffused and Glassivated Junctions for Maximum Uniformity of

MT2

MT1

Parameters and Reliability

G

• Pb−Free Packages are Available*

MAXIMUM RATINGS (T = 25°C unless otherwise noted)

J

Rating

Symbol

Value

Unit

MARKING

DIAGRAMS

Peak Repetitive Off-State Voltage

V

DRM,

(T = −40 to +110°C) (Note 1)

J

RRM

Sine Wave 50 to 60 Hz, Gate Open

MAC97A4

MAC97A6

MAC97A8

200

400

600

MAC

97Ax

AYWWG

G

On-State RMS Current

I

0.6

A

T(RMS)

TO−92 (TO−226AA)

Full Cycle Sine Wave 50 to 60 Hz

CASE 029

STYLE 12

(T = +50°C)

C

1

2

3

Peak Non−Repetitive Surge Current

One Full Cycle, Sine Wave 60 Hz

I

TSM

8.0

(T = 110°C)

C

2

MAC97Ax = Device Code

x = 4, 6, or 8

Circuit Fusing Considerations (t = 8.3 ms)

I t

0.26

5.0

A s

Peak Gate Voltage

V

W

A

GM

A

= Assembly Location

(t v 2.0 ms, T = +80°C)

C

Y

= Year

Peak Gate Power

P

5.0

0.1

1.0

WW

G

= Work Week

= Pb−Free Package

(t v 2.0 ms, T = +80°C)

C

Average Gate Power

P

G(AV)

(Note: Microdot may be in either location)

(T = 80°C, t v 8.3 ms)

C

Peak Gate Current

I

GM

(t v 2.0 ms, T = +80°C)

C

PIN ASSIGNMENT

Operating Junction Temperature Range

Storage Temperature Range

T

−40 to +110

−40 to +150

°C

J

1

2

3

Main Terminal 1

Gate

T

stg

Maximum ratings are those values beyond which device damage can occur.

Maximum ratings applied to the device are individual stress limit values (not

normal operating conditions) and are not valid simultaneously. If these limits are

exceeded, device functional operation is not implied, damage may occur and

reliability may be affected.

Main Terminal 2

1. V

and V

for all types can be applied on a continuous basis. Blocking

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 6 of this data sheet.

DRM

RRM

voltages shall not be tested with a constant current source such that the

voltage ratings of the devices are exceeded.

Preferred devices are recommended choices for future use

and best overall value.

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

©

Semiconductor Components Industries, LLC, 2005

1

Publication Order Number:

September, 2005 − Rev. 9

MAC97/D

MAC97 Series

THERMAL CHARACTERISTICS

Characteristic

Symbol

Max

75

Unit

°C/W

°C

Thermal Resistance, Junction−to−Case

Thermal Resistance, Junction−to−Ambient

R

q

JC

JA

L

R

q

200

260

Maximum Lead Temperature for Soldering Purposes for 10 Seconds

T

ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted; Electricals apply in both directions)

C

Characteristic

Symbol

Min

Typ

Max

Unit

OFF CHARACTERISTICS

Peak Repetitive Blocking Current

I

, I

DRM RRM

(V = Rated V

, V

DRM

; Gate Open)

RRM

T = 25°C

−

10

100

mA

D

J

T = +110°C

J

ON CHARACTERISTICS

Peak On−State Voltage

V

−

1.9

V

TM

(I = ".85 A Peak; Pulse Width v 2.0 ms, Duty Cycle v 2.0%)

TM

Gate Trigger Current (Continuous dc)

I

mA

GT

(V = 12 Vdc, R = 100 W)

D

L

MT2(+), G(+)

−

5.0

7.0

MT2(+), G(−)

MT2(−), G(−)

MT2(−), G(+)

Gate Trigger Voltage (Continuous dc)

(V = 12 Vdc, R = 100 W)

MT2(+), G(+) All Types

MT2(+), G(−) All Types

MT2(−), G(−) All Types

MT2(−), G(+) All Types

V

GT

D

L

−

.66

.77

.84

.88

2.0

2.5

Gate Non−Trigger Voltage

V

0.1

−

GD

(V = 12 V, R = 100 W, T = 110°C)

D

L

J

All Four Quadrants

Holding Current

(V = 12 Vdc, Initiating Current = 200 mA, Gate Open)

D

I

−

1.5

2.0

10

−

mA

H

Turn-On Time

t

ms

gt

(V = Rated V

, I = 1.0 A pk, I = 25 mA)

DRM TM G

D

DYNAMIC CHARACTERISTICS

Critical Rate−of−Rise of Commutation Voltage

(V = Rated V , I = .84 A,

Commutating di/dt = .3 A/ms, Gate Unenergized, T = 50°C)

dV/dt(c)

dv/dt

−

5.0

25

−

V/ms

D

DRM TM

C

Critical Rate of Rise of Off−State Voltage

(V = Rated V

, T = 110°C, Gate Open, Exponential Waveform

D

DRM

C

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2

MAC97 Series

Voltage Current Characteristic of Triacs

(Bidirectional Device)

+ Current

Quadrant 1

MainTerminal 2 +

Symbol

Parameter

V

TM

V

Peak Repetitive Forward Off State Voltage

Peak Forward Blocking Current

DRM

on state

I

H

I

at V

RRM

V

Peak Repetitive Reverse Off State Voltage

Peak Reverse Blocking Current

RRM

I

RRM

V

Maximum On State Voltage

Holding Current

+ Voltage

off state

TM

I

at V

H

DRM

I

H

Quadrant 3

MainTerminal 2 −

V

TM

Quadrant Definitions for a Triac

MT2 POSITIVE

(Positive Half Cycle)

+

(+) MT2

Quadrant II

Quadrant I

(−) I

(+) I

GT

GATE

MT1

REF

I

−

+ I

GT

(−) MT2

Quadrant III

Quadrant IV

(+) I

(−) I

GT

GATE

MT1

REF

MT1

REF

−

MT2 NEGATIVE

(Negative Half Cycle)

All polarities are referenced to MT1.

With in−phase signals (using standard AC lines) quadrants I and III are used.

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3

MAC97 Series

110

100

90

110

100

T = 30°

60°

90

80

70

60

50

60°

90°

DC

90°

80

180°

70

120°

60

a

50

40

30

a

40

a = CONDUCTION ANGLE

20

30

0

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

I

, RMS ON−STATE CURRENT (AMPS)

I

, RMS ON−STATE CURRENT (AMPS)

T(RMS)

Figure 2. RMS Current Derating

Figure 1. RMS Current Derating

1.2

1.0

0.8

0.6

0.4

0.2

0

6.0

4.0

a

DC

T = 110°C

J

a

180°

2.0

a = CONDUCTION ANGLE

25°C

120°

1.0

90°

0.6

0.4

60°

T = 30°

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

I

, RMS ON−STATE CURRENT (AMPS)

T(RMS)

0.2

0.1

Figure 3. Power Dissipation

0.06

0.04

0.02

0.01

0.006

0.4

1.2

2.0

2.8

3.6

4.4

5.2

6.0

V

, INSTANTANEOUS ON-STATE VOLTAGE (VOLTS)

TM

Figure 4. On−State Characteristics

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4

MAC97 Series

10

1.0

5.0

Z

= R

@ r(t)

JC(t)

Q

JC(t)

0.1

3.0

2.0

T = 110°C

J

f = 60 Hz

CYCLE

Surge is preceded and followed by rated current.

0.01

1.0

3

4

0.1

1.0

10

100

1S10

2.0 3.0

5.0

10

30

50

100

NUMBER OF CYCLES

t, TIME (ms)

Figure 5. Transient Thermal Response

Figure 6. Maximum Allowable Surge Current

100

1.2

1.1

1.0

0.9

0.8

0.7

0.6

0.5

Q4

Q3

Q2

Q4

Q3

10

Q1

Q2

Q1

1

0

0.4

0.3

−40 −25 −10

5

20

35

50

65

80

95 110

−40 −25 −10

5

20

35

50

65

80

95 110

T , JUNCTION TEMPERATURE (°C)

J

T , JUNCTION TEMPERATURE (°C)

J

Figure 7. Typical Gate Trigger Current versus

Junction Temperature

Figure 8. Typical Gate Trigger Voltage versus

Junction Temperature

100

10

Q2

MT2 Negative

MT2 Positive

1

Q3

Q4

Q1

1

0

0.1

−40 −25 −10

5

20

35

50

65

80

95 110

−40 −25 −10

5

20

35

50

65

80

95 110

T , JUNCTION TEMPERATURE (°C)

J

T , JUNCTION TEMPERATURE (°C)

J

Figure 9. Typical Latching Current versus

Junction Temperature

Figure 10. Typical Holding Current versus

Junction Temperature

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5

MAC97 Series

L

1N4007

L

200 V

RMS

ADJUST FOR

, 60 Hz V

MEASURE

I

R

S

I

TM

AC

CHARGE

CONTROL

−

+

TRIGGER

200 V

CHARGE

C

ADJUST FOR

dV/dt

S

(c)

MT2

G

1N914

51 W

MT1

NON-POLAR

C

L

Note: Component values are for verification of rated (dv/dt) . See AN1048 for additional information.

c

Figure 11. Simplified Test Circuit to Measure the Critical Rate of Rise of Commutating Voltage (dV/dt)_c

ORDERING & SHIPPING INFORMATION

Europe

Equivalent

MAC97A6RL1

MAC97A6RL1G

U.S.

Shipping

Description of TO92 Tape Orientation

Flat side of TO92 & adhesive tape visible

Radial Tape & Reel (2K/Reel)

(Pb−Free)

MAC97A8RLRM

MAC97A8RL1

Radial Tape & Reel (2K/Reel)

Flat side of TO92 & adhesive tape visible

MAC97A8RLRMG

MAC97A8RL1G

Radial Tape & Reel (2K/Reel)

(Pb−Free)

MAC97A4

Bulk in Box (5K/Box)

N/A, Bulk

MAC97A4G

Bulk in Box (5K/Box)

(Pb−Free)

MAC97A6

Bulk in Box (5K/Box)

N/A, Bulk

MAC97A6G

Bulk in Box (5K/Box)

(Pb−Free)

MAC97A8

Bulk in Box (5K/Box)

N/A, Bulk

MAC97A8G

Bulk in Box (5K/Box)

(Pb−Free)

MAC97A6RLRF

Radial Tape & Reel (2K/Reel)

Round side of TO92 & adhesive tape on reverse side

MAC97A6RLRFG

Radial Tape & Reel (2K/Reel)

(Pb−Free)

MAC97A6RLRP

Radial Tape & Reel (2K/Reel)

Round side of TO92 & adhesive tape on reverse side

MAC97A6RLRPG

Radial Tape & Reel (2K/Reel)

(Pb−Free)

MAC97A8RLRP

Radial Tape / Fan Fold Box (2K/Box) Round side of TO92 & adhesive tape visible

MAC97A8RLRPG

Radial Tape / Fan Fold Box (2K/Box) Round side of TO92 & adhesive tape visible

(Pb−Free)

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

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6

MAC97 Series

TO−92 EIA RADIAL TAPE IN FAN FOLD BOX OR ON REEL

H2A

H2B

H

W2

H4

H5

T1

L1

H1

W1

W

L

T

T2

F1

F2

D

P2

P1

P2

P

Figure 12. Device Positioning on Tape

Specification

Millimeter

Inches

Min

Max

0.1653

0.020

0.110

0.156

0.3741

0.039

0.051

0.768

0.649

0.433

−

Min

Max

4.2

Symbol

D

Item

Tape Feedhole Diameter

0.1496

0.015

0.0945

.059

3.8

0.38

2.4

1.5

8.5

0

D2

F1, F2

H

Component Lead Thickness Dimension

Component Lead Pitch

0.51

2.8

Bottom of Component to Seating Plane

Feedhole Location

4.0

H1

H2A

H2B

H4

H5

L

0.3346

0

9.5

Deflection Left or Right

1.0

Deflection Front or Rear

0

1.0

Feedhole to Bottom of Component

Feedhole to Seating Plane

Defective Unit Clipped Dimension

Lead Wire Enclosure

0.7086

0.610

0.3346

0.09842

0.4921

0.2342

0.1397

0.06

18

19.5

16.5

11

15.5

8.5

2.5

12.5

5.95

3.55

0.15

−

L1

−

P

Feedhole Pitch

0.5079

0.2658

0.1556

0.08

12.9

6.75

3.95

0.20

1.44

0.65

19

P1

Feedhole Center to Center Lead

First Lead Spacing Dimension

Adhesive Tape Thickness

Overall Taped Package Thickness

Carrier Strip Thickness

P2

T

T1

−

0.0567

0.027

0.7481

0.2841

0.01968

T2

0.014

0.6889

0.2165

0.0059

0.35

17.5

5.5

0.15

W

Carrier Strip Width

W1

W2

Adhesive Tape Width

6.3

Adhesive Tape Position

0.5

NOTES:

2. Maximum alignment deviation between leads not to be greater than 0.2 mm.

3. Defective components shall be clipped from the carrier tape such that the remaining protrusion (L) does not exceed a maximum of 11 mm.

4. Component lead to tape adhesion must meet the pull test requirements.

5. Maximum non−cumulative variation between tape feed holes shall not exceed 1 mm in 20 pitches.

6. Holddown tape not to extend beyond the edge(s) of carrier tape and there shall be no exposure of adhesive.

7. No more than 1 consecutive missing component is permitted.

8. A tape trailer and leader, having at least three feed holes is required before the first and after the last component.

9. Splices will not interfere with the sprocket feed holes.

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7

MAC97 Series

PACKAGE DIMENSIONS

TO−92 (TO−226AA)

CASE 029−11

ISSUE AL

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

A

B

2. CONTROLLING DIMENSION: INCH.

3. CONTOUR OF PACKAGE BEYOND DIMENSION R

IS UNCONTROLLED.

R

4. LEAD DIMENSION IS UNCONTROLLED IN P AND

BEYOND DIMENSION K MINIMUM.

P

L

SEATING

PLANE

INCHES

DIM MIN MAX

MILLIMETERS

K

MIN

4.45

4.32

3.18

0.407

1.15

2.42

0.39

MAX

5.20

5.33

4.19

0.533

1.39

2.66

0.50

−−−

A

B

C

D

G

H

J

0.175

0.170

0.125

0.016

0.045

0.095

0.015

0.500

0.250

0.080

0.205

0.210

0.165

0.021

0.055

0.105

0.020

−−− 12.70

−−−

0.105

D

X X

G

J

H

V

K

L

6.35

2.04

−−−

2.93

3.43

−−−

C

N

P

R

V

2.66

2.54

−−−

−−− 0.100

SECTION X−X

0.115

0.135

−−−

1

N

−−−

N

STYLE 12:

PIN 1. MAIN TERMINAL 1

2. GATE

3. MAIN TERMINAL 2

ON Semiconductor and

are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All

operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights

nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications

intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should

Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,

and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death

associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal

Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

LITERATURE FULFILLMENT:

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

ON Semiconductor Website: http://onsemi.com

Order Literature: http://www.onsemi.com/litorder

Literature Distribution Center for ON Semiconductor

P.O. Box 61312, Phoenix, Arizona 85082−1312 USA

Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada

Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada

Email: orderlit@onsemi.com

Japan: ON Semiconductor, Japan Customer Focus Center

2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051

Phone: 81−3−5773−3850

For additional information, please contact your

local Sales Representative.

MAC97/D

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8


型号：	MAC97A4G
厂家：	ONSEMI
描述：	Sensitive Gate Triacs Silicon Bidirectional Thyristors 敏感的门双向可控硅硅双向晶闸管栅极触发装置可控硅三端双向交流开关
文件：	总8页 (文件大小：84K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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