MC100EP56DTG [ONSEMI]
3.3V / 5V ECL Dual Differential 2:1 Multiplexer; 3.3V / 5V ECL双差分2 : 1多路复用器型号: | MC100EP56DTG |
厂家: | ONSEMI |
描述: | 3.3V / 5V ECL Dual Differential 2:1 Multiplexer |
文件: | 总11页 (文件大小:182K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MC10EP56, MC100EP56
3.3V / 5VꢀECL Dual
Differential 2:1 Multiplexer
Description
The MC10/100EP56 is a dual, fully differential 2:1 multiplexer. The
differential data path makes the device ideal for multiplexing low
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MARKING DIAGRAMS*
skew clock or other skew sensitive signals. Multiple V pins are
BB
provided.
The V pin, an internally generated voltage supply, is available to
BB
this device only. For single−ended input conditions, the unused
20
differential input is connected to V as a switching reference voltage.
BB
V
BB
may also rebias AC coupled inputs. When used, decouple V
BB
and V via a 0.01 mF capacitor and limit current sourcing or sinking
MC100EP56
AWLYYWWG
CC
to 0.5 mA. When not used, V should be left open.
BB
The device features both individual and common select inputs to
address both data path and random logic applications.
The 100 Series contains temperature compensation.
SOIC−20
DW SUFFIX
CASE 751D
1
Features
• 360 ps Typical Propagation Delays
• Maximum Frequency > 3 GHz Typical
XXXX
EP56
ALYWG
G
• PECL Mode Operating Range: V = 3.0 V to 5.5 V
CC
with V = 0 V
EE
TSSOP−20
DT SUFFIX
CASE 948R
• NECL Mode Operating Range: V = 0 V
CC
with V = −3.0 V to −5.5 V
EE
• Open Input Default State
20
• Safety Clamp on Inputs
1
• Separate and Common Select
XXXX
EP56
ALYWG
G
• Q Output Will Default LOW with Inputs Open or at V
EE
QFN−20
MN SUFFIX
CASE 485E
• V Outputs
BB
• Pb−Free Packages are Available
xxxx
D
= MC10 or 100
= Date Code
A
= Assembly Location
L, WL = Wafer Lot
Y, YY
= Year
W, WW = Work Week
G, G
= Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
December, 2006 − Rev. 14
MC10EP56/D
MC10EP56, MC100EP56
Table 1. PIN DESCRIPTION
PIN
FUNCTION
D0a* − D1a*
D0a* − D1a*
D0b* − D1b*
D0b* − D1b*
ECL Input Data a
ECL Input Data a Invert
ECL Input Data b
ECL Input Data b Invert
V
Q0
Q0 SEL0
18 17
V
Q1
Q1
V
EE
SEL1
CC
CC
20
19
16
15
14
13
12
11
SEL0* − SEL1*
ECL Indiv. Select Input
COM_SEL*
ECL Common Select Input
Output Reference Voltage
V
, V
BB0 BB1
1
0
1
0
Q0 − Q1
Q0 − Q1
ECL True Outputs
ECL Inverted Outputs
V
V
Positive Supply
Negative Supply
Exposed Pad
CC
EE
EP
1
2
3
4
5
6
7
8
9
10
D0a D0a
V
D0b D0b
D1a D1a
V
D1b D1b
*
Pins will default LOW when left open.
BBO
BB1
Warning: All V and V pins must be externally connected
to Power Supply to guarantee proper operation.
CC
EE
Table 2. TRUTH TABLE
Q0,
Q1,
Q1
Figure 1. 20−Lead Package (Top View) and Logic Diagram
SEL0
SEL1
COM_SEL
Q0
X
L
L
H
H
X
L
H
H
L
H
L
L
L
L
a
b
b
a
a
a
b
a
a
b
Exposed Pad
D0a
20
D0a
19
V
Q0
17
Q0
16
CC
18
V
1
2
3
4
5
15
14
13
12
11
SEL0
BB0
D0b
D0b
COM_SEL
SEL1
MC10/100EP56
D1a
D1a
V
CC
Q1
6
7
8
9
10
V
D1b D1b
V
Q1
BB1
EE
NOTE: The Exposed Pad (EP) on package bottom must be attached to a heat−sinking conduit.
The Exposed Pad may only be electrically connected to V
.
EE
Figure 1. QFN−20 Pinout (Top View)
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2
MC10EP56, MC100EP56
Table 3. ATTRIBUTES
Characteristics
Value
Value
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
75 kW
N/A
Human Body Model
Machine Model
Charged Device Model
> 2 kV
> 150 V
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
SOIC
Pb Pkg
Pb−Free Pk
Level 1
Level 1
N/A
Level 3
Level 3
Level 1
TSSOP
QFN
Flammability Rating
Transistor Count
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
140 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Table 4. MAXIMUM RATINGS
Symbol
Parameter
PECL Mode Power Supply
NECL Mode Power Supply
Condition 1
= 0 V
Condition 2
Rating
Unit
V
V
V
V
V
V
6
CC
EE
I
EE
CC
= 0 V
−6
V
PECL Mode Input Voltage
NECL Mode Input Voltage
V
V
= 0 V
= 0 V
V ꢀ V
6
−6
V
V
EE
CC
I
CC
V ꢁ V
I
EE
I
Output Current
Continuous
Surge
50
100
mA
mA
out
I
V
Sink/Source
BB
0.5
mA
°C
BB
T
Operating Temperature Range
Storage Temperature Range
−40 to +85
−65 to +150
A
T
°C
stg
q
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
20 TSSOP
20 TSSOP
140
100
°C/W
°C/W
JA
q
q
Thermal Resistance (Junction−to−Case)
Standard Board
20 TSSOP
23 to 41
°C/W
JC
JA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
20 SOIC
20 SOIC
90
60
°C/W
°C/W
500 lfpm
Standard Board
Thermal Resistance (Junction−to−Ambient) 0 lfpm
q
q
Thermal Resistance (Junction−to−Case)
20 SOIC
33 to 35
°C/W
JC
JA
QFN−20
QFN−20
47
33
°C/W
°C/W
500 lfpm
q
Thermal Resistance (Junction−to−Case)
Standard Board
QFN−20
18
°C/W
°C
JC
T
sol
Wave Solder
Pb <2 to 3 sec @ 248°C
265
265
Pb−Free <2 to 3 sec @ 260°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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3
MC10EP56, MC100EP56
Table 5. 10EP DC CHARACTERISTICS, PECL V = 3.3 V, V = 0 V (Note 2)
CC
EE
−40°C
25°C
Typ
85°C
Typ
Symbol
Characteristic
Power Supply Current
Min
50
Typ
61
Max
75
Min
50
Max
75
Min
55
Max
78
Unit
mA
mV
mV
mV
mV
mV
V
I
63
65
EE
V
V
V
V
Output HIGH Voltage (Note 3)
Output LOW Voltage (Note 3)
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Output Voltage Reference
2165
1365
2090
1365
1790
2.0
2290
1490
2415
1615
2415
1690
1990
3.3
2230
1430
2155
1460
1855
2.0
2355
1555
2480
1680
2480
1755
2055
3.3
2290
1490
2215
1490
1915
2.0
2415
1615
2540
1740
2540
1815
2115
3.3
OH
OL
IH
IL
V
1890
1955
2015
BB
V
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 4)
IHCMR
I
I
Input HIGH Current
Input LOW Current
150
150
150
mA
mA
IH
IL
−150
−150
−150
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Input and output parameters vary 1:1 with V . V can vary +0.3 V to −2.2 V.
CC
EE
3. All loading with 50 W to V − 2.0 V.
CC
4. V
min varies 1:1 with V , V
max varies 1:1 with V . The V
range is referenced to the most positive side of the differential
IHCMR
EE IHCMR
CC
IHCMR
input signal.
Table 6. 10EP DC CHARACTERISTICS, PECL V = 5.0 V, V = 0 V (Note 5)
CC
EE
−40°C
25°C
Typ
85°C
Typ
Symbol
Characteristic
Power Supply Current
Min
50
Typ
61
Max
75
Min
50
Max
75
Min
55
Max
78
Unit
mA
mV
mV
mV
mV
mV
V
I
63
65
EE
V
V
V
V
V
V
Output HIGH Voltage (Note 6)
Output LOW Voltage (Note 6)
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Output Voltage Reference
3865
3065
3790
3065
3490
2.0
3990
3190
4115
3315
4115
3390
3690
5.0
3930
3130
3855
3130
3555
2.0
4055
3255
4180
3380
4180
3455
3755
5.0
3990
3190
3915
3190
3615
2.0
4115
3315
4240
3440
4240
3515
3815
5.0
OH
OL
IH
IL
3590
3655
3715
BB
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 7)
IHCMR
I
I
Input HIGH Current
Input LOW Current
150
150
150
mA
mA
IH
IL
−150
−150
−150
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Input and output parameters vary 1:1 with V . V can vary +2.0 V to −0.5 V.
CC
EE
6. All loading with 50 W to V − 2.0 V.
CC
7. V
min varies 1:1 with V , V
max varies 1:1 with V . The V
range is referenced to the most positive side of the differential
IHCMR
EE IHCMR
CC
IHCMR
input signal.
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4
MC10EP56, MC100EP56
Table 7. 10EP DC CHARACTERISTICS, NECL V = 0 V, V = −5.5 V to −3.0 V (Note 8)
CC
EE
−40°C
Typ
61
25°C
Typ
63
85°C
Typ
65
Symbol
Characteristic
Power Supply Current
Min
50
Max
Min
Max
Min
Max
78
Unit
mA
mV
I
75
50
75
55
EE
V
V
V
V
V
V
Output HIGH Voltage (Note 9)
Output LOW Voltage (Note 9)
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Output Voltage Reference
−1135 −1010 −885 −1070 −945
−820 −1010 −885
−760
OH
OL
−1935 −1810 −1685 −1870 −1745 −1620 −1810 −1685 −1560 mV
−1210
−1935
−885 −1145
−1610 −1870
−820 −1085
−1545 −1810
−760
mV
IH
−1485 mV
IL
−1510 −1410 −1310 −1445 −1345 −1245 −1385 −1285 −1185
mV
V
BB
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 10)
V
+2.0
0.0
V
+2.0
0.0
V +2.0
EE
0.0
IHCMR
EE
EE
I
I
Input HIGH Current
Input LOW Current
150
150
150
mA
mA
IH
IL
−150
−150
−150
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
8. Input and output parameters vary 1:1 with V
.
CC
9. All loading with 50 W to V − 2.0 V.
CC
10.V
min varies 1:1 with V , V
max varies 1:1 with V . The V
range is referenced to the most positive side of the differential
IHCMR
EE IHCMR
CC
IHCMR
input signal.
100EP DC CHARACTERISTICS, PECL V = 3.3 V, V = 0 V (Note 11)
CC
EE
−40°C
Typ
25°C
Typ
85°C
Typ
Symbol
Characteristic
Power Supply Current
Min
Max
75
Min
50
Max
77
Min
55
Max
80
Unit
mA
mV
mV
mV
mV
mV
V
I
50
61
63
66
EE
V
V
V
V
V
V
Output HIGH Voltage (Note 12)
Output LOW Voltage (Note 12)
2155
1355
2075
1355
1775
2.0
2280
1480
2405
1605
2420
1675
1975
3.3
2155
1355
2075
1355
1775
2.0
2280
1480
2405
1605
2420
1675
1975
3.3
2155
1355
2075
1355
1775
2.0
2280
1480
2405
1605
2420
1675
1975
3.3
OH
OL
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Output Voltage Reference
IH
IL
1875
1875
1875
BB
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 13)
IHCMR
I
I
Input HIGH Current
Input LOW Current
150
150
150
mA
mA
IH
IL
−150
−150
−150
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
11. Input and output parameters vary 1:1 with V . V can vary +0.3 V to −2.2 V.
CC
EE
12.All loading with 50 W to V − 2.0 V.
CC
13.V
min varies 1:1 with V , V
max varies 1:1 with V . The V
range is referenced to the most positive side of the differential
IHCMR
EE IHCMR
CC
IHCMR
input signal.
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5
MC10EP56, MC100EP56
100EP DC CHARACTERISTICS, PECL V = 5.0 V, V = 0 V (Note 14)
CC
EE
−40°C
Typ
25°C
Typ
85°C
Typ
Symbol
Characteristic
Power Supply Current
Min
Max
75
Min
50
Max
77
Min
55
Max
80
Unit
mA
mV
mV
mV
mV
mV
V
I
50
61
63
66
EE
V
V
V
V
V
V
Output HIGH Voltage (Note 15)
Output LOW Voltage (Note 15)
3855
3055
3775
3055
3475
2.0
3980
3180
4105
3305
4120
3375
3675
5.0
3855
3055
3775
3055
3475
2.0
3980
3180
4105
3305
4120
3375
3675
5.0
3855
3055
3775
3055
3475
2.0
3980
3180
4105
3305
4120
3375
3675
5.0
OH
OL
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Output Voltage Reference
IH
IL
3575
3575
3575
BB
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 16)
IHCMR
I
I
Input HIGH Current
Input LOW Current
150
150
150
mA
mA
IH
IL
−150
−150
−150
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
14.Input and output parameters vary 1:1 with V . V can vary +2.0 V to −0.5 V.
CC
EE
15.All loading with 50 W to V − 2.0 V.
CC
16.V
min varies 1:1 with V , V
max varies 1:1 with V . The V
range is referenced to the most positive side of the differential
IHCMR
EE IHCMR
CC
IHCMR
input signal.
Table 8. 100EP DC CHARACTERISTICS, NECL V = 0 V, V = −5.5 V to −3.0 V (Note 17)
CC
EE
−40°C
Typ
61
25°C
Typ
63
85°C
Typ
66
Symbol
Characteristic
Power Supply Current
Min
Max
75
Min
Max
Min
Max
Unit
mA
mV
I
50
50
77
55
80
EE
V
V
V
V
V
V
Output HIGH Voltage (Note 18)
Output LOW Voltage (Note 18)
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Output Voltage Reference
−1145 −1020 −895 −1145 −1020 −895 −1145 −1020 −895
OH
OL
−1945 −1820 −1695 −1945 −1820 −1695 −1945 −1820 −1695 mV
−1225
−1945
−880 −1225
−1625 −1945
−880 −1225
−1625 −1945
−880
mV
IH
−1625 mV
IL
−1525 −1425 −1325 −1525 −1425 −1325 −1525 −1425 −1325 mV
BB
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 19)
V
+2.0
0.0
V
+2.0
0.0
V +2.0
EE
0.0
V
IHCMR
EE
EE
I
I
Input HIGH Current
Input LOW Current
150
150
150
mA
mA
IH
IL
−150
−150
−150
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
17.Input and output parameters vary 1:1 with V
.
CC
18.All loading with 50 W to V − 2.0 V.
CC
19.V
min varies 1:1 with V , V
max varies 1:1 with V . The V
range is referenced to the most positive side of the differential
IHCMR
EE IHCMR
CC
IHCMR
input signal.
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6
MC10EP56, MC100EP56
Table 9. AC CHARACTERISTICS V = 0 V; V = −3.0 V to −5.5 V or V = 3.0 V to 5.5 V; V = 0 V (Note 20)
CC
EE
CC
EE
−40°C
Typ
25°C
Typ
> 3
85°C
Typ
> 3
Symbol
Characteristic
Min
Max
Min
Max
Min
Max
Unit
f
Maximum Frequency
> 3
GHz
max
(See Figure 2 F /JITTER)
max
t
t
,
Propagation Delay to
Output Differential
ps
PLH
PHL
D to Q, Q
250
250
250
340
340
350
450
450
450
270
270
270
360
340
360
470
470
470
300
300
300
400
400
400
500
500
500
SEL to Q, Q
COM_SEL to Q, Q
t
Within−Device Skew (Note 21)
50
100
200
50
100
200
50
100
200
ps
ps
SKEW
Device to Device Skew
t
Random Clock Jitter
0.2
800
120
< 1
1200
170
0.2
800
130
< 1
1200
180
0.2
800
150
< 1
1200
230
JITTER
(See Figure 2 F
/JITTER)
max
V
Input Voltage Swing
(Differential Configuration)
150
70
150
80
150
100
mV
ps
PP
t
t
Output Rise/Fall Times
Q, Q
r
f
(20% − 80%)
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
20.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to V − 2.0 V.
CC
21.Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays
are measured from the cross point of the inputs to the cross point of the outputs.
1000
800
600
400
200
10
9
5 V
8
7
3.3 V
6
5
4
3
2
1
0
(JITTER)
1.0
1.5
2.0
2.5
3.0
FREQUENCY (GHz)
Figure 2. Fmax/Jitter @ 255C
Z = 50 W
o
Q
D
Receiver
Device
Driver
Device
Q
Z = 50 W
o
D
50 W
50 W
V
TT
V
= V − 2.0 V
TT
CC
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
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MC10EP56, MC100EP56
ORDERING INFORMATION
Device
†
Package
Shipping
MC10EP56DT
TSSOP−20
75 Units / Rail
75 Units / Rail
MC10EP56DTG
TSSOP−20
(Pb−Free)
MC10EP56DTR2
TSSOP−20
2500 / Tape & Reel
2500 / Tape & Reel
MC10EP56DTR2G
TSSOP−20
(Pb−Free)
MC10EP56MNG
QFN−20
(Pb−Free)
92 Units / Rail
MC10EP56MNTXG
QFN−20
(Pb−Free)
3000 / Tape & Reel
MC100EP56DW
SOIC−20
38 Units / Rail
38 Units / Rail
MC100EP56DWG
SOIC−20
(Pb−Free)
MC100EP56DWR2
MC100EP56DR2G
SOIC−20
1000 / Tape & Reel
1000 / Tape & Reel
SOIC−20
(Pb−Free)
MC100EP56DT
TSSOP−20
75 Units / Rail
75 Units / Rail
MC100EP56DTG
TSSOP−20
(Pb−Free)
MC100EP56DTR2
MC100EP56DTR2G
TSSOP−20
2500 / Tape & Reel
2500 / Tape & Reel
TSSOP−20
(Pb−Free)
MC100EP56MNG
QFN−20
(Pb−Free)
92 Units / Rail
MC100EP56MNTXG
QFN−20
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1672/D
AND8001/D
AND8002/D
AND8020/D
AND8066/D
AND8090/D
−
−
−
−
−
−
−
−
−
−
−
ECL Clock Distribution Techniques
Designing with PECL (ECL at +5.0 V)
ECLinPSt I/O SPiCE Modeling Kit
Metastability and the ECLinPS Family
Interfacing Between LVDS and ECL
The ECL Translator Guide
Odd Number Counters Design
Marking and Date Codes
Termination of ECL Logic Devices
Interfacing with ECLinPS
AC Characteristics of ECL Devices
http://onsemi.com
8
MC10EP56, MC100EP56
PACKAGE DIMENSIONS
SO−20 WB
CASE 751D−05
ISSUE G
D
A
q
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
20
11
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
PROTRUSION.
E
B
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF B
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
1
10
MILLIMETERS
DIM MIN
MAX
2.65
0.25
0.49
0.32
12.95
7.60
20X B
A
A1
B
C
D
E
2.35
0.10
0.35
0.23
12.65
7.40
M
S
S
B
T
0.25
A
A
e
1.27 BSC
H
h
10.05
0.25
0.50
0
10.55
0.75
0.90
7
SEATING
PLANE
L
18X e
q
_
_
A1
C
T
http://onsemi.com
9
MC10EP56, MC100EP56
PACKAGE DIMENSIONS
TSSOP−20
CASE 948E−02
ISSUE C
NOTES:
20X K REF
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
K
K1
M
S
S
V
0.10 (0.004)
T U
S
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
0.15 (0.006) T U
J J1
20
11
2X L/2
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
B
SECTION N−N
L
−U−
PIN 1
IDENT
0.25 (0.010)
N
1
10
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
M
S
0.15 (0.006) T U
A
−V−
N
MILLIMETERS
INCHES
DIM MIN
MAX
6.60
4.50
1.20
0.15
0.75
MIN
MAX
0.260
0.177
F
A
B
6.40
4.30
−−−
0.252
0.169
DETAIL E
C
−−− 0.047
0.006
0.030
D
0.05
0.50
0.002
0.020
F
G
H
0.65 BSC
0.026 BSC
−W−
0.27
0.09
0.09
0.19
0.19
0.37
0.20
0.16
0.30
0.25
0.011
0.004
0.004
0.007
0.007
0.015
0.008
0.006
0.012
0.010
C
J
J1
K
G
D
H
K1
L
DETAIL E
6.40 BSC
0.252 BSC
0
0.100 (0.004)
−T− SEATING
M
0
8
8
_
_
_
_
PLANE
SOLDERING FOOTPRINT*
7.06
1
0.65
PITCH
01.36X6
16X
1.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
10
MC10EP56, MC100EP56
PACKAGE DIMENSIONS
QFN−20
CASE 485E−01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION D APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND 0.30 MM
FROM TERMINAL.
−X−
A
M
−Y−
4. COPLANARITY APPLIES TO THE EXPOSED PAD
AS WELL AS THE TERMINALS.
N
B
MILLIMETERS
DIM MIN MAX
4.00 BSC
4.00 BSC
INCHES
MIN MAX
A
B
C
D
E
F
0.157 BSC
0.157 BSC
0.25 (0.010) T
0.25 (0.010) T
R
0.80
1.00
0.35
2.85
2.85
0.031
0.039
0.014
0.112
0.112
0.23
2.75
2.75
0.009
0.108
0.108
G
H
J
0.50 BSC
0.020 BSC
1.38
1.43
0.054
0.056
J
0.20 REF
0.008 REF
C
K
L
0.00
0.35
0.05
0.45
0.000
0.014
0.002
0.018
SEATING
PLANE
−T−
0.08 (0.003) T
K
M
N
P
R
2.00 BSC
2.00 BSC
0.079 BSC
0.079 BSC
E
1.38
0.60
1.43
0.80
0.054
0.024
0.056
0.031
H
G
L
6
10
5
1
11
F
15
20
16
P
D NOTE 3
M
0.10 (0.004)
T X Y
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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