MC100EPT26DG [ONSEMI]
3.3V 1:2 Fanout Differential LVPECL/LVDS to LVTTL Translator; 3.3V 1 ： 2扇出差分LVPECL / LVDS到LVTTL翻译
| 型号： | MC100EPT26DG |
| 厂家： | 
ONSEMI |
| 描述： | 3.3V 1:2 Fanout Differential LVPECL/LVDS to LVTTL Translator |
| 文件： | 总9页 (文件大小：134K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC100EPT26
3.3Vꢀ1:2 Fanout Differential
LVPECL/LVDS to LVTTL
Translator
Description
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The MC100EPT26 is a 1:2 Fanout Differential LVPECL/LVDS to
LVTTL translator. Because LVPECL (Positive ECL) or LVDS levels are
used only +3.3 V and ground are required. The small outline 8−lead
package and the 1:2 fanout design of the EPT26 makes it ideal for
applications which require the low skew duplication of a signal in a
tightly packed PC board.
MARKING
DIAGRAMS*
8
KPT26
ALYW
G
SO−8
D SUFFIX
CASE 751
The V output allows the EPT26 to be used in a single−ended input
BB
8
mode. In this mode the V
output is tied to the D0 input for a
BB
1
1
1
8
non−inverting buffer or the D0 input for an inverting buffer. If used,
the V pin should be bypassed to ground with > 0.01 mF capacitor.
BB
For a single−ended direct connection, use an external voltage
TSSOP−8
DT SUFFIX
CASE 948R
KA26
reference source such as a resistor divider. Do not use V
for a
BB
8
ALYWG
single−ended direct connection or port to another device.
G
1
Features
• 1.4 ns Typical Propagation Delay
• Maximum Frequency > 275 MHz Typical
• The 100 Series Contains Temperature Compensation
1
DFN8
MN SUFFIX
CASE 506AA
3W MG
G
4
• Operating Range: V = 3.0 V to 3.6 V with GND = 0 V
CC
• 24 mA TTL outputs
• Q Outputs Will Default LOW with Inputs Open or at V
A
L
= Assembly Location
= Wafer Lot
EE
Y
= Year
• V Output
• Pb−Free Packages are Available
BB
W = Work Week
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
November, 2006 − Rev. 14
MC100EPT26/D
MC100EPT26
Table 1. PIN DESCRIPTION
NC
D
1
2
8
7
V
CC
Pin
Q0, Q1
Function
LVTTL Outputs
D0**, D1**
Differential LVPECL Inputs Pair
Positive Supply
Q0
V
V
CC
BB
LVTTL
Output Reference Voltage
Ground
D
3
4
6
5
Q1
GND
NC
No Connect
EP
Exposed pad must be connected to a sufficient
thermal conduit. Electrically connect to the most
negative supply or leave floating open.
V
GND
LVPECL
BB
** Pins will default to V /2 when left open.
CC
(Top View)
Figure 1. 8−Lead Pinout and Logic Diagram
Table 2. ATTRIBUTES
Characteristics
Value
50 kW
50 kW
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Human Body Model
> 1.5 kV
> 100 V
> 2 kV
Machine Model
Charged Device Model
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Pb Pkg
Pb−Free Pkg
SO−8
Level 1
Level 1
Level 1
Level 1
Level 3
Level 1
TSSOP−8
DFN8
Flammability Rating
Transistor Count
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
117 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
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2
MC100EPT26
Table 3. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
GND = 0 V
Condition 2
Rating
3.8
Unit
V
V
V
Positive Power Supply
Input Voltage
CC
IN
GND = 0 V
V ꢀ V
0 to 3.8
± 0.5
V
I
CC
I
V
Sink/Source
BB
mA
°C
°C
BB
T
A
Operating Temperature Range
Storage Temperature Range
−40 to +85
−65 to +150
T
stg
JA
q
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
SOIC−8
SOIC−8
190
130
°C/W
°C/W
q
q
Thermal Resistance (Junction−to−Case)
Standard Board
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
Standard Board
Thermal Resistance (Junction−to−Ambient) 0 lfpm
SOIC−8
41 to 44
°C/W
JC
JA
TSSOP−8
TSSOP−8
185
140
°C/W
°C/W
q
q
Thermal Resistance (Junction−to−Case)
TSSOP−8
41 to 44
°C/W
JC
JA
DFN8
DFN8
129
84
°C/W
°C/W
500 lfpm
T
sol
Wave Solder
Pb
Pb−Free
265
265
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 4. PECL INPUT DC CHARACTERISTICS V = 3.3 V; GND = 0.0 V (Note 2)
CC
−40°C
25°C
85°C
Min
2075
1355
1910
1.2
Typ
Max
2420
1675
2160
3.3
Min
2075
1355
1910
1.2
Typ
Max
2420
1675
2160
3.3
Min
2075
1355
1910
1.2
Typ
Max
2420
1675
2160
3.3
Symbol
Characteristic
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Output Voltage Reference
Unit
mV
mV
V
V
V
V
V
IH
IL
2035
2035
2035
BB
Input HIGH Voltage Common Mode
Range (Differential) (Note 3)
V
IHCMR
I
I
Input HIGH Current
Input LOW Current
150
150
150
mA
mA
IH
IL
D
D
−150
−150
−150
−150
−150
−150
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
2. Input parameters vary 1:1 with V
.
CC
3. V
min varies 1:1 with GND, V
max varies 1:1 with V . The V
range is referenced to the most positive side of the
IHCMR
differential input signal.
IHCMR
CC
IHCMR
Table 5. TTL OUTPUT DC CHARACTERISTICS V = 3.3 V; GND = 0.0 V; T = −40°C to 85°C
CC
A
Symbol
Characteristic
Output HIGH Voltage
Condition
= −3.0 mA
Min
Typ
Max
Unit
V
V
V
I
I
2.4
OH
OL
OH
OL
Output LOW Voltage
= 24 mA
0.5
18
V
I
I
I
Power Supply Current
Power Supply Current
Output Short Circuit Current
10
15
20
28
mA
mA
mA
CCH
CCL
OS
35
−50
−150
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
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3
MC100EPT26
Table 6. AC CHARACTERISTICS V = 3.0 V to 3.6 V; GND = 0.0 V (Note 4)
CC
−40°C
25°C
Typ
350
85°C
Typ
350
Min
Typ
Max
Min
Max
Min
Max
Symbol
Characteristic
Unit
f
Maximum Frequency (Figure 2)
275
350
275
275
MHz
max
t
t
,
Propagation Delay to
Output Differential (Note 5)
1.2
1.2
1.5
1.5
2.0
1.8
1.2
1.2
1.5
1.5
2.0
1.8
1.3
1.2
1.7
1.5
2.2
1.8
ns
PLH
PHL
t
t
t
Within Device Skew++
15
20
100
60
85
500
15
20
100
60
85
500
20
30
100
85
85
500
ps
SK+ +
SK−−
SKPP
Within Device Skew− −
Device−to−Device Skew (Note 6)
t
Random Clock Jitter (RMS) (Figure 2)
ps
JITTER
@ v 200 MHz
@ > 200 MHz
6
20
30
275
6
40
30
275
6
170
30
275
V
Input Voltage Swing (Differential Configuration) 150
Output Rise/Fall Times
800 1200 150
800
1200
150
330
800
1200
mV
ps
PP
t
t
r
f
(0.8V − 2.0V)
Q, Q 330
600 950 330
600
950
650
950
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
4. Measured with a 750 mV 50% duty−cycle clock source. R = 500 W to GND and C = 20 pF to GND. Refer to Figure 3.
L
L
5. Reference (V = 3.3 V ± 5%; GND = 0 V)
CC
6. Skews are measured between outputs under identical transitions.
12
8
3.0
V
ꢀ 0.5 V
OL
V
OH
2.0
1.0
0.0
JITTER
4
0
300
0
100
200
FREQUENCY (MHz)
Figure 2. Typical VOH / Jitter versus Frequency (255C)
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4
MC100EPT26
APPLICATION
TTL RECEIVER
CHARACTERISTIC TEST
C *
L
R
L
*C includes
L
fixture
capacitance
AC TEST LOAD
GND
Figure 3. TTL Output Loading Used for Device Evaluation
ORDERING INFORMATION
Device
†
Package
Shipping
MC100EPT26D
SOIC−8
98 Units / Rail
98 Units / Rail
MC100EPT26DG
SOIC−8
(Pb−Free)
MC100EPT26DR2
MC100EPT26DR2G
SOIC−8
2500 / Tape & Reel
2500 / Tape & Reel
SOIC−8
(Pb−Free)
MC100EPT26DT
TSSOP−8
100 Units / Rail
100 Units / Rail
MC100EPT26DTG
TSSOP−8
(Pb−Free)
MC100EPT26DTR2
MC100EPT26DTR2G
TSSOP−8
2500 / Tape & Reel
2500 / Tape & Reel
TSSOP−8
(Pb−Free)
MC100EPT26MNR4
MC100EPT26MNR4G
DFN8
1000 / Tape & Reel
1000 / Tape & Reel
DFN8
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
MC100EPT26
Resource Reference of Application Notes
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1672/D
AND8001/D
AND8002/D
AND8020/D
AND8066/D
AND8090/D
−
−
−
−
−
−
−
−
−
−
−
ECL Clock Distribution Techniques
Designing with PECL (ECL at +5.0 V)
ECLinPSt I/O SPiCE Modeling Kit
Metastability and the ECLinPS Family
Interfacing Between LVDS and ECL
The ECL Translator Guide
Odd Number Counters Design
Marking and Date Codes
Termination of ECL Logic Devices
Interfacing with ECLinPS
AC Characteristics of ECL Devices
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6
MC100EPT26
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AH
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−X−
A
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
8
5
4
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
S
M
M
B
0.25 (0.010)
Y
1
K
−Y−
G
MILLIMETERS
DIM MIN MAX
INCHES
MIN
MAX
0.197
0.157
0.069
0.020
A
B
C
D
G
H
J
K
M
N
S
4.80
3.80
1.35
0.33
5.00 0.189
4.00 0.150
1.75 0.053
0.51 0.013
C
N X 45
_
SEATING
PLANE
−Z−
1.27 BSC
0.050 BSC
0.10 (0.004)
0.10
0.19
0.40
0
0.25 0.004
0.25 0.007
1.27 0.016
0.010
0.010
0.050
8
0.020
0.244
M
J
H
D
8
0
_
_
_
_
0.25
5.80
0.50 0.010
6.20 0.228
M
S
S
X
0.25 (0.010)
Z
Y
SOLDERING FOOTPRINT*
1.52
0.060
7.0
4.0
0.275
0.155
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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7
MC100EPT26
PACKAGE DIMENSIONS
TSSOP−8
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948R−02
ISSUE A
8x K REF
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
M
S
S
V
0.10 (0.004)
T U
S
0.15 (0.006) T U
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
2X L/2
8
5
4
0.25 (0.010)
B
−U−
L
1
M
PIN 1
IDENT
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE −W−.
S
0.15 (0.006) T U
A
−V−
F
DETAIL E
MILLIMETERS
INCHES
MIN
DIM MIN
MAX
3.10
3.10
MAX
0.122
0.122
0.043
0.006
0.028
A
B
C
D
F
2.90
2.90
0.80
0.05
0.40
0.114
0.114
C
1.10 0.031
0.15 0.002
0.70 0.016
0.10 (0.004)
−W−
SEATING
D
−T−
G
G
K
L
0.65 BSC
0.026 BSC
PLANE
0.25
0.40 0.010
0.016
4.90 BSC
0.193 BSC
0
DETAIL E
M
0
6
6
_
_
_
_
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8
MC100EPT26
PACKAGE DIMENSIONS
DFN8
CASE 506AA−01
ISSUE D
NOTES:
D
A
B
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994 .
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
PIN ONE
REFERENCE
MILLIMETERS
DIM MIN
MAX
1.00
0.05
E
A
A1
A3
b
0.80
0.00
0.20 REF
0.20
0.30
2 X
D
D2
E
E2
e
K
2.00 BSC
0.10
C
1.10
1.30
2.00 BSC
2 X
0.70
0.90
0.50 BSC
0.10
C
TOP VIEW
0.20
0.25
−−−
0.35
L
A
0.10
0.08
C
C
8 X
(A3)
SIDE VIEW
D2
A1
SEATING
PLANE
C
e
e/2
4
1
8 X L
E2
K
8
5
0.10 C A B
0.05
8 X b
C
NOTE 3
BOTTOM VIEW
ECLinPS is a trademark of Semiconductor Components INdustries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
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Order Literature: http://www.onsemi.com/orderlit
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Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
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MC100EPT26/D
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